Abstract: This invention describes a circuit and method for creating a double clock frequency. The circuit uses a sequence of delay elements to delay the primary clock. A delay detector determines when a delayed clock is out of phase with the primary clock. A delay is selected that is one half the delay producing the out of phase delayed clock. The selected delay is used to combine with the primary clock to produce a double clock frequency. Control signals for selecting the "half" delayed clock are latched to prevent clock jitter and spurious signal from producing error signals in the double frequency clock. Different duty cycles can be established by varying the selected delay.

Abstract: Systems and methods for the detection of motions of a pointed object upon a writing surface such as a touchpad is disclosed. The motions will be detected and converted in a multiplexing analog-to-digital converter to digital codes representing the location of the pointed object and the pressure of the pointed object upon the touchpad. The location and the pressure will be translated into a pen detect signal indicating the presence of the pointed object upon the touchpad. The pen detect signal will be translated into a stroke signal to interpret a single tap, a double tap, and a tap and drag of the pointed object on the touchpad. The digital codes will be averaged to minimize noise and formed into an absolute coordinates digital code. The absolute coordinate digital code, the pressure digital code, and the pen detect signal will be converted to a touchpad-computer interface protocol. Further, multiple sets absolute coordinates will translated into a relative motion code.

Abstract: A method and means to estimate the pitch of a speech or acoustic signal within a vocoder begins with the center clipping and low-pass filtering of the speech or acoustic signal to eliminate the formants from the speech or acoustic signal. An error function for each pitch is calculated for each pitch within the speech or acoustic signal. A fast tracking method is used to select the estimated pitch for the pitch or acoustic signal. A final check for the doubling of the pitch will minimize any incorrect estimation of the pitch.

Abstract: A circuit is disclosed for a complimentary metal oxide semiconductor (CMOS) operational amplifier output stage which can be connected easily to almost any input stage design and which can be coupled directly to that input stage. The circuit uses nine small transistors and two output transistors. The output transistors are connected in series between the power supply rails and the size of the two output transistors determines the current available to the load. The circuit of the invention can provide rail-to-rail output voltage swings and can drive a low ohm resistive load.

Abstract: An integrated circuit functions as an image detector providing an output signal representing the detected image. A two dimensional array of sensor cells is formed in rows and columns. A digital timing control means has outputs for providing timing signals. An address encoder is coupled to receive timing control signals from the digital timing control means. Each sensor cell has a photodiode and a first transistor having a first gate and having a source/drain circuit for precharging the cell and a second transistor having a second gate and a source/drain circuit for reading from the photodiode. The sensor cells are adapted for sensing electromagnetic radiation incident thereon. A plurality of sensor data amplifiers receives data from the cells. Means is provided for reading data from the cells into the sensor data amplifiers, and the sense amplifiers include an output circuit.

Abstract: To accomplish the above objectives, the present invention provides a method of fabricating a collector well in a semiconductor BiCMOS device. The method begins by providing a substrate having c-well areas, N-well areas, and P-well areas. The substrate has n-plug doped regions in said c-well areas. A stress release oxide layer is grown over the substrate surface. A first nitride layer 27 is formed over the stress release oxide layer 26. A C-well mask 29having C-well mask openings 28A is formed over C-well areas 28 and openings are formed in the first nitride layer. Impurities are implanted through the opening forming collector-well regions. The c-well mask is then removed. A n-well photoresist mask having n-well mask openings 42A is formed over the first nitride layer and openings are etched in the first nitride layer over N-well areas 40. Ions impurities are implanted through the n-well nitride opening 42A forming n-well regions 44 in the n-well area in the substrate 10. The n-well mask 42 is then removed.