Abstract: The present invention, generally speaking, provides for high-efficiency power control of an amplifier apparatus. In one example of the present invention, the amplifier apparatus comprises a power control circuit for producing a specified signal using a magnitude signal and a power source in accordance with a control signal, produced independently of the RF input signal and an amplifier that has the specified signal as a supply signal and producing an RF output signal.

Abstract: The present invention, generally speaking, provides for high-efficiency power control of a high-efficiency (e.g., hard-limiting or switch-mode) power amplifier in such a manner as to achieve a desired modulation. In one embodiment, the spread between a maximum frequency of the desired modulation and the operating frequency of a switch-mode DC-DC converter is reduced by following the switch-mode converter with an active linear regulator. The linear regulator is designed so as to control the operating voltage of the power amplifier with sufficient bandwidth to faithfully reproduce the desired amplitude modulation wave-form. The linear regulator is further designed to reject variations on its input voltage even while the output voltage is changed in response to an applied control signal. This rejection will occur even though the variations on the input voltage are of commensurate or even lower frequency than that of the controlled output variation.

Abstract: The present invention, generally speaking, provides for high-efficiency power control of a high-efficiency (e.g., hard-limiting or switch-mode) power amplifier in such a manner as to achieve a desired modulation. In one embodiment, the spread between a maximum frequency of the desired modulation and the operating frequency of a switch-mode DC-DC converter is reduced by following the switch-mode converter with an active linear regulator. The linear regulator is designed so as to control the operating voltage of the power amplifier with sufficient bandwidth to faithfully reproduce the desired amplitude modulation wave-form. The linear regulator is further designed to reject variations on its input voltage even while the output voltage is changed in response to an applied control signal. This rejection will occur even though the variations on the input voltage are of commensurate or even lower frequency than that of the controlled output variation.

Abstract: An impedance matching circuit (140) includes a capacitive element (C1, 220), having a capacitance C, coupled in parallel with an output node (215) of the matching circuit, and an inductor (L1, 225) coupled in series with a transmission line (T1, 230) between the input node and the output node. The transmission line has a length that, in combination with the inductor, provides impedance substantially equal to the input impedance of the transmission circuit (150) at a frequency of interest. In one embodiment, the inductor is connected to an output (195) of an amplifier (180), and the transmission line is connected to the inductor and to the output (215). The capacitive element is connected to the transmission line such that the length of the transmission line between the inductor and the capacitive element provides the desired inductance.

Abstract: In a portable dual mode receiver circuit, a dual modulus clock system is provided which can, by selective use of integer division on a multiplied master clock, select specific channels with two different channel spacings in several different bands, providing power and space savings and achieving simplicity of operation.

Abstract: The present invention, generally speaking, provides for high-efficiency power control of a high-efficiency (e.g., hard-limiting or switch-mode) power amplifier in such a manner as to achieve a desired modulation. In one embodiment, the spread between a maximum frequency of the desired modulation and the operating frequency of a switch-mode DC-DC converter is reduced by following the switch-mode converter with an active linear regulator. The linear regulator is designed so as to control the operating voltage of the power amplifier with sufficient bandwidth to faithfully reproduce the desired amplitude modulation wave-form. The linear regulator is further designed to reject variations on its input voltage even while the output voltage is changed in response to an applied control signal. This rejection will occur even though the variations on the input voltage are of commensurate or even lower frequency than that of the controlled output variation.

Abstract: This invention, generally speaking, modifies pulse amplitude modulated signals to reduce the ratio of average power to minimum power. The signal is modified in such a manner that the signal quality remains acceptable. The signal quality is described in terms of the Power Spectral Density (PSD) and the Error Vector Magnitude (EVM).

Abstract: This invention controls and modulates switched-mode power amplifiers to enable the production of signals that include amplitude modulation (and possibly, but not necessarily, phase modulation), the average power of which may be controlled over a potentially wide range.

Abstract: Methods of and apparatus for digitally controlling, with sub-sample resolution, the relative timing of the magnitude and phase paths in a polar modulator. The timing resolution is limited by the dynamic range of the system as opposed to the sample rate. The methods and apparatus of the invention use a digital filter to approximate a sub-sample time delay. Various techniques for approximating a sub-sample time delay using digital signal processing may be used to achieve the approximation. Ideally, the filter will have an all-pass magnitude response and a linear phase response. In practice, the magnitude may be low-pass and the phase may not be perfectly linear. Such deviation from the ideal response will introduce some distortion. However, this distortion may be acceptably small depending on the particular signal being processed.

Abstract: The present invention, generally speaking, uses multiple selectable power supply paths, a saturation detector, or combinations of the same to achieve efficient power supply processing. In one aspect of the invention, a power supply processing circuit includes a first switched converter stage and a second linear stage. Depending on the power supply desired, the first stage may be bypassed to avoid conversion losses. In another aspect of the invention, a saturation detector is used to control the first stage such that the second stage operates efficiently just short of saturation, thereby avoiding distortion.

Abstract: The present invention, generally speaking, provides methods and apparatus for producing an amplitude modulated communications signal, in which a constant-envelope carrier signal is modified in response to a power control signal to produce a modified constant-envelope carrier signal. The modified constant-envelope carrier signal is amplified in response to an amplitude modulation signal to produce a communications signal having amplitude modulation and having an average output power proportional to a signal level of the modified constant-envelope carrier signal. This manner of operation allows wide dynamic range of average output power to be achieved. Because amplitude modulation is applied after amplitude varying circuitry used to produce the modified constant-envelope carrier signal, the amplitude modulation is unaffected by possible non-linearities of such circuitry.

Abstract: The present invention, generally speaking, provides a digital circuit and method for forming number streams for frequency and/or phase comparison of digital or digitized signals, referred to herein as clock signals, where typically one of the clock signals is a known clock signal and another of the clock signal is an unknown clock signal. The unknown clock signal may be derived from a communications signal, for example. The rate of the unknown clock signal may exceed the rate of the known clock signal. In an exemplary embodiment, an “alias” value (e.g., an integer 1, 2, 3, etc.) is applied to the circuit as an indication of the expected frequency range of the unknown clock signal. The number stream is formed accordingly.

Abstract: Switchmode DC—DC power converters using one or more non-Silicon-based switching transistors and a Silicon-based (e.g. CMOS) controller are disclosed. The non-Silicon-based switching transistors may comprise, but are not necessarily limited to, III-V compound semiconductor devices such as gallium arsenide (GaAs) metal-semiconductor field effect transistors (MESFETS) or heterostructure FETs such as high electron mobility transistors (HEMTs). According to an embodiment of the invention, the low figure of merit (FoM), ?FET, of the non-Silicon-based switching transistors allows the converters of the present invention to be employed in envelope tracking amplifier circuits of wireless devices designed for high-bandwidth technologies such as, for example, EDGE and UMTS, thereby improving the efficiency and battery saving capabilities of the wireless devices.

Abstract: In a portable dual mode receiver circuit, a dual modulus clock system is provided which can, by selective use of integer division on a multiplied master clock, select specific channels with two different channel spacings in several different bands, providing power and space savings and achieving simplicity of operation.

Abstract: The present invention, generally speaking, achieves noise spreading within a PLL using a dual-modulus prescaler by interleaving the division moduli. Within a given cycle, “ones” and “tens” are not all counted consecutively. Instead, ones and tens are interleaved. In one embodiment of the invention, the R count is doubled and the output of the R counter is toggled between high and low states. (The Q counter may remain unmodified.) In another embodiment of the invention, ones and tens are interleaved in accordance with a ratio q:r. By so interleaving the modulus, the effect is to spread the noise resulting from the output signal of the dual-modulus prescaler over a wider frequency range. The prescaler noise level is greatly reduced, particularly within the frequency band of the reference frequency.

Abstract: The present invention, generally speaking, provides methods and apparatus for producing an amplitude modulated communications signal, in which a constant-envelope carrier signal is modified in response to a power control signal to produce a modified constant-envelope carrier signal. The modified constant-envelope carrier signal is amplified in response to an amplitude modulation signal to produce a communications signal having amplitude modulation and having an average output power proportional to a signal level of the modified constant-envelope carrier signal. This manner of operation allows wide dynamic range of average output power to be achieved. Because amplitude modulation is applied after amplitude varying circuitry used to produce the modified constant-envelope carrier signal, the amplitude modulation is unaffected by possible non-linearities of such circuitry.

Abstract: Methods of and apparatus for distributing power and biasing RF PAs. A power distribution network includes a pre-final amplifier stage power distribution network and a final amplifier stage power distribution network. The pre-final amplifier stage power distribution network includes one or more pre-final amplifier stage power distribution branches, which may be configured to distribute power from one or more pre-final amplifier power supplies to one or more pre-final amplifier stages. Each pre-final amplifier stage power distribution branch comprises a ? C-R-C network coupled to an inductive load. A final amplifier stage power distribution network is configured to distribute power from a final amplifier stage power supply to a final stage of the amplifier circuit.

Abstract: The present invention, generally speaking, provides for control of a modulator, such as a polar modulator or conventional linear modulator, to produce high quality RF signals that ramp quickly from a condition of minimal output power to a condition of information-bearing modulation at a specified output power and back down to the condition of minimal output power. Using a polar modulator, for example, it is theoretically possible to perform ramping without degrading the transient measurements beyond the degradation caused by the information-bearing modulation itself. This ideal can be closely approached in practice. Such ramping can be achieved without the need for extensive unit-by-unit calibration on the manufacturing line.

Abstract: The present invention, generally speaking, provides a time shift angle demodulator that is of simple construction and has an extended linear range. Range extension is achieved by using the input signals directly, not simply post-processing the S-PFD outputs. In accordance with one embodiment of the invention, a method of measuring the phase or frequency of a periodic input signal uses a periodic reference signal and includes comparing the input signal to the reference signal to obtain a lead signal and a lag signal; changing the count of an up/down counter in dependence on the input signal, the reference signal, the lead signal and the lag signal; and using the lead signal, the lag signal and the count signal to produce a phase or frequency signal.

Abstract: The present invention, generally speaking, uses multiple selectable power supply paths, a saturation detector, or combinations of the same to achieve efficient power supply processing. In one aspect of the invention, a power supply processing circuit includes a first switched converter stage and a second linear stage. Depending on the power supply desired, the first stage may be bypassed to avoid conversion losses. In another aspect of the invention, a saturation detector is used to control the first stage such that the second stage operates efficiently just short of saturation, thereby avoiding distortion.