Patents Assigned to Tru-Si Technologies, Inc.
  • Patent number: 6882030
    Abstract: To fabricate contacts on a wafer backside, openings (124) are formed in the face side of the wafer (104). A dielectric layer (140) and some contact material (150), e.g. metal, are deposited into the openings. Then the backside is etched until the contacts (150C) are exposed and protrude out. The protruding portion of each contact has an outer sidewall (150V). At least a portion of the sidewall is vertical or sloped outwards with respect to the opening when the contact is traced down. The contact is soldered to an another structure (410), e.g. a die or a PCB. The solder (420) reaches and at least partially covers the sidewall portion which is vertical or sloped outwards. The strength of the solder bond is improved as a result. The dielectric layer protrudes around each contact. The protruding portion (140P) of the dielectric becomes gradually thinner around each contact in the downward direction.
    Type: Grant
    Filed: January 28, 2002
    Date of Patent: April 19, 2005
    Assignee: Tru-Si Technologies, Inc.
    Inventor: Oleg Siniaguine
  • Patent number: 6844241
    Abstract: In some embodiments, a circuit structure comprises a semiconductor substrate, an opening passing through the substrate between a first side of the substrate and a second side of the substrate, and a plurality of conductive layers in the opening. In some embodiments, one conductive layer provides an electromagnetic shield that shields the substrate from AC signals carried by a contact pad made from another conductive layer on a backside of the substrate. The conductive layers can also be used to form capacitor/rectifier networks. Manufacturing methods also provided.
    Type: Grant
    Filed: August 28, 2001
    Date of Patent: January 18, 2005
    Assignee: Tru-Si Technologies, Inc.
    Inventors: Patrick B. Halahan, Oleg Siniaguine
  • Patent number: 6787916
    Abstract: Semiconductor dies are bonded to contact pads formed in a substrate's cavity. Vias through the substrate open into the cavity. Conductive lines passing through the vias connect the contact pads in the cavity to contact pads on another side of the substrate. A passage in the substrate opens into the cavity and provides an escape or pressure relief path for material filling the cavity. The passage can also be used to introduce material into the cavity.
    Type: Grant
    Filed: September 13, 2001
    Date of Patent: September 7, 2004
    Assignee: Tru-Si Technologies, Inc.
    Inventor: Patrick B. Halahan
  • Patent number: 6759341
    Abstract: To reduce the edge roll off in a semiconductor wafering process, the wafer (110) is subject to a plasma etch with an edge underetch. The edge underetch is achieved by means of a wafer holder (410) that emits gas towards the wafer (e.g. a gas vortex) to draw the wafer towards the holder's body (460). The plasma impinges on the wafer surface (110.1) opposite to the body. Some of the gas emitted by the holder wraps around the wafer edge and dilutes the etchant near the wafer edge. Consequently, the etch proceeds slower near the edge (the edge is underetched). In some embodiments, the wafer is rotated around an axis (440) passing through the wafer to increase the underetch.
    Type: Grant
    Filed: April 9, 2003
    Date of Patent: July 6, 2004
    Assignee: Tru-Si Technologies, Inc.
    Inventor: Chih-Yang Li
  • Patent number: 6753205
    Abstract: Semiconductor dies are bonded to contact pads formed in a substrate's cavity. Vias through the substrate open into the cavity. Conductive lines passing through the vias connect the contact pads in the cavity to contact pads on another side of the substrate. A passage in the substrate opens into the cavity and provides an escape or pressure relief path for material filling the cavity. The passage can also be used to introduce material into the cavity.
    Type: Grant
    Filed: January 27, 2003
    Date of Patent: June 22, 2004
    Assignee: Tru-Si Technologies, Inc.
    Inventor: Patrick B. Halahan
  • Patent number: 6749764
    Abstract: An article which is being processed with plasma is moved during plasma processing so that the motion of the article comprises at least a first rotational motion, a second rotational motion, and a third rotational motion which occur simultaneously. The apparatus that moves the article comprises a first arm rotatable around a first axis, a second arm rotatably attached to the first arm and rotating the article around a second axis, and a rotational mechanism for inducing a rotational motion of the article in addition to, and simultaneously with, the rotation of the first and second arms.
    Type: Grant
    Filed: November 14, 2000
    Date of Patent: June 15, 2004
    Assignee: Tru-Si Technologies, Inc.
    Inventors: Oleg Siniaguine, Sergey Savastiouk, Patrick Halahan, Sam Kao
  • Patent number: 6740582
    Abstract: To fabricate back side contact pads that are suitable for use in a vertical integrated circuit, vias are made in the face side of a wafer, and dielectric and contact pad metal are deposited into the vias. Then the wafer back side is etched until the metal is exposed. When the etch exposes the insulator at the via bottoms, the insulator is etched slower than the wafer material (e.g. silicon). Therefore, when the dielectric is etched off and the metal is exposed, the dielectric protrudes down from the wafer back side around the exposed metal contact pads, by about 8 &mgr;m in some embodiments. The protruding dielectric portions improve insulation between the wafer and the contact pads when the contact pads are soldered to an underlying circuit. In some embodiments, before the contact pads are soldered, additional dielectric is grown on the wafer back side without covering the contact pads.
    Type: Grant
    Filed: April 26, 2002
    Date of Patent: May 25, 2004
    Assignee: Tru-Si Technologies, Inc.
    Inventor: Oleg Siniaguine
  • Patent number: 6730540
    Abstract: A clock distribution network (110) is formed on a semiconductor interposer (320) which is a semiconductor integrated circuit. An input terminal (120) of the clock distribution network is formed on one side of the interposer, and output terminals (130) of the clock distribution network are formed on the opposite side of the interposer. The interposer has a through hole (360), and the clock distribution network includes a conductive feature going through the through hole. The side of the interposer which has the output terminals (130) is bonded to a second integrated circuit (310) containing circuitry clocked by the clock distribution network. The other side of the interposer is bonded to a third integrated circuit or a wiring substrate (330). The interposer contains a ground structure, or ground structures (390, 510), that shield circuitry from the clock distribution network. Conductive lines (150) in an integrated circuit are formed in trenches (610) in a semiconductor substrate.
    Type: Grant
    Filed: April 18, 2002
    Date of Patent: May 4, 2004
    Assignee: Tru-Si Technologies, Inc.
    Inventor: Oleg Siniaguine
  • Patent number: 6717254
    Abstract: In some embodiments, a fabrication method comprises: forming a structure that has one or more substrates, wherein the one or more substrates are either a single substrate or a plurality of substrates bonded together, wherein the structure comprises a non-electronically-functioning component which includes at least a portion of the one or more substrates and/or is attached to the one or more substrates; wherein the one or more substrates include a first substrate which has: a first side, an opening in the first side, and a conductor in the opening; wherein the method comprises removing material from the structure so that the conductor becomes exposed on a second side of the first substrate. In some embodiments, the second side is a backside of the first substrate, and the exposed conductor provides backside contact pads.
    Type: Grant
    Filed: February 22, 2001
    Date of Patent: April 6, 2004
    Assignee: Tru-Si Technologies, Inc.
    Inventor: Oleg Siniaguine
  • Patent number: 6693361
    Abstract: A first level packaging wafer is made of a semiconductor or insulating material. The bumps on the wafer are made using vertical integration technology, without solder or electroplating. More particularly, vias are etched part way into a first surface of the substrate. Metal is deposited into the vias. Then the substrate is blanket-etched from the back side until the metal is exposed and protrudes from the vias to form suitable bumps. Dicing methods and vertical integration methods are also provided. Solder or electroplating are used in some embodiments.
    Type: Grant
    Filed: November 16, 2000
    Date of Patent: February 17, 2004
    Assignee: Tru-Si Technologies, Inc.
    Inventors: Oleg Siniaguine, Sergey Savastiouk
  • Patent number: 6688662
    Abstract: An end-effector includes multiple vortex chucks for supporting a wafer. Vortex chucks are located along the periphery of the end-effector to help prevent a flexible wafer from curling. The end-effector has limiters to restrict the lateral movement of a supported wafer. In one example, the end-effector has a detector for detecting the presence of a wafer. The detector is mounted at a shallow angle to allow the end-effector to be positioned close to a wafer to be picked-up, thereby allowing detection of deformed wafers contained in a wafer cassette. The shallow angle of the detector also minimizes the thickness of the end-effector. Also disclosed is a wafer station with features similar to that of the end-effector.
    Type: Grant
    Filed: April 2, 2002
    Date of Patent: February 10, 2004
    Assignee: Tru-Si Technologies, Inc.
    Inventors: Sean A. Casarotti, Alexander J. Berger, Frank E. Kretz
  • Patent number: 6667242
    Abstract: The present invention comprises a brim surrounding a wafer or wafer-like object during plasma etching in a non-contact wafer holder, such brim facilitating uniform flow of the plasma discharge around the edge of the wafer during plasma etching. The brim of the present invention avoids plasma instability and non-uniform flow typical of conventional plasma etching near the edges of the wafer being etched. The brim of the present invention, by facilitating uniform and stable plasma flows, decreases non-uniform etching. One embodiment of the present invention permits the brim to move in the axial direction from a position substantially. This permits the etching process to be controlled for more uniform and precise wafer etching as lowering the brim tends to shadow the edge region of the wafer from the plasma, reducing etching in the edge region while not significantly affecting etching in the central regions of the wafer.
    Type: Grant
    Filed: January 8, 2001
    Date of Patent: December 23, 2003
    Assignee: Tru-Si Technologies, Inc.
    Inventors: Oleg Siniaguine, Sergey Savastiouk, Alex Berger
  • Patent number: 6665583
    Abstract: An article holder has sensors that detect whether an article held in the holder is a workpiece or a piece of packaging material. Examples are end effectors suitable for picking up semiconductor wafers and packaging material from a pod or some other carrier.
    Type: Grant
    Filed: October 4, 2002
    Date of Patent: December 16, 2003
    Assignee: Tru-Si Technologies, Inc.
    Inventors: Frank E. Kretz, Alexander J. Berger, Sean A. Casarotti
  • Patent number: 6638004
    Abstract: An article holder has protrusions that contact the article. The friction between the protrusions and the article impedes the article movement relative to the holder yet allows the article to slide when the article is pushed against some object. The article is pushed against the object in order to position the article more precisely.
    Type: Grant
    Filed: July 13, 2001
    Date of Patent: October 28, 2003
    Assignee: Tru-Si Technologies, Inc.
    Inventors: Alexander J. Berger, Frank E. Kretz, Sean A. Casarotti
  • Patent number: 6631935
    Abstract: An end-effector includes multiple vortex chucks for supporting a wafer. Vortex chucks are located along the periphery of the end-effector to help prevent a flexible wafer from curling. The end-effector has limiters to restrict the lateral movement of a supported wafer. In one example, the end-effector has a detector for detecting the presence of a wafer. The detector is mounted at a shallow angle to allow the end-effector to be positioned close to a wafer to be picked-up, thereby allowing detection of deformed wafers contained in a wafer cassette. The shallow angle of the detector also minimizes the thickness of the end-effector. Also disclosed is a wafer station with features similar to that of the end-effector.
    Type: Grant
    Filed: August 4, 2000
    Date of Patent: October 14, 2003
    Assignee: Tru-Si Technologies, Inc.
    Inventors: Sean A. Casarotti, Alexander J. Berger, Frank E. Kretz
  • Patent number: 6627039
    Abstract: To move an article in and out of plasma during plasma processing, the article is rotated by a first drive around a first axis, and the first drive is itself rotated by a second drive. As a result, the article enters the plasma at different angles for different positions of the first axis. The plasma cross-section at the level at which the plasma contacts the article is asymmetric so that those points on the article that move at a greater linear velocity (due to being farther from the first axis) move longer distances through the plasma. As a result, the plasma processing time becomes more uniform for different points on the article surface. In some embodiments, two shuttles are provided for loading and unloading the plasma processing system. One of the shuttles stands empty waiting to unload the processed articles from the system, while the other shuttle holds unprocessed articles waiting to load them into the system.
    Type: Grant
    Filed: April 3, 2000
    Date of Patent: September 30, 2003
    Assignee: Tru-Si Technologies, Inc.
    Inventor: Oleg Siniaguine
  • Patent number: 6615113
    Abstract: An article holder has sensors that detect whether an article held in the holder is a workpiece or a piece of packaging material. Examples are end effectors suitable for picking up semiconductor wafers and packaging material from a pod or some other carrier.
    Type: Grant
    Filed: July 13, 2001
    Date of Patent: September 2, 2003
    Assignee: Tru-Si Technologies, Inc.
    Inventors: Frank E. Kretz, Alexander J. Berger, Sean A. Casarotti
  • Patent number: 6541729
    Abstract: A plasma apparatus separately measures multiple plasma jets upstream of where the plasma jets converge into a combined plasma stream. The separate plasma jets can be separately adjusted to place the separate jets in a configuration that provides the combined stream with desired properties for a plasma treatment. The system can include an injector for a neutral jet that becomes part of the combined plasma stream. With an injector, the positions of the plasma jets can be measured relative to the injector so that the plasma jets and the neutral jet are properly aligned to form a combine plasma stream having the properties desired.
    Type: Grant
    Filed: August 2, 2001
    Date of Patent: April 1, 2003
    Assignee: Tru-Si Technologies, Inc.
    Inventor: Oleg Siniaguine
  • Publication number: 20030018410
    Abstract: An article holder has sensors that detect whether an article held in the holder is a workpiece or a piece of packaging material. Examples are end effectors suitable for picking up semiconductor wafers and packaging material from a pod or some other carrier.
    Type: Application
    Filed: July 13, 2001
    Publication date: January 23, 2003
    Applicant: Tru-Si Technologies, Inc.
    Inventors: Frank E. Kretz, Alexander J. Berger, Sean A. Casarotti
  • Publication number: 20030014158
    Abstract: A wafer or some other article is aligned while being held by an end-effector.
    Type: Application
    Filed: July 13, 2001
    Publication date: January 16, 2003
    Applicant: Tru-Si Technologies, Inc.
    Inventors: Alexander J. Berger, Frank E. Kretz