Abstract: A method and apparatus for processing and encoding video data is presented that allocates available bandwidth, and hence image quality, in dependence upon the relative speed of motion of objects in a sequence of images forming the video data. Fast moving objects are allocated less quality, or precision, than slower moving or stationary objects. In a preferred embodiment of this invention, the quantization step size is dependent upon the magnitude of the motion vector associated with each block in each frame of a video sequence. In a further embodiment of this invention, the quantization step size is also dependent upon the location of each block in each frame, providing more precision to a central area of each frame. To reduce computational complexity, a motion activity map is created to identify areas of higher precision based upon the location and motion associated with each block.

Abstract: Multiword information is based on multibit symbols disposed in relative contiguity with respect to a medium, and is encoded with a wordwise interleaving and wordwise error protection code for providing error locative clues across multiword groups. In particular, the clues originate in high protectivity clue words (BIS) that are interleaved among clue columns, and also in synchronizing columns constituted from synchronizing bit groups. The synchronizing columns are located where the clue columns are relatively scarcer disposed. The clues are directed to low protectivity target words (LDS) that are interleaved in a substantially uniform manner among target columns which form uniform-sized column groups between periodic arrangements of clue columns and synchronizing columns.

Abstract: A data carrier (1) which can be operated in a contact-bound mode and in a contactless mode and a circuit (1A) for such a data carrier (1) has supply voltage generating means (35), for deriving a supply voltage (VDD) for various circuit sections of the data carrier (1) and of the circuit (1A) from a received useful HF signal (HF), and additional switching means (91) by means of which the application of a potential (VDD), which appears as a result of the supply voltage generated by the supply voltage generating means (35), to at least one contact terminal (17A) can be inhibited.

Abstract: The method and apparatus are used for cryptographically converting a digital input block into a digital output block. The apparatus 400 comprises first input means 410 for obtaining the digital input block and second input means 440 for obtaining a key K1. Cryptographic processing means 420 of the apparatus 400 convert the digital input block into the digital output block by merging a selected part M1 of the digital input block with the key K1 and producing a data block B1 which non-linearly depends on M1 and K1. The merging is performed in one, sequentially inseparable step. Output means 430 are used to output the digital output block of which a selected part is derived from B1.

Abstract: Digital signals are recorded in sequential tracks on a tape-form recording medium. In the case where the digital signals are recorded in accordance with a first recording format, at least first digital signals for normal reproduction are recorded in a single area of the first format on each track. In the case where the digital signals are recorded in accordance with at least a second recording format, at least the first digital signals are recorded in a specific area among divided areas of the second format, the divided areas being rewritable independently on each track, the specific area being common for both the first and second formats. And, second digital signals for special reproduction are recorded in previously determined areas among recording areas on each track, the recording areas being common for both the first and second formats.

Abstract: A luminaire (1) comprises a housing (10) with a light emission window (11), and at least one lighting module (2) accommodated in the housing for illuminating an object. The lighting module comprises a set of lighting units (20) which each comprise at least an LED chip (30) and an optical system (40) coupled thereto. The lighting units illuminate respective portions of an object. The LED chips supply a luminous flux of at least 5 lm each.

Abstract: It is often desirable to display characters with a border. This border is generated on-line in accordance with the invention in that for each instantaneous raster line preceding and succeeding raster lines are read and column-wise combined in conformity with the desired border, said combined information being step-wise delayed by a number of raster points. The delayed signals are combined in conformity with the side selected for the border and with the border width, and produce the border signal after suppression at the areas where character information is to be displayed. As a result, aribtrary character shapes can be provided with a selectable border, it only being necessary to store these character shapes without border. Also described is a simple device for carrying out such a method.

Abstract: A multimedia message is formatted for presentation. First a formatted choice menu is presented for various multimedia categories in parallel. Upon one or more user selections in series, to each selection a monomedium item space is offered for enabling to enter an item for to the associated monomedium into that space. After termination of all selections, the message is formatted for transfer. In particular, the choice menu has various selector spots, each associated to a respective monomedium. After entering a particular user item into the associated space, a symbolizer of that item is displayed at a predetermined position next to any remaining selector spot in the menu.

Abstract: The invention relates to a reflective flat-panel color display device (1) having a diffusing display panel (3). The display panel (3) comprises a diffusing liquid crystalline material (5) present between a first and a second substrate (7, 9). A color filter pattern (15) which corresponds to the pixel pattern of the display panel (3) is present between the liquid crystalline material (5) and the second substrate (9). A diffusing reflector is present at the side of the color filter pattern (15) remote from the liquid crystalline material (5). In another embodiment, a reflector (17), which has a diffusing or non-diffusing effect, is present outside the display panel (3) and a forward diffuser (33) is arranged between this reflector (17) and the display panel (3).

Abstract: Support device (53) provided with a first part (69) and a second part (71) which is supported relative to the first part by means of a gas spring (73) having a pressure chamber (75). A gas supply (117), which compensates for gas leakage from the pressure chamber (75) during operation, is connected to an intermediate space (119) which is in communication with the pressure chamber (75) via a pneumatic restriction (121). The gas pressure present in the intermediate space (119) is held as constant as possible during operation by means of a control loop (123), to prevent transmission of pressure fluctuations which are present in the gas supply (117) to the pressure chamber (75) as much as possible. Such pressure fluctuations are undesirable in the pressure chamber because they cause mechanical vibrations in the second part of the support device and the device to be supported.

Abstract: A circuit for testing the leakage resistance of a circuit point. Particularly in the case of circuits where safety is important, a circuit point, particularly an output terminal of an integrated circuit, should be tested for a leakage resistance relative to ground and/or a voltage to provide an early detection of an imminent failure condition. To this end, at least one test current is fed into the circuit point and the voltage at the circuit point is monitored by means of a comparator. When the leakage resistance decreases below a permissible value the voltage at the circuit point decreases, which can be detected by the comparator. For monitoring a leakage resistance relative to both poles two opposite test currents are applied and the comparator is constructed as a window comparator.

Abstract: An apparatus and method for recording an information signal on a record carrier by means of a radiation beam which produces optically detectable marks in parallel track portions thereon having a substantially constant track pitch (q). The write intensity of the radiation beam is adjusted to an optimum level which results in a width (p) of the optical marks which corresponds to the track pitch (q). The optimum intensity level is determined by recording different test signals in adjoining track portions at various write intensities of the radiation beam, reading-out the recorded test signals, and detecting therefrom the write intensity at which signal components of one test signal no longer occur in another recorded test signal. Recording at the optimum write intensity results in a minimum block error rate (BLER) upon read-out of the recorded information signal.

Abstract: A cathode-sputtering apparatus for the surface-coating of objects has a vacuum chamber which contains a helium-group gas, in which chamber a target cathode and an anode are arranged. A voltage for producing plasma discharges is applied to these electrodes and a magnetic field is applied, which intensifies the plasma discharges and concentrates them at the location of the target cathode. For measuring a critical target-consumption condition, at least one probe is provided in the target cathode, which probe is actuated when the target material is eroded up to the probe.

Abstract: For manufacturing an implantation mask on a semiconductor surface which is provided with grooves, a positive photoresist is provided on the surface. Portions of the photoresist which are to form the implantation mask are illuminated in a first step and rendered insoluble in the developer in an image reversal step. The photoresist is then illuminated without mask and developed, so that the portions not illuminated during the first step are removed. The implantation mask thus obtained has a receding profile, the openings at the area of the grooves becoming wider in the direction of the bottom of the grooves.

Abstract: A semiconductor device includes a semiconductor structure (D3) of parallel semiconductor layers on a semiconductor substrate (1), in which layers a mesa (12) is formed which includes only a portion (D1) of the semiconductor layer structure (D3). Such devices as are useful in optoelectronic devices in which the mesa (12) forms part of a semiconductor diode laser or a radiation waveguide. During cleaving of such devices, for example for the formation of a mirror surface, damage often arises near the mesa (12), which is undesirable. The mesa (12), which projects from the device, is also easily damaged during further manipulation of the device. The semiconductor layer structure (D3) includes a sunken region (11) within which the semiconductor layer structure (D3) is at least partly recessed in the substrate (1), while the mesa (12) is positioned within the boundaries of the sunken region (11). As a result, the mesa (12) is also recessed at least partly, and thus is at least partly protected.

Abstract: A semiconductor memory includes non-volatile memory cells which can be electrically programmed and erased by means of tunnel current (EEPROM) with a floating-gate transistor, the cell being arranged in memory cell groups of n lines and m columns each, n cells being connected in series, which serial connection forms the bit line for the columns of a cell block. The control gate is common to m memory cells of one line of the cell block situated next to one another and forms the word line for the line in the memory cell group. The floating gate does not extend over the entire width of the channel, so that in each memory cell a parallel transistor is formed which is connected in parallel to the floating-gate transistor and is controlled only by the control gate, which parallel transistor is conducting during reading for each non-selected cell. As a result, the problem of over-erasing is solved even in the case of short access times, without an additional access transistor being required.

Abstract: In an electron optical system a monopole shaped magnetic field is introduced enabling an aberration free imaging writing or detection in the system. Apparatus based on this field distribution result in improved secondary electron detection such as for chip inspection, in improved resolution in Auger electron detection for analysis, in a higher exactness in chip production in an electron beam pattern generator and in an electron beam image projector in which now also size reduction can aberration free be introduced.

Abstract: A distributed threshold voltage TFT has a first FET and a second FET connected in series with the first point between the first and the second FET via a series circuit of a first capacitance and a second capacitance. The gate of the second FET is connected to the junction point between the first and the second capacitance and to the gate of the first FET via a non-linear resistance with a low R.sub.on and a high R.sup.off. Leakage currents can be kept very low in this DTV FET without an extra external voltage and/or without extra doping.

Abstract: A method of manufacturing a semiconductor device whereby a layer (3) containing aluminium is deposited by means of a sputter deposition process on a surface (1) of a semiconductor body (2) which is placed on a holder (21) in a reaction chamber (20). The semiconductor body (2) is cooled down to a temperature below 150 K. during the deposition process. A smooth, flat layer with a good step coverage is deposited in this way.

Abstract: A circuit which responds to the application of a pulse to its input (6) by generating a pulse at its output (3), the output pulse having a minimum duration T and being extended by the remaining length of the input pulse should the input pulse be still present at the end of the time T, comprises a pair of semiconductor switches (1,2) connecting the output (3) to points (5,4) carrying respective logic levels. The input pulse closes the first switch (1) and also inhibits a gate circuit (9). The resulting logic level on the output (3) closes the second switch (2) after delay by T in a delay circuit (13) and transmission through the gate circuit (9), thereby restoring the original logic level. The instant when this occurs coincides with the presence of the delayed output pulse at the output (14) of the delay circuit and the absence of the pulse at the arrangement input (6). A hold circuit circuit (15) may be provided for holding the logic level currently present at the output (3).