Abstract: A circuit board device includes a transition region that includes a first conductive layer at a first level, a second conductive layer at a second level, and conductive vias. The first conductive layer includes a pad connected to the solderless connector, a transmission line, and a first reference layer. The transmission line includes first and second segments. A second width of the second segment is the same as or less than a first width of the first segment. The first reference layer has a first anti-pad region for the pad and the transmission line disposed therein. In a plan view, the first anti-pad region surrounding the pad is completely located within a second anti-pad region of a second reference layer of the second conductive layer. The conductive vias are disposed between the first and second conductive layers and surround the pad.

Abstract: A package carrier includes a circuit structure layer and a heat-conducting element. The circuit structure layer includes a notch portion. The heat-conducting element includes a first heat-conducting portion and a second heat-conducting portion vertically connected to the first heat-conducting portion. The notch portion exposes the first heat-conducting portion, and an outer surface of the second heat-conduction portion is aligned with a side surface of the circuit structure layer.

Abstract: A circuit board structure and a manufacturing method thereof. Circuit board structure includes first circuit board, second circuit board, conductive coil, magnetic body and molding compound. First circuit board has first side surface and first cavity located on first side surface. Second circuit board has second side surface facing first side surface and being spaced apart from first side surface. Conductive coil is in a spiral shape and includes first coil pattern and second coil pattern. First coil pattern is disposed in first circuit board. Second coil pattern is disposed in second circuit board. First coil pattern is electrically connected to second coil pattern. Magnetic body is filled in first cavity of first circuit board. Conductive coil surrounds at least a part of magnetic body. Molding compound is filled in a gap between first side surface and second side surface.

Abstract: A circuit board structure including a first circuit board, a second circuit board, a conductive coil and a first molding compound and a manufacturing method thereof. The first circuit board has a first side surface. The second circuit board has a second side surface facing the first side surface and being spaced apart from the first side surface. The conductive coil is in a spiral shape and includes a first coil pattern and a second coil pattern. The first coil pattern is disposed in the first circuit board. The second coil pattern is disposed in the second circuit board. The first coil pattern is electrically connected to the second coil pattern. The first molding compound is magnetic and filled in a gap located between the first side surface and the second side surface. The conductive coil surrounds at least a part of the first molding compound.

Abstract: A co-packaged structure for optics and electrics includes a substrate, an optical module and an electrical connection layer. The optical module includes a carrier and an optical transceiver unit. The carrier is mounted on the substrate. The optical module is mounted on the carrier. The electrical connection layer is mounted on the substrate, and the carrier is electrically connected with a circuitry on the substrate through the electrical connection layer. A plurality of fiber accommodation through hole are formed on the substrate and correspond to the optical transceiver unit.

Abstract: A circuit board structure includes a substrate, a first build-up structure layer, first and second external circuit layers, at least one first conductive via, and second conductive vias. The first build-up structure layer is disposed on a first circuit layer of the substrate. The first external circuit layer is disposed on the first build-up structure layer. The second external circuit layer is disposed on a second circuit layer and a portion of a third dielectric layer of the substrate. The first conductive via is electrically connected to the first external circuit layer and the second external circuit layer to define a signal path. The second conductive vias surround the first conductive via, and the first external circuit layer, the second conductive vias, the first circuit layer, the outer conductive layer, and the second external circuit layer define a first ground path. The first ground path surrounds the signal path.

Abstract: A transmission device for suppressing the glass-fiber effect includes a circuit board and a transmission line. The circuit board includes a plurality of glass fibers, so as to define a fiber pitch. The transmission line is disposed on the circuit board. The transmission line includes a plurality of non-parallel segments. Each of the non-parallel segments of the transmission line has an offset distance with respect to a reference line. The offset distance is longer than or equal to a half of the fiber pitch.

Abstract: A substrate structure and a cutting method thereof are provided. The cutting method includes the following steps. A first substrate structure is provided, wherein the first substrate structure includes a glass substrate and a redistribution layer disposed on the glass substrate. A laser process is performed on the glass substrate to form a modified region on the glass substrate. A wet etching process is performed on the modified region of the glass substrate to remove the modified region and form a plurality of second substrate structures.

Abstract: A circuit board structure includes a circuit substrate, a first circuit layer, and a second circuit layer. The circuit substrate has a surface and includes at least one conductive structure and at least one patterned circuit layer. The conductive structure is electrically connected to the patterned circuit layer, and an upper surface of the conductive structure is aligned with the surface. The first circuit layer is directly disposed on the surface of the circuit substrate and electrically connected to the conductive structure. A line width of the first circuit layer is less than or equal to 1/4 of a line width of the patterned circuit layer. The second circuit layer is directly disposed on the first circuit layer and electrically connected to the first circuit layer.

Abstract: A circuit board, comprising a multi-layer circuit board, a first conductive circuit, a first circuit layer, an adhesion promoter layer, a second conductive circuit, and a second circuit layer. The multi-layer circuit board comprises an inner circuit and an opening. The opening exposes the inner circuit. The first conductive circuit is disposed in the opening and on the inner circuit. The first circuit layer is disposed on the first conductive circuit in the opening and lower than the depth of the opening. The adhesion promoter layer is disposed in the opening and on the surface of the multi-layer circuit board and connected to the first conductive circuit. The second conductive circuit is disposed on the adhesion promoter layer and on the first circuit layer in the opening. The second circuit layer is disposed on the second conductive circuit in the opening and on the second conductive circuit.

Abstract: A manufacturing method of the circuit board includes the following steps. A metal layer, a first substrate, a second substrate, and a third substrate are laminated. Multiple blind holes and a through hole are formed. A conductive material layer is formed, which covers the metal layer, the conductive layer of the third substrate, and an inner wall of the through hole, and fills the blind holes to define multiple conductive holes. The conductive material layer, the metal layer, and the conductive layer are patterned to form a first external circuit layer located on the first substrate and electrically connected to the conductive pillars, and a second external circuit layer located on the insulating layer and electrically connected to the conductive holes, and define a conductive through hole structure connecting the first external circuit layer and the second external circuit layer and located in the through hole.

Abstract: A package structure includes a substrate, a plurality of conductive pads, a light-emitting diode, a photo imageable dielectric material, and a black matrix. The substrate includes a top surface. The conductive pads are located on the top surface of the substrate. The light-emitting diode is located on the conductive pads. The photo imageable dielectric material is located between the light-emitting diode and the top surface of the substrate and between the conductive pads. An orthogonal projection of the light-emitting diode on the substrate is overlapped with an orthogonal projection of the photo imageable dielectric material on the substrate. The black matrix is located on the top surface of the substrate and the conductive pads.

Abstract: A circuit board includes a first external circuit layer, a first substrate, a second substrate, a third substrate, and a conductive through hole structure. The first substrate includes conductive pillars electrically connecting the first external circuit layer and the second substrate. The second substrate has an opening and includes a first dielectric layer. The opening penetrates the second substrate, and the first dielectric layer fills the opening. The third substrate includes an insulating layer, a second external circuit layer, and conductive holes. A conductive material layer of the conductive through hole structure covers an inner wall of a through hole and electrically connects the first and the second external circuit layers to define a signal path. The first external circuit layer, the conductive pillars, the second substrate, the conductive holes and the second external circuit layer are electrically connected to define a ground path surrounding the signal path.

Abstract: Provided is a manufacturing method of circuit board, including a first substrate, a second substrate, a third substrate, a fourth substrate, multiple conductive structures, and a conductive via structure. The third substrate has an opening and includes a first dielectric layer. The opening penetrates the third substrate, and the first dielectric layer fills the opening. Multiple conductive structures are formed so that the first substrate, the second substrate, the third substrate, and the fourth substrate are electrically connected through the conductive structures to define a ground path. A conductive via structure is formed to penetrate the first substrate, the second substrate, the first dielectric layer of the third substrate, and the fourth substrate. The conductive via structure is electrically connected to the first substrate and the fourth substrate to define a signal path, and the ground path surrounds the signal path.

Abstract: The invention provides a circuit board structure and a manufacturing method thereof. The circuit board structure includes a line portion, a first insulating layer, and a conductive terminal. The first insulating layer is disposed on the line portion. The conductive terminal is disposed on the first insulating layer and embedded in the first insulating layer to be electrically connected with the line portion. The conductive terminal includes a first portion, a second portion, and a third portion. The first portion protrudes from a surface of the first insulating layer. The second portion is embedded in the first insulating layer and connected to the first portion. The third portion is disposed between the line portion and the second portion. A width of the second portion is greater than a width of the third portion.

Abstract: Disclosed is a package structure including a circuit board, a co-packaged optics (CPO) substrate, an application specific integrated circuit (ASIC) assembly, a glass interposer, an electronic integrated circuit (EIC) assembly, a photonic integrated circuit (PIC) assembly, and an optical fiber assembly. The CPO substrate is configured on the circuit board, and the ASIC assembly is configured on the CPO substrate. The glass interposer is configured on the CPO substrate and includes an upper surface, a lower surface, a cavity, and at least one through glass via (TGV). The EIC assembly is configured on the upper surface of the glass interposer and electrically connected to the glass interposer. The PIC assembly is configured in the cavity of the glass interposer and electrically connected to the glass interposer. The optical fiber assembly is configured on the lower surface of the glass interposer and optically connected to the PIC assembly.

Abstract: A circuit board structure includes a carrier, a thin film redistribution layer disposed on the carrier, solder balls electrically connected to the thin film redistribution layer and the carrier, and a surface treatment layer. The thin film redistribution layer includes a plurality of pads, a first dielectric layer, a first metal layer, a second dielectric layer, a second metal layer, and a third dielectric layer. A plurality of first openings of the first dielectric layer expose part of the pads, and a first surface of the first dielectric layer is higher upper surfaces of the pads. The solder balls are disposed in a plurality of third openings of the third dielectric layer and are electrically connected to the second metal layer and the carrier. The surface treatment layer is disposed on the upper surfaces, and a top surface of the surface treatment layer is higher than the first surface.

Abstract: A chip package structure includes a package carrier, a plurality of chips, a bridge and a plurality of solder balls or C4 bumps. The package carrier includes a plurality of carrier pads. The chips are arranged side by side on the package carrier. Each of the chips includes a plurality of first pads and a plurality of second pads. The bridge is located between the chips and the package carrier and includes a plurality of bridge pads. Each of the first pads is hybrid bonded with each of the bridge pads to form a hybrid bonding pad, so that the chips are electrically connected to each other through the bridge. The solder balls are located between the package carrier and the chips. The second pads of each of the chips are electrically connected to the carrier pads of the package carrier through the solder balls.

Abstract: A circuit board structure includes a carrier, a thin film redistribution layer disposed on the carrier, solder balls electrically connected to the thin film redistribution layer and the carrier, and a surface treatment layer. The thin film redistribution layer includes a first dielectric layer, pads, a first metal layer, a second dielectric layer, a second metal layer, and a third dielectric layer. A top surface of the first dielectric layer is higher than an upper surface of each pad. The first metal layer is disposed on a first surface of the first dielectric layer. The second dielectric layer has second openings exposing part of the first metal layer. The second metal layer extends into the second openings and is electrically connected to the first metal layer. The third dielectric layer has third openings exposing part of the second metal layer. The surface treatment layer is disposed on the upper surfaces.

Abstract: The present disclosure provides a circuit board and its manufacturing method. The circuit board includes a first circuit layer, a first conductive post, and a second circuit layer. The first circuit layer includes a first pad and a first seed layer covering a sidewall of the first pad. The first conductive post is on the first pad and directly connected to the first pad. The second circuit layer includes a second pad and a second seed layer covering a sidewall of the second pad. The second pad is on a first connecting end of the first conductive post. The first connecting end is embedded in the second pad, and the second pad is connected to and directly contacts the first connecting end. The first seed layer and the second seed layer do not extend on a sidewall of the first conductive post.