Abstract: A circuit board structure includes a carrier, a thin film redistribution layer disposed on the carrier, solder balls electrically connected to the thin film redistribution layer and the carrier, and a surface treatment layer. The thin film redistribution layer includes a plurality of pads, a first dielectric layer, a first metal layer, a second dielectric layer, a second metal layer, and a third dielectric layer. A plurality of first openings of the first dielectric layer expose part of the pads, and a first surface of the first dielectric layer is higher upper surfaces of the pads. The solder balls are disposed in a plurality of third openings of the third dielectric layer and are electrically connected to the second metal layer and the carrier. The surface treatment layer is disposed on the upper surfaces, and a top surface of the surface treatment layer is higher than the first surface.

Abstract: A circuit board structure includes a carrier, a thin film redistribution layer disposed on the carrier, solder balls electrically connected to the thin film redistribution layer and the carrier, and a surface treatment layer. The thin film redistribution layer includes a first dielectric layer, pads, a first metal layer, a second dielectric layer, a second metal layer, and a third dielectric layer. A top surface of the first dielectric layer is higher than an upper surface of each pad. The first metal layer is disposed on a first surface of the first dielectric layer. The second dielectric layer has second openings exposing part of the first metal layer. The second metal layer extends into the second openings and is electrically connected to the first metal layer. The third dielectric layer has third openings exposing part of the second metal layer. The surface treatment layer is disposed on the upper surfaces.

Abstract: A transmission device includes a daisy chain structure composed of at least three daisy chain units arranged periodically and continuously. Each of the daisy chain units includes first, second and third conductive lines, and first and second conductive pillars. The first and second conductive lines at a first layer extend along a first direction and are discontinuously arranged. The third conductive line at a second layer extends along the first direction and is substantially parallel to the first and second conductive lines. The first conductive pillar extends in a second direction. The second direction is different from the first direction. A first part of the first conductive pillar is connected to the first and third conductive lines. The second conductive pillar extends in the second direction. A first part of the second conductive pillar is connected to the second and third conductive lines.

Abstract: A transmission device for suppressing the glass-fiber effect includes a circuit board and a transmission line. The circuit board includes a plurality of glass fibers, so as to define a fiber pitch. The transmission line is disposed on the circuit board. The transmission line includes a plurality of non-parallel segments. Each of the non-parallel segments of the transmission line has an offset distance with respect to a reference line. The offset distance is longer than or equal to a half of the fiber pitch.

Abstract: A light emitting diode (LED) package structure includes a glass substrate, conductive through holes, active elements, an insulating layer, LEDs and pads. The glass substrate has an upper surface and a lower surface. The conductive through holes penetrate the glass substrate and connect the upper and the lower surfaces. The active elements are disposed on the upper surface of the glass substrate and electrically connected to the conductive through holes. The insulating layer is disposed on the upper surface and covers the active elements. The LEDs are disposed on the insulating layer and electrically connected to at least one of the active elements. The pads are disposed on the lower surface of the glass substrate and electrically connected to the conductive through holes. A source of at least one active elements is directly electrically connected to at least one of the corresponding pads through the corresponding conductive through hole.

Abstract: A circuit board structure is provided. The circuit board structure includes a via hole, a conductive layer, and an alternate stacking of a plurality of circuit layers and a plurality of insulating layers. The via hole penetrates through the plurality of circuit layers and the plurality of insulating layers. The lateral ends of the plurality of insulating layers form the sidewall of the via hole. The conductive layer is conformally disposed within the via hole. The conductive layer exposes the first region of the sidewall and covers the second region of the sidewall. The sidewall extends in the longitudinal direction of the via hole and has no misalignments in the radial direction.

Abstract: A circuit board structure includes a circuit substrate having opposing first and second sides, a redistribution structure disposed at the first side, and a dielectric structure disposed at the second side. The circuit substrate includes a first circuit layer disposed at the first side and a second circuit layer disposed at the second side. The redistribution structure is electrically coupled to the circuit substrate and includes a first leveling dielectric layer covering the first circuit layer, a first thin-film dielectric layer disposed on the first leveling dielectric layer and having a material different from the first leveling dielectric layer, and a first redistributive layer disposed on the first thin-film dielectric layer and penetrating through the first thin-film dielectric layer and the first leveling dielectric layer to be in contact with the first circuit layer. The dielectric structure includes a second leveling dielectric layer disposed below the second circuit layer.

Abstract: A method of a circuit signal enhancement of a circuit board comprises the following steps: forming a first substrate body with a first signal transmission circuit layer and a second substrate body with a second signal transmission circuit layer; forming a first signal enhancement circuit layer and a second signal enhancement circuit layer on the first substrate body and the second substrate body; forming a third substrate body with a third signal transmission circuit layer and a fourth substrate body with a fourth signal transmission circuit layer on the carrier; separating the third substrate body and the fourth substrate body from the carrier; combining the first signal transmission circuit layer and the third signal transmission circuit layer through the first signal enhancement circuit layer; and combining the second signal transmission circuit layer and the fourth signal transmission circuit layer through the second signal enhancement circuit layer.

Abstract: A circuit board includes a conductive metal layer, at least one insulating layer, at least one thermally conductive insulating layer and a heat dissipation element. The conductive metal layer is mainly used to transmit electronic signals. The insulating layer is connected to the conductive metal layer. The thermally conductive insulating layer is sandwiched between the conductive metal layer and the insulating layer, and thermally contacts the conductive metal layer, and is used for thermally conducting the heat of the conductive metal layer. The heat dissipation element is in thermal contact with the thermally conductive insulating layer, and is used to conduct the heat of the thermally conductive insulating layer to the outside through a heat dissipation channel.

Abstract: A manufacturing method of a light emitting diode (LED) package structure includes the following steps. A carrier is provided. A redistribution layer is formed on the carrier. A plurality of active devices are formed on the carrier. A plurality of LEDs are transferred on the redistribution layer. The LEDs and the active devices are respectively electrically connected to the redistribution layer. The active devices are adapted to drive the LEDs, respectively. A molding compound is formed on the redistribution layer to encapsulate the LEDs. The carrier is removed to expose a bottom surface of the redistribution layer.

Abstract: This disclosure provides a circuit board assembly and a manufacturing method thereof. The circuit board assembly includes circuit board, embedded chip, heat dissipation assembly and temperature switch structure. The temperature switch structure includes a first metal layer and a second metal layer stacked on each other. The first metal layer of the temperature switch structure is electrically connected to the circuit board and is thermally coupled to the embedded chip. A thermal expansion coefficient of the first metal layer is different from a thermal expansion coefficient of the second metal layer so that the temperature switch structure is deformed in response to a temperature change of the embedded chip to be in contact with or spaced apart from the second electrically conductive contact of the heat dissipation assembly.

Abstract: A printed circuit board stack structure includes a first printed circuit board, a second printed circuit board, and a filling glue layer. The first printed circuit board has at least one overflow groove, and includes first pads and a retaining wall surrounding the first pads. The second printed circuit board is disposed on the first printed circuit board, and includes second pads and conductive pillars located on some of the second pads. The conductive pillars are respectively connected to some of the first pads to electrically connect the second printed circuit board to the first printed circuit board. The filling glue layer fills between the first and the second printed circuit boards, and covers the first pads, the second pads, and the conductive pillars. The retaining wall blocks the filling glue layer so that a portion of the filling glue layer is accommodated in the overflow groove.

Abstract: A circuit board structure includes a substrate, a third dielectric layer, a fourth dielectric layer, a first external circuit layer, a second external circuit layer, a conductive through hole, a first annular retaining wall, and a second annular retaining wall. The conductive through hole penetrates through the third dielectric layer, a second dielectric layer, and the fourth dielectric layer. The conductive through hole is electrically connected to the first external circuit layer and the second external circuit layer. The first annular retaining wall is disposed in the third dielectric layer, surrounds the conductive through hole, and is electrically connected to the first external circuit layer and the first inner circuit layer. The second annular retaining wall is disposed in the fourth dielectric layer, surrounds the conductive through hole, and connects to the second external circuit layer and the second inner circuit layer electrically.

Abstract: A method of manufacturing package structures includes providing a carrier including a supporting layer, a metal layer, and a release layer between the supporting layer and the metal layer at first. Afterwards, a composite layer of a non-conductor inorganic material and an organic material is disposed on the metal layer. Then, a chip embedded substrate is bonded on the composite layer. Afterwards, an insulating protective layer having openings is formed on the circuit layer structure and exposes parts of the circuit layer structure in the openings. Afterwards, the supporting layer and the release layer are removed to form two package substrates. Then, each of the package substrates is cut.

Abstract: An interlayer connective structure is suitable for being formed in a wiring board, in which the wiring board includes two traces and an insulation part between the traces. The insulation part has a through hole. The interlayer connective structure located in the through hole is connected to the traces. The interlayer connective structure includes a column and a pair of protuberant parts. The protuberant parts are located at two ends of the through hole respectively and connected to the column and the traces. The protuberant parts stick out from the outer surfaces of the traces respectively. Each of the protuberant parts has a convex curved surface, in which the distance between the convex curved surface and the axis of the through hole is less than the radius of the through hole.

Abstract: A manufacturing method for circuit board structure includes steps of providing a carrier, forming a first build-up layer including a plurality of first circuits, forming a second build-up layer including a plurality of second circuits on a side of the first build-up layer located away from the carrier, attaching a side of the second build-up layer located away from the first build-up layer to a core layer, and removing the carrier from the first build-up layer, where the first circuits are finer than the second circuits.

Abstract: An integrated circuit (IC) package structure includes a chip, a redistribution layer (RDL) structure, a molding compound structure and an electromagnetic interference (EMI) shielding structure. The RDL structure is formed on the chip and electrically connected thereto. The molding compound layer is provided on outer surfaces of the chip and the RDL structure. The EMI shielding structure is provided on outer surfaces of the molding compound structure. The molding compound structure layer provided on outer surfaces of the chip and the RDL structure provide protection and reinforcement to multiple faces of the IC package structure; and the EMI shielding structure provided on outer surfaces of the molding compound structure provides EMI protection to multiple faces of the chip and the RDL structure.

Abstract: A package structure includes a circuit board, a package substrate, a fine metal L/S RDL-substrate, an electronic assembly, a photonic assembly, a heat dissipation assembly, and an optical fiber assembly. The package substrate is disposed on and electrically connected to the circuit board. The fine metal L/S RDL-substrate is disposed on and electrically connected to the package substrate. The electronic assembly includes an application specific integrated circuit (ASIC) assembly, an electronic integrated circuit (EIC) assembly, and a photonic integrated circuit (PIC) assembly which are respectively disposed on the fine metal L/S RDL-substrate and electrically connected to the package substrate by the fine metal L/S RDL-substrate. The heat dissipation assembly is disposed on the electronic assembly. The optical fiber assembly is disposed on the package substrate and electrically connected to the package substrate and the PIC assembly. A packaging method of the VCSEL array chip is presented.

Abstract: An electroplating apparatus includes an anode and a cathode, a power supply, a regulating plate, and a controller. The power supply is electrically connected to the anode and the cathode. The regulating plate is disposed between the anode and the cathode. The regulating plate includes an insulation grid plate and a plurality of wires. The controller is electrically connected to the plurality of wires to control a state of an electromagnetic field around the plurality of wires. An electroplating method is also provided.

Abstract: A multi-layered resonator circuit structure and a multi-layered filter circuit structure. The multi-layered resonator circuit structure includes a multi-layered substrate, a plurality of resonators and a plurality of conductive components. The multi-layered substrate has a top surface, a bottom surface, and a ground layer. The top surface and the bottom surface face away from each other. The ground layer is located between the top surface and the bottom surface. A part of the plurality of resonators is/are disposed on the top surface. Another part of the plurality of resonators is/are disposed on the bottom surface. The plurality of conductive components is located in the multi-layered substrate. The plurality of resonators is electrically connected to the ground layer, respectively, via the plurality of conductive components.