Abstract: A device for dark-field optical inspection of a substrate comprises: a light source for generating an incident beam that is projected onto an inspection zone of the substrate and that is capable of being reflected in the form of diffuse radiation; at least one first and one second collecting device; and a reflecting device for directing at least a portion of the diffuse radiation originating from a focal point of collection coincident with the inspection zone in the direction of the collecting devices, with a first and second reflective zone from which a first portion of the diffuse radiation is directed toward a first focal point, which is optically conjugated with the focal point of collection, and a second portion of the diffuse radiation is reflected toward a second focal point, which is optically conjugated with the collection focal point and distinct from the first focal point of detection.

Abstract: A method includes: determining height Z1 of a focus by an optical microscope having autofocus function which uses irradiation light of wavelength ?0 to adjust the focus; determining a wavelength ?1 of irradiation light used for obtaining observation image of second thin film; obtaining observation image of second thin film by using irradiation light of the wavelength ?1, while altering heights of the focus with the Z1 as reference point; calculating standard deviation of reflected-light intensity distribution within the observation image, obtaining height Z2 of the focus corresponding to a peak position where standard deviation is greatest, and calculating a difference ?Z between Z1 and Z2; correcting the autofocus function with ?Z as a correction value; and using the corrected autofocus function to adjust the focus, obtaining the observation image of the second thin film, and calculating the film thickness distribution from the reflected-light intensity distribution within the observation image.

Abstract: A method and system implementing the method for characterising structures etched in a substrate, such as a wafer, includes at least one structure etched in the substrate, an imaging step including the following steps: capturing, with an imaging device positioned on the top surface of the substrate, at least one image of a top surface of the substrate, and measuring a first data relating to the structure from at least one captured image, at least one interferometric measurement step, carried out with a low-coherence interferometer positioned on the top surface, for measuring with a measurement beam positioned on the structure, at least one depth data relating to a depth of the structure; and a first adjusting step for adjusting the measurement beam according to the first data.

Abstract: A method for characterising high aspect ratio (“HAR”) structures etched in a substrate includes, for at least one structure, an interferometric measurement step, carried out with a low-coherence interferometer positioned on a top surface of the substrate, for measuring with a measurement beam, at least one depth data relating to a depth of the HAR structure, and a first adjusting step for adjusting a diameter, at the top surface, of the measurement beam according to at least one top critical dimension (“top-CD”) data relating to a width of the HAR structure.

Abstract: A measurement system and an inspection method for detecting a defective bonding interface in a sample substrate including at least one element disposed on a support. The method comprises: placing the sample substrate in the measurement system, establishing an inclination map of the exposed surface, analyzing the inclination map and identifying a zone or zones of the exposed surface whose inclinations deviate by more than a given threshold from the inclination of the reference surface; and detecting the presence of a defective bond between the element and the support, depending on the result of the analysis of the inclination map.

Abstract: A method and related system for measuring a surface of a substrate including at least one structure using low coherence optical interferometry, the method being implemented with a system having an interferometric device, a light source, an imaging sensor, and a processing module, the method including: - acquiring, with the imaging sensor, an interferometric signal formed by the interferometric device between a reference beam and a measurement beam reflected by the surface at a plurality of measurement points in a field of view; the following steps being carried out by the processing module: classifying, by a learning technique, the acquired interferometric signals according to a plurality of classes, each class being associated with a reference interferometric signal representative of a typical structure; and analysing the interferometric signals to derive information on the structure at the measurement points, as a function of the class of each interferometric signal.

Abstract: An ultra-high-density vertical cross-point array comprises a plurality of horizontal line layers having horizontal lines interleaved with a plurality of vertical lines arranged in rows and columns. The vertical lines are interleaved with the horizontal lines such that a row of vertical lines is positioned between each consecutive pair of horizontal lines in each horizontal line layer. Each vertical line comprises a center conductor surrounded by a single or multi-layered memory film. Accordingly, when interleaved with the horizontal lines, two-terminal memory cells are integrally formed between the center conductor of each vertical line and each crossing horizontal line. By configuring the vertical and horizontal lines so that a row of vertical lines is positioned between each consecutive pair of horizontal lines, a unit memory cell footprint of just 2F2 may be realized.

Abstract: A method for measuring a surface of an object including at least one structure using low coherence optical interferometry, the method including the steps of acquiring an interferometric signal at a plurality of measurement points in a field of view and, for at least one measurement point, attributing the interferometric signal acquired to a class of interferometric signals from a plurality of classes, each of the classes being associated with a reference interferometric signal representative of a typical structure; and analysing the interferometric signal to derive therefrom an item of information on the structure at the measurement point, as a function of its class.

Abstract: A method includes: determining height Z1 of a focus by an optical microscope having autofocus function which uses irradiation light of wavelength ?0 to adjust the focus; determining a wavelength ?1 of irradiation light used for obtaining observation image of second thin film; obtaining observation image of second thin film by using irradiation light of the wavelength ?1, while altering heights of the focus with the Z1 as reference point; calculating standard deviation of reflected-light intensity distribution within the observation image, obtaining height Z2 of the focus corresponding to a peak position where standard deviation is greatest, and calculating a difference ?Z between Z1 and Z2; correcting the autofocus function with ?Z as a correction value; and using the corrected autofocus function to adjust the focus, obtaining the observation image of the second thin film, and calculating the film thickness distribution from the reflected-light intensity distribution within the observation image.

Abstract: Embodiments relate generally to semiconductors and memory technology, and more particularly, to systems, integrated circuits, and methods to implement a memory architecture that includes local bit lines for accessing subsets of memory elements, such as memory elements based on third dimensional memory technology. In at least some embodiments, an integrated circuit includes a cross-point memory array formed above a logic layer. The cross-point memory array includes X-lines and Y-lines, of which at least one Y-line includes groups of Y-line portions. Each of the Y-line portions can be arranged in parallel with other Y-line portions within a group of the Y-line portions. Also included are memory elements disposed between a subset of the X-lines and the group of the Y-line portions. In some embodiments, a decoder is configured to select a Y-line portion from the group of Y-line portions to access a subset of the memory elements.

Abstract: An ultra-high-density vertical cross-point array comprises a plurality of horizontal line layers having horizontal lines interleaved with a plurality of vertical lines arranged in rows and columns. The vertical lines are interleaved with the horizontal lines such that a row of vertical lines is positioned between each consecutive pair of horizontal lines in each horizontal line layer. Each vertical line comprises a center conductor surrounded by a single or multi-layered memory film. Accordingly, when interleaved with the horizontal lines, two-terminal memory cells are integrally formed between the center conductor of each vertical line and each crossing horizontal line. By configuring the vertical and horizontal lines so that a row of vertical lines is positioned between each consecutive pair of horizontal lines, a unit memory cell footprint of just 2F2 may be realized.

Abstract: A method and related system for substrate inspection, includes: creating, based on two light beams originating from one light source, a measurement volume at the intersection between the two light beams, the measurement volume containing interference fringes and being positioned to extend into the substrate, the substrate moving relative to the measurement volume in a direction parallel to a main surface S of the substrate; acquiring a measurement signal representative of the light scattered by the substrate, as a function of the location of the measurement volume on the substrate; calculating at least one expected modulation frequency, of an expected signal representative of the passage of a defect of the substrate through the measurement volume; determining values representative of a frequency content of the measurement signal close to the modulation frequency, to constitute a validated signal representative of the presence of defects; and analyzing the signal to locate and/or identify defects.

Abstract: A method and related device for measuring the profile of a surface of an object to be measured having zones made from at least two different materials, the object to be measured forming part of a plurality of substantially identical objects, the plurality of objects also including at least one reference object having at least one reference surface, the method including the following steps: determining a correction function, from a first profile signal of a first reference surface and a second profile signal from a second reference surface, the second reference surface being metallized; acquiring a profile signal from the surface of the object to be measured; and applying the correction function to the profile signal from the surface of the object to be measured to obtain a corrected profile signal; the profile signals being obtained from interferometric measurements.

Abstract: Embodiments of the invention relate generally to semiconductors and memory technology, and more particularly, to systems, integrated circuits, and methods to preserve states of memory elements in association with data operations using variable access signal magnitudes for other memory elements, such as implemented in third dimensional memory technology. In some embodiments, a memory device can include a cross-point array with resistive memory elements. An access signal generator can modify a magnitude of a signal to generate a modified magnitude for the signal to access a resistive memory element associated with a word line and a subset of bit lines. A tracking signal generator is configured to track the modified magnitude of the signal and to apply a tracking signal to other resistive memory elements associated with other subsets of bit lines, the tracking signal having a magnitude at a differential amount from the modified magnitude of the signal.

Abstract: A method for inspecting a wafer including: rotating the wafer about an axis of symmetry (X) perpendicular to a main wafer surface (S); emitting, from a light source coupled with an interferometric device, two incident light beams, to form, at the intersection between the two beams, a measurement volume (V) containing interference fringes so that a region of the main surface (S) of the wafer passes through a fringe, the dimension (Dy) of the measurement volume in a radial direction of the wafer being between 5 and 100 ?m; collecting a portion of the light scattered by the wafer region; acquiring the collected light and emitting a signal representing the variation in the collected light intensity as a function of time; and detecting, a frequency component in the collected light, the frequency being the time signature of a defect passage through the measurement volume.

Abstract: A memory array includes wordlines, local bitlines, two-terminal memory elements, global bitlines, and local-to-global bitline pass gates and gain stages. The memory elements are formed between the wordlines and local bitlines. Each local bitline is selectively coupled to an associated global bitline, by way of an associated local-to-global bitline pass gate. During a read operation when a memory element of a local bitline is selected to be read, a local-to-global gain stage is configured to amplify a signal on or passing through the local bitline to an amplified signal on or along an associated global bitline. The amplified signal, which in one embodiment is dependent on the resistive state of the selected memory element, is used to rapidly determine the memory state stored by the selected memory element. The global bit line and/or the selected local bit line can be biased to compensate for the Process Voltage Temperature (PVT) variation.

Abstract: Embodiments of the invention relate generally to semiconductors and memory technology, and more particularly, to systems, integrated circuits, and methods to implement circuits configured to compensate for parameter variations in layers of memory by adjusting access signals during memory operations. In some embodiments, memory cells are based on third dimensional memory technology. In at least some embodiments, an integrated circuit includes multiple layers of memory, a layer including sub-layers of semiconductor material. The integrated circuit also includes an access signal generator configured to generate an access signal to facilitate an access operation, and a characteristic adjuster configured to adjust the access signal for each layer in the multiple layers of memory.

Abstract: Systems, integrated circuits, and methods to utilize access signals to facilitate memory operations in scaled arrays of memory elements are described. In at least some embodiments, a non-volatile memory device can include a cross-point array having resistive memory elements and line driver. The line driver can be configured to access a resistive memory element in the cross-point array.

Abstract: Circuitry and methods for restoring data in memory are disclosed. The memory may include at least one layer of a non-volatile two-terminal cross-point array that includes a plurality of two-terminal memory elements that store data as a plurality of conductivity profiles and retain stored data in the absence of power. Over a period of time, logic values indicative of the stored data may drift such that if the logic values are not restored, the stored data may become corrupted. At least a portion of each memory may have data rewritten or restored by circuitry electrically coupled with the memory. Other circuitry may be used to determine a schedule for performing restore operations to the memory and the restore operations may be triggered by an internal or an external signal or event. The circuitry may be positioned in a logic layer and the memory may be fabricated over the logic layer.

Abstract: A system includes a cross-point memory array and a decoder circuit coupled to the cross-point memory array. The decoder circuit includes a predecoder having predecode logic to generate a control signal and a level shifter circuit to generate a voltage signal. The decoder circuit further includes a post-decoder coupled to the predecoder, the post-decoder including a first stage and a second stage coupled to the first stage, the control signal to control the first stage and the second stage to route the voltage signal through the first stage and the second stage to a selected conductive array line of a plurality of conductive array lines coupled to a memory array.