Patents Assigned to UTICA LEASECO, LLC
  • Patent number: 11942566
    Abstract: A method is provided for preparing at least one textured layer in an optoelectronic device. The method includes epitaxially growing a semiconductor layer of the optoelectronic device over a growth substrate; exposing the semiconductor layer to an etching process to create the at least one textured surface on the semiconductor layer; and lifting the optoelectronic device from the growth substrate.
    Type: Grant
    Filed: June 14, 2021
    Date of Patent: March 26, 2024
    Assignee: UTICA LEASECO, LLC
    Inventors: Yan Zhu, Sean Sweetnam, Brendan M. Kayes, Melissa J. Archer, Gang He
  • Patent number: 11695088
    Abstract: Embodiments of the invention generally relate to photovoltaic devices. In one embodiment, a method for forming a gallium arsenide based photovoltaic device includes providing a semiconductor structure, the structure including an absorber layer comprising gallium arsenide. A bypass function is provided in a p-n junction of the semiconductor structure, where under reverse-bias conditions the p-n junction breaks down in a controlled manner by a Zener breakdown effect.
    Type: Grant
    Filed: November 17, 2021
    Date of Patent: July 4, 2023
    Assignee: Utica Leaseco, LLC
    Inventors: Hui Nie, Brendan M. Kayes, Isik C. Kizilyalli
  • Patent number: 11616154
    Abstract: Various processes can apply pressure and/or heat to a photovoltaic (PV) layer, including processes that integrate solar cells into different types of industrial glass such as an autoclave lamination process. The disclosure describes a planarization technique that can be used on the PV layer to eliminate point loads caused by such processes. In an aspect, a method for producing a component is described that includes disposing or placing a planarization material on a PV layer, modifying a physical form of the planarization material to provide a planar surface made of the planarization material on one side of the PV layer having surface irregularities, and forming a stack of layers (e.g., as part of an autoclave lamination process) for the component by disposing a first layer over the planar surface on the one side of the PV layer and a second layer over the other, opposite side of the PV layer.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: March 28, 2023
    Assignee: UTICA LEASECO, LLC
    Inventor: Todd Krajewski
  • Patent number: 11583793
    Abstract: A gas trap system for metal organic chemical vapor deposition (MOCVD) exhaust abatement operations is provided. The gas trap system may include a housing including an inlet configured to receive exhaust gas and an outlet. The gas trap system may also include a conical inlet shield positioned within the housing. The conical inlet shield may form a first path between the housing and the conical inlet shield, wherein the first path receives the exhaust gas from the inlet. The conical inlet shield may also cool the exhaust gas and cause the exhaust gas to be uniformly distributed in the first path. The gas trap system may also include a filter configured to receive the exhaust gas from the first path and to filter the exhaust gas, wherein the filtered gas exhaust is provided to the outlet.
    Type: Grant
    Filed: October 8, 2019
    Date of Patent: February 21, 2023
    Assignee: UTICA LEASECO, LLC
    Inventor: Chaowei Wang
  • Patent number: 11442090
    Abstract: This disclosure describes an elastic multi-contact probe that includes conductive strips each of which comprises a conductive elastomer; dielectric strips formed on a back surface of a respective conductive strip; and a layer of a thermoplastic formed on back surfaces of the dielectric strips. The disclosure also describes a method that includes measuring a first I-V curve between a pair of inner probes of the an elastic multi-contact probe based on a first current applied to a pair of outer probes; determining a first slope of a linear region of the first I-V curve; measuring a second I-V curve between the pair of inner probes based on a second current applied to the pair of inner probes; determining a second slope of a linear region of the second I-V curve; and calculating a sheet resistance and a contact resistivity of the semiconductor material based on the first and second slopes.
    Type: Grant
    Filed: July 2, 2019
    Date of Patent: September 13, 2022
    Assignee: Utica Leaseco, LLC
    Inventors: Jan Moritz Limpinsel, Octavi Santiago Escala Semonin, Edwin J. Rodriguez, Brendan M. Kayes, Vladimir N. Faifer
  • Patent number: 11393938
    Abstract: A photovoltaic device and a method of making the photovoltaic device are disclosed. The photovoltaic device may include a semiconductor layer epitaxially grown using a compound semiconductor material, such as a group III-V semiconductor material, wherein a surface of the semiconductor layer is textured via one or more laser pulses of a laser. The photovoltaic device may also include a dielectric layer deposited over the textured surface of the semiconductor layer, and a back metal reflector provided on the dielectric layer. The textured surface extends a path of light traveling through the photovoltaic device to increase absorption of the light within the photovoltaic device.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: July 19, 2022
    Assignee: UTICA LEASECO, LLC
    Inventors: Octavi Santiago Escala Semonin, Daniel Guilford Patterson, Reto Adrian Furler, Andrew James Ritenour
  • Patent number: 11393683
    Abstract: Aspects of the disclosure relate to processes for epitaxial growth of Group III/V materials at high rates, such as about 30 ?m/hr or greater, for example, about 40 ?m/hr, about 50 ?m/hr, about 55 ?m/hr, about 60 ?m/hr, about 70 ?m/hr, about 80 ?m/hr, and about 90-120 ?m/hr deposition rates. The Group III/V materials or films may be utilized in solar, semiconductor, or other electronic device applications. The Group III/V materials may be formed or grown on a sacrificial layer disposed on or over the support substrate during a vapor deposition process. Subsequently, the Group III/V materials may be removed from the support substrate during an epitaxial lift off (ELO) process. The Group III/V materials are thin films of epitaxially grown layers containing gallium arsenide, gallium aluminum arsenide, gallium indium arsenide, gallium indium arsenide nitride, gallium aluminum indium phosphide, phosphides thereof, nitrides thereof, derivatives thereof, alloys thereof, or combinations thereof.
    Type: Grant
    Filed: September 27, 2017
    Date of Patent: July 19, 2022
    Assignee: UTICA LEASECO, LLC
    Inventors: Lori D. Washington, David P. Bour, Gregg Higashi, Gang He
  • Patent number: 11387681
    Abstract: A charging device configured to charge a mobile device through the solar cells integrated on the mobile device. The charging device converts wall power to light energy which can be absorbed by the solar cells and then converted to electricity for storage in the rechargeable battery of the mobile device. The charging device includes a light source configured to emit a light beam having a spectrum tuned to the spectral response of the solar cells. The charging device includes a proximity sensor for detecting the presence of a mobile device within the charging device housing and responsively signaling the activation of the light source. The charging device includes logic for wirelessly communicating with the mobile device as well as controlling the charging process in various stages and aspects. The light source may be LEDs that also serve to transmit light communication signals to the mobile device.
    Type: Grant
    Filed: November 10, 2017
    Date of Patent: July 12, 2022
    Assignee: UTICA LEASECO, LLC
    Inventors: Gang He, Brendan Kayes, Christopher France
  • Patent number: 11356052
    Abstract: The present disclosure describes an energy device with a solar module having a form factor configured to be inserted into and to match an inner portion of a coin-type cell holder of an electronic device. The solar module includes one or more photovoltaic cells to capture energy from ambient light and a pair of electrodes. The energy device may be configured to provide, to the electronic device via contact with the coin-type cell holder, electric energy produced from the ambient light energy. The solar module may include a converter module to convert the ambient light energy into the electric energy. The energy device may also include an energy storage module and/or a power management module that are stackable below the solar module with electrical connectivity to the solar module, and that combined with the solar module have the appropriate form factor for the coin-type cell holder.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: June 7, 2022
    Assignee: UTICA LEASECO, LLC
    Inventor: Aarohi Surya Vijh
  • Patent number: 11271121
    Abstract: A photovoltaic device and a method of making the photovoltaic device are disclosed. The photovoltaic device may include a semiconductor layer epitaxially grown using a compound semiconductor material, such as a group III-V semiconductor material, wherein a surface of the semiconductor layer is textured via one or more laser pulses of a laser. The photovoltaic device may also include a dielectric layer deposited over the textured surface of the semiconductor layer, and a back metal reflector provided on the dielectric layer. The textured surface extends a path of light traveling through the photovoltaic device to increase absorption of the light within the photovoltaic device.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: March 8, 2022
    Assignee: UTICA LEASECO, LLC
    Inventors: Octavi Santiago Escala Semonin, Daniel Guilford Patterson, Reto Adrian Furler, Andrew James Ritenour
  • Patent number: 11271133
    Abstract: A multi-junction optoelectronic device and method of manufacture are disclosed. The method comprises providing a first p-n structure on a substrate, wherein the first p-n structure comprises a first base layer of a first semiconductor with a first bandgap such that a lattice constant of the first semiconductor matches a lattice constant of the substrate, and wherein the first semiconductor comprises a Group III-V semiconductor. The method includes providing a second p-n structure, wherein the second p-n structure comprises a second base layer of a second semiconductor with a second bandgap, wherein a lattice constant of the second semiconductor matches a lattice constant of the first semiconductor, and wherein the second semiconductor comprises a Group IV semiconductor. The method also includes lifting off the substrate the multi-junction optoelectronic device having the first p-n structure and the second p-n structure, wherein the multi-junction optoelectronic device is a flexible device.
    Type: Grant
    Filed: April 19, 2018
    Date of Patent: March 8, 2022
    Assignee: UTICA LEASECO, LLC
    Inventors: Brendan M. Kayes, Gang He
  • Patent number: 11267095
    Abstract: A method and system for polishing a plurality of workpieces is disclosed. The method and system comprises providing a polishing tool with multiple polishing heads; and providing a substrate tray that can hold the plurality of work pieces in a fixed position on a tray underneath the polishing heads. The system and method includes moving the tray within the polisher. Finally, the method and system includes configuring the multiple polishing heads with the appropriate pad/slurry combinations to polish the workpieces and to create a finished polished surface on the plurality of work pieces.
    Type: Grant
    Filed: April 13, 2018
    Date of Patent: March 8, 2022
    Assignee: UTICA LEASECO, LLC
    Inventors: Stephen M. Fisher, Robindranath Banerjee, Christopher L. Beaudry, Brian J. Brown
  • Patent number: 11271128
    Abstract: An optoelectronic semiconductor device is disclosed. The device comprises a plurality of stacked p-n junctions (e.g., multi junction device). The optoelectronic semiconductor device includes a n-doped layer disposed below the p-doped layer to form a p-n layer such that electric energy is created when photons are absorbed by the p-n layer. Recesses are formed on top of the p-doped layer at the top of the plurality of stacked p-n junctions. The junctions create an offset and an interface layer is formed on top of the p-doped layer at the top of the plurality stacked p-n junctions. The device also includes a window layer disposed below the plurality stacked p-n junctions. In another aspect, one or more optical filters are inserted into a device to enhance its efficiency through photon recycling. The device can be fabricated by epitaxial growth on a substrate and removed from the substrate through a lift off process.
    Type: Grant
    Filed: September 15, 2017
    Date of Patent: March 8, 2022
    Assignee: UTICA LEASECO, LLC
    Inventors: Brendan M. Kayes, Gang He, Sylvia Spruytte, I-Kang Ding, Gregg Higashi
  • Patent number: 11257965
    Abstract: System and method of providing a photovoltaic (PV) cell having a cushion layer to alleviate stress impact between a front metal contact and a thin film PV layer. A cushion layer is disposed between an extraction electrode and a photovoltaic (PV) surface. The cushion layer is made of a nonconductive material and has a plurality of vias filled with a conductive material to provide electrical continuity between the bus bar and the PV layer. The cushion layer may be made of a flexible material preferably with rigidity that matches the substrate. Thus, the cushion layer can effectively protect the PV layer from physical damage due to tactile contact with the front metal contact.
    Type: Grant
    Filed: May 30, 2019
    Date of Patent: February 22, 2022
    Assignee: UTICA LEASECO, LLC
    Inventors: Linlin Yang, Liguang Lan, Chris France, Gang He, Erhong Li, Jose Corbacho
  • Patent number: 11257978
    Abstract: A photovoltaic device and a method of forming a contact stack of the photovoltaic device are disclosed. The photovoltaic device may include a first layer deposited on a semiconductor layer including a compound semiconductor material. The photovoltaic device may also include a dopant layer comprising tin (Sn) deposited on the first layer. The photovoltaic device may further include a conductive layer deposited or provided over the dopant layer to form a contact stack with the first layer and the dopant layer.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: February 22, 2022
    Assignee: UTICA LEASECO, LLC
    Inventors: Abraham Saldivar-Valdes, Octavi Santiago Escala Semonin
  • Patent number: 11211517
    Abstract: A system for connecting photovoltaic cells is disclosed. The system comprises a flexible component feeder source for feeding the photovoltaic cells to a process that couples them together; a vacuum conveyor for receiving at a first location the coupled photovoltaic cells and including openings through which a vacuum is applied to hold the coupled photovoltaic cells in place; a moving belt above the vacuum conveyor at a second location, where the vacuum conveyor and the moving belt are driven in a predetermined relation to one another for conveying the coupled photovoltaic cells from the first location to the second location; a vacuum source for applying a vacuum through the openings to cause the moving belt to apply a pressure to an upper surface of the coupled photovoltaic cells to compress the coupled photovoltaic cells; and a curing source at the second location for curing the compressed coupled photovoltaic cells.
    Type: Grant
    Filed: March 23, 2018
    Date of Patent: December 28, 2021
    Assignee: UTICA LEASECO, LLC
    Inventors: Khurshed Sorabji, Steven Yoshida, Eric Sanford
  • Patent number: 11211506
    Abstract: Embodiments of the invention generally relate to photovoltaic devices. In one embodiment, a method for forming a gallium arsenide based photovoltaic device includes providing a semiconductor structure, the structure including an absorber layer comprising gallium arsenide. A bypass function is provided in a p-n junction of the semiconductor structure, where under reverse-bias conditions the p-n junction breaks down in a controlled manner by a Zener breakdown effect.
    Type: Grant
    Filed: July 21, 2017
    Date of Patent: December 28, 2021
    Assignee: UTICA LEASECO, LLC
    Inventors: Hui Nie, Brendan M. Kayes, Isik C. Kizilyalli
  • Patent number: 11205993
    Abstract: A flexible circuit that allows a standardized connection interface to connect flexible solar cell(s) for easy integration into electronics devices. This interconnection scheme does not limit the intrinsic solar cell flexibility and may conform to standard design practices in electronic device manufacturing. In an aspect, a solar module is described that includes one or more solar panels and a flexible trace or interconnect having conductive wires inside an insulation material. In another aspect, an electronic device is described that includes a circuit board, one or more solar panels and a flexible trace or interconnect having conductive wires inside an insulation material. The electronic device may be an internet-of-things (IoT) device or an unmanned aerial vehicle (UAV), for example. In yet another aspect, a lighting module is described that includes one or more lighting panels and a flexible trace or interconnect having conductive wires inside an insulation material.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: December 21, 2021
    Assignee: UTICA LEASECO, LLC
    Inventors: Christopher Earl France, Linlin Yang, Liguang Lan
  • Patent number: 11199501
    Abstract: Aspects of the present disclosure include methods, apparatuses, and computer readable media for transmitting a light such that it is incident on a multi-layer stack, wherein the multi-layer stack includes the feature and a region without the feature, detecting a narrow-band light from the feature and the region without the feature, wherein the feature has a first optical response in response to a wavelength of the narrow-band light and the region without the feature has a second optical response in response to the wavelength of the narrow-band light, and generating, based on the narrow-band light, an image indicative of where the first optical response and the second optical response occur on the multi-layer stack.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: December 14, 2021
    Assignee: UTICA LEASECO, LLC
    Inventors: Vineet Kumar, Katayoun Zand, Howard Woo, Markelle L. Gibbs, Enrique Bravo Mora, Christopher E. France, Brendan M. Kayes
  • Patent number: 11201585
    Abstract: A flexible circuit that allows a standardized connection interface to connect flexible solar cell(s) for easy integration into electronics devices. This interconnection scheme does not limit the intrinsic solar cell flexibility and may conform to standard design practices in electronic device manufacturing. In an aspect, a solar module is described that includes one or more solar panels and a flexible trace or interconnect having conductive wires inside an insulation material. In another aspect, an electronic device is described that includes a circuit board, one or more solar panels and a flexible trace or interconnect having conductive wires inside an insulation material. The electronic device may be an internet-of-things (IoT) device or an unmanned aerial vehicle (UAV), for example. In yet another aspect, a lighting module is described that includes one or more lighting panels and a flexible trace or interconnect having conductive wires inside an insulation material.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: December 14, 2021
    Assignee: UTICA LEASECO, LLC
    Inventors: Christopher Earl France, Linlin Yang, Liguang Lan