Patents Assigned to UTICA LEASECO, LLC
  • Patent number: 11121272
    Abstract: Embodiments of the invention generally relate to photovoltaic devices. In one embodiment, a method for forming a gallium arsenide based photovoltaic device includes providing a semiconductor structure, the structure including an absorber layer comprising gallium arsenide and an emitter layer. A bypass function is provided in a p-n junction of the semiconductor structure, where under reverse-bias conditions the p-n junction breaks down in a controlled manner by a Zener breakdown effect. The absorber or base layer has a grading in doping concentration from a first doping level closest to the emitter layer to a second doping level away from the emitter layer, the second doping level being greater than the first doping level.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: September 14, 2021
    Assignee: UTICA LEASECO, LLC
    Inventors: Andrew J. Ritenour, Brendan M. Kayes, Hui Nie, Isik Kizilyalli
  • Patent number: 11107939
    Abstract: This disclosure describes various structures, devices, and arrangements that replace a PSA used to hold shingled cells together with an adhesive film. For example, in an aspect, the present disclosure is directed to a shingled arrangement of photovoltaic (PV) cells. In some aspects, the shingled arrangement of PV cells may include a first PV cell, a second PV cell, and an adhesive film placed between a backside the first PV cell and a front side of the second PV cell. The adhesive film may be thermally bonded to the first PV cell and to the second PV cell after the application of localized heat and pressure and holds the first PV cell and the second PV cell together. Additionally, a bus bar of the second PV cell may be electrically connected to the first PV cell by a conductive via formed through the adhesive film.
    Type: Grant
    Filed: January 25, 2019
    Date of Patent: August 31, 2021
    Assignee: UTICA LEASECO, LLC
    Inventors: Todd Allen Krajewski, Jason Tolentino
  • Patent number: 11107942
    Abstract: A method is described that includes sputtering multiple layers on a back surface of the photovoltaic structure, the photovoltaic structure being made of at least one group III-V semiconductor material, and evaporating, over the multiple layers, one or more additional layers including a metal layer, the back metal structure being formed by the multiple layers and the additional layers. A photovoltaic device is also described that includes a back metal structure disposed over a back surface of a photovoltaic structure made of a group III-V semiconductor material, the back metal structure including one or more evaporated layers disposed over multiple sputtered layers, the one or more evaporated layers including a metal layer. By allowing evaporation along with sputtering, tool size and costs can be reduced, including minimizing a number of vacuum breaks. Moreover, good yield and reliability, such as reducing dark line defects (DLDs), can also be achieved.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: August 31, 2021
    Assignee: UTICA LEASECO, LLC
    Inventors: Octavi Santiago Escala Semonin, Reto Adrian Furler, Hasti Majidi, Kirsten Sydney Hessler
  • Patent number: 11075313
    Abstract: A growth structure having a lattice transition (or graded buffer) or an engineered growth structure with a desired lattice constant, different from a lattice constant of conventional substrates like GaAs, Si, Ge, InP, under a release layer or an etch stop layer is used as a seed crystal for growing optoelectronic devices. The optoelectronic device can be a photovoltaic device having one or more subcells (e.g., lattice-matched or lattice-mismatched subcells). The release layer can be removed using different processes to separate the optoelectronic device from the growth structure, which may be reused, or from the engineered growth structure. When using the etch stop layer, the growth structure or the engineered growth structure may be grinded or etched away. The engineered growth structure may be made from a layer transfer process between two wafers or from a ternary and/or a quaternary material. Methods for making the optoelectronic device are also described.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: July 27, 2021
    Assignee: UTICA LEASECO, LLC
    Inventors: Nikhil Jain, Andrew J. Ritenour, Ileana Rau, Claudio Canizares, Lori D. Washington, Gang He, Brendan M. Kayes
  • Patent number: 11075128
    Abstract: Aspects of the present disclosure include a packaged product including a product, a first encapsulation disposed on top of the product, wherein the first encapsulation is configured to protect the product during an operation of the product, a second encapsulation disposed on top of the first encapsulation, wherein the second encapsulation is configured to protect the product during a testing of the product, and a third encapsulation disposed on top of the second encapsulation, wherein the third encapsulation is configured to protect the product during a transport of the product, wherein at least one of the first encapsulation, the second encapsulation, or the third encapsulation is detachably coupled with the product.
    Type: Grant
    Filed: October 3, 2019
    Date of Patent: July 27, 2021
    Assignee: UTICA LEASECO, LLC
    Inventor: Aarohi Surya Vijh
  • Patent number: 11038080
    Abstract: An optoelectronic device having a textured layer is described. In an aspect, a method may be used to produce the optoelectronic device, where the method includes epitaxially growing a semiconductor layer of the optoelectronic device on a growth substrate, and exposing the semiconductor layer to an etching process to create at least one textured surface in the semiconductor layer. The textured semiconductor layer can be referred to as a textured layer. The etching process is performed without the use of a template layer, or similar layer, configured as a mask to generate the texturing. The etching process can be done by one or more of a liquid or solution-based chemical etchant, gas etching, laser etching, plasma etching, or ion etching. The method can also include lifting the semiconductor layer of the optoelectronic device from the growth substrate by, for example, the use of an epitaxial lift off (ELO) process.
    Type: Grant
    Filed: February 1, 2017
    Date of Patent: June 15, 2021
    Assignee: UTICA LEASECO, LLC
    Inventors: Yan Zhu, Sean Sweetnam, Brendan M. Kayes, Melissa J. Archer, Gang He