Patents Assigned to Varian Semiconductor Equipment Associates, Inc.
  • Publication number: 20230323540
    Abstract: An apparatus for controlling precursor flow. The apparatus may include a processor; and a memory unit coupled to the processor, including a flux control routine. The flux control routine may be operative on the processor to monitor the precursor flow and may include a flux calculation processor to determine a precursor flux value based upon a change in detected signal intensity received from a cell of a gas delivery system to deliver a precursor.
    Type: Application
    Filed: June 9, 2023
    Publication date: October 12, 2023
    Applicant: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Elaina BABAYAN, Sarah WHITE, Vijay VENUGOPAL, Jonathan BAKKE
  • Patent number: 11718914
    Abstract: An apparatus for controlling precursor flow. The apparatus may include a processor; and a memory unit coupled to the processor, including a flux control routine. The flux control routine may be operative on the processor to monitor the precursor flow and may include a flux calculation processor to determine a precursor flux value based upon a change in detected signal intensity received from a cell of a gas delivery system to deliver a precursor.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: August 8, 2023
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Elaina Babayan, Sarah White, Vijay Venugopal, Jonathan Bakke
  • Patent number: 11691184
    Abstract: A cleaning tool for cleaning a glass surface of an accelerator column is disclosed. The cleaning tool includes a shaft including a first end and a second end; a foam body located at the first end of the shaft; and a mounting bracket coupled to the first end of the shaft, the mounting bracket receiving the foam body. An outer circumference of the foam body includes a textured cleaning surface for contacting the glass surface of the accelerator column.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: July 4, 2023
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Michael J. Blanchard, Nevin H. Clay, Joshua R. Conahan, Christopher Lupoli
  • Patent number: 11631588
    Abstract: A method of doping a substrate. The method may include providing a substrate in a process chamber. The substrate may include a semiconductor structure, and a dopant layer disposed on a surface of the semiconductor structure. The method may include maintaining the substrate at a first temperature for a first interval, the first temperature corresponding to a vaporization temperature of the dopant layer. The method may further include rapidly cooling the substrate to a second temperature, less than the first temperature, and heating the substrate from the second temperature to a third temperature, greater than the first temperature.
    Type: Grant
    Filed: January 10, 2020
    Date of Patent: April 18, 2023
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Christopher R. Hatem, Piero Sferlazzo, Roger Fish, Dale K. Stone
  • Patent number: 11574800
    Abstract: A workpiece processing apparatus allowing independent control of the voltage applied to the shield ring and the workpiece is disclosed. The workpiece processing apparatus includes a platen. The platen includes a dielectric material on which a workpiece is disposed. A bias electrode is disposed beneath the dielectric material. A shield ring, which is constructed from a metal, ceramic, semiconductor or dielectric material, is arranged around the perimeter of the workpiece. A ring electrode is disposed beneath the shield ring. The ring electrode and the bias electrode may be separately powered. This allows the surface voltage of the shield ring to match that of the workpiece, which causes the plasma sheath to be flat. Additionally, the voltage applied to the shield ring may be made different from that of the workpiece to compensate for mismatches in geometries. This improves uniformity of incident angles along the outer edge of the workpiece.
    Type: Grant
    Filed: April 17, 2020
    Date of Patent: February 7, 2023
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Alexandre Likhanskii, Maureen Petterson, John Hautala, Anthony Renau, Christopher A. Rowland, Costel Biloiu
  • Publication number: 20230020164
    Abstract: A method of patterning a substrate. The method may include providing a surface feature on the substrate, the surface feature having a first dimension along a first direction within a substrate plane, and a second dimension along a second direction within the substrate plane, wherein the second direction is perpendicular to the first direction; and directing first ions in a first exposure to the surface feature along the first direction at a non-zero angle of incidence with respect to a perpendicular to the substrate plane, in a presence of a reactive ambient containing a reactive species; wherein the first exposure etches the surface feature along the first direction, wherein after the directing, the surface feature retains the second dimension along the second direction, and wherein the surface feature has a third dimension along the first direction different than the first dimension.
    Type: Application
    Filed: September 23, 2022
    Publication date: January 19, 2023
    Applicant: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Simon Ruffell, John Hautala, Adam Brand, Huixiong Dai
  • Patent number: 11532483
    Abstract: A method may include forming in a substrate a first array of a first material of first linear structures, interspersed with a second array of a second material, of second linear structures, the first and second linear structures elongated along a first axis. The method may include generating a chop pattern in the first layer, comprising a third linear array, interspersed with a fourth linear array. The third and fourth linear arrays may be elongated along a second axis, forming a non-zero angle of incidence with respect to the first axis. The third linear array may include alternating portions of the first and second material, while the fourth linear array comprises an array of cavities, arranged within the patterning layer. The method may include elongating a first set of cavities along the first axis, to form a first set of elongated cavities bounded by the first material.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: December 20, 2022
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventor: Sony Varghese
  • Patent number: 11495434
    Abstract: Provided herein are approaches for in-situ plasma cleaning of ion beam optics. In one approach, a system includes a component (e.g., a beam-line component) of an ion implanter processing chamber. The system further includes a power supply for supplying a first voltage and first current to the component during a processing mode and a second voltage and second current to the component during a cleaning mode. The second voltage and current are applied to one or more conductive beam optics of the component, individually, to selectively generate plasma around one or more of the one or more conductive beam optics. The system may further include a flow controller for adjusting an injection rate of an etchant gas supplied to the beam-line component, and a vacuum pump for adjusting pressure of an environment of the beam-line component.
    Type: Grant
    Filed: September 28, 2020
    Date of Patent: November 8, 2022
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Kevin Anglin, William Davis Lee, Peter Kurunczi, Ryan Downey, Jay T. Scheuer, Alexandre Likhanskii, William M. Holber
  • Patent number: 11488823
    Abstract: A method of patterning a substrate. The method may include providing a surface feature on the substrate, the surface feature having a first dimension along a first direction within a substrate plane, and a second dimension along a second direction within the substrate plane, wherein the second direction is perpendicular to the first direction; and directing first ions in a first exposure to the surface feature along the first direction at a non-zero angle of incidence with respect to a perpendicular to the substrate plane, in a presence of a reactive ambient containing a reactive species; wherein the first exposure etches the surface feature along the first direction, wherein after the directing, the surface feature retains the second dimension along the second direction, and wherein the surface feature has a third dimension along the first direction different than the first dimension.
    Type: Grant
    Filed: February 8, 2021
    Date of Patent: November 1, 2022
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Simon Ruffell, John Hautala, Adam Brand, Huixiong Dai
  • Patent number: 11462546
    Abstract: A method may include providing a substrate, the substrate comprising a substrate base and a patterning stack, disposed on the substrate base. The substrate may include first linear structures in the patterning stack, the first linear structures being elongated along a first direction; and second linear structures in the patterning stack, the second linear structures being elongated along a second direction, the second direction forming a non-zero angle with respect to the first direction. The method may also include selectively forming a set of sidewall spacers on one set of sidewalls of the second linear structures.
    Type: Grant
    Filed: January 31, 2020
    Date of Patent: October 4, 2022
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Sony Varghese, Naushad Variam
  • Patent number: 11442207
    Abstract: Embodiments herein provide systems and methods for forming an optical component. A method may include providing a plurality of proximity masks between a plasma source and a workpiece, the workpiece including a plurality of substrates secured thereto. Each of the plurality of substrates may include first and second target areas. The method may further include delivering, from the plasma source, an angled ion beam towards the workpiece, wherein the angled ion beam is then received at one of the plurality of masks. A first proximity mask may include a first set of openings permitting the angled ion beam to pass therethrough to just the first target area of each of the plurality of substrates. A second proximity mask may include a second set of openings permitting the angled ion beam to pass therethrough just to the second target area of each of the plurality of substrates.
    Type: Grant
    Filed: January 31, 2020
    Date of Patent: September 13, 2022
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Morgan Evans, Rutger Meyer Timmerman Thijssen, Joseph Olson, Peter Kurunczi, Robert Masci
  • Patent number: 11424112
    Abstract: Embodiments herein include a transparent halo assembly for reducing an amount of sputtered material to minimize particle defects impacting a workpiece. In some embodiments, a halo assembly may include a first halo arranged around a semiconductor workpiece, and a mounting assembly coupling the first halo to a roplat. The first halo may include a first side opposite a second side, and a first end opposite a second end, wherein the first side is operable to receive an ion beam from an ion source. The first halo may further include a plurality of apertures extending between the first and second sides, wherein the plurality of apertures permit passage of a portion of the ion beam to pass therethrough, towards the mounting assembly. In some embodiments, the halo assembly may include a second halo positioned proximate the first halo, and a third halo disposed between the first halo and the mounting assembly.
    Type: Grant
    Filed: November 3, 2017
    Date of Patent: August 23, 2022
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Ernest E. Allen, Costel Biloiu, Daniel McGillicuddy
  • Patent number: 11404254
    Abstract: An ion source with an insertable target holder for holding a solid dopant material is disclosed. The insertable target holder includes a pocket or cavity into which the solid dopant material is disposed. When the solid dopant material melts, it remains contained within the pocket, thus not damaging or degrading the arc chamber. Additionally, the target holder can be moved from one or more positions where the pocket is at least partially in the arc chamber to one or more positions where the pocket is entirely outside the arc chamber. In certain embodiments, a sleeve may be used to cover at least a portion of the open top of the pocket.
    Type: Grant
    Filed: February 6, 2019
    Date of Patent: August 2, 2022
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Shreyansh Patel, Graham Wright, Daniel Alvarado, Klaus Becker, Daniel R. Tieger, Stephen Krause
  • Patent number: 11402649
    Abstract: Optical grating components and methods of forming are provided. In some embodiments, a method includes providing an optically transparent substrate, and forming an optical grating layer on the substrate. The method includes forming an optical grating in the optical grating layer, wherein the optical grating comprises a plurality of angled components, disposed at a non-zero angle of inclination with respect to a perpendicular to a plane of the substrate. A first sidewall of the optical grating may have a first angle, and a second sidewall of the grating has a second angle different than the first angle. Modifying process parameters, including selectivity and beam angle spread, has an effect of changing a shape or dimension of the plurality of angled components.
    Type: Grant
    Filed: May 8, 2020
    Date of Patent: August 2, 2022
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Morgan Evans, Rutger Meyer Timmerman Thijssen, Joseph Olson, Peter Kurunczi
  • Patent number: 11404278
    Abstract: An optical grating component may include a substrate, and an optical grating, the optical grating being disposed on the substrate. The optical grating may include a plurality of angled structures, disposed at a non-zero angle of inclination with respect to a perpendicular to a plane of the substrate, wherein the plurality of angled structures are arranged to define a variable depth along a first direction, the first direction being parallel to the plane of the substrate.
    Type: Grant
    Filed: September 22, 2020
    Date of Patent: August 2, 2022
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: John Hautala, Morgan Evans, Rutger Meyer Timmerman Thijssen, Joseph C. Olson
  • Patent number: 11295931
    Abstract: An ion implantation system, including an ion source, and a buncher to receive a continuous ion beam from the ion source, and output a bunched ion beam. The buncher may include a drift tube assembly, having an alternating sequence of grounded drift tubes and AC drift tubes. The drift tube assembly may include a first grounded drift tube, arranged to accept a continuous ion beam, at least two AC drift tubes downstream to the first grounded drift tube, a second grounded drift tube, downstream to the at least two AC drift tubes. The ion implantation system may include an AC voltage assembly, coupled to the at least two AC drift tubes, and comprising at least two AC voltage sources, separately coupled to the at least two AC drift tubes. The ion implantation system may include a linear accelerator, comprising a plurality of acceleration stages, disposed downstream of the buncher.
    Type: Grant
    Filed: July 14, 2020
    Date of Patent: April 5, 2022
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventor: Frank Sinclair
  • Publication number: 20220080504
    Abstract: Provided herein are approaches for forming a conduit embedded within a component of a semiconductor manufacturing device (e.g., an ion implanter) using an additive manufacturing process (e.g., 3-D printing), wherein the conduit is configured to deliver a fluid throughout the component to provide heating, cooling, and gas distribution thereof. In one approach, the conduit includes a set of raised surface features formed on an inner surface of the conduit for varying fluid flow characteristics within the conduit. In another approach, the conduit may be formed in a helical configuration. In another approach, the conduit is formed with a polygonal cross section. In another approach, the component of the ion implanter includes at least one of an ion source, a plasma flood gun, a cooling plate, a platen, and/or an arc chamber base.
    Type: Application
    Filed: November 30, 2021
    Publication date: March 17, 2022
    Applicant: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Joshua M. Abeshaus, Jordan B. Tye
  • Patent number: 11222768
    Abstract: Disclosed is a semiconductor processing apparatus including one or more components having a conductive or nonconductive porous material. In some embodiments, an ion implanter may include a plurality of beam line components for directing an ion beam to a target, and a porous material along a surface of at least one of the plurality of beamline components.
    Type: Grant
    Filed: August 26, 2019
    Date of Patent: January 11, 2022
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: James Alan Pixley, Eric D. Hermanson, Philip Layne, Lyudmila Stone, Thomas Stacy
  • Patent number: 11213891
    Abstract: Provided herein are approaches for forming a conduit embedded within a component of a semiconductor manufacturing device (e.g., an ion implanter) using an additive manufacturing process (e.g., 3-D printing), wherein the conduit is configured to deliver a fluid throughout the component to provide heating, cooling, and gas distribution thereof. In one approach, the conduit includes a set of raised surface features formed on an inner surface of the conduit for varying fluid flow characteristics within the conduit. In another approach, the conduit may be formed in a helical configuration. In another approach, the conduit is formed with a polygonal cross section. In another approach, the component of the ion implanter includes at least one of an ion source, a plasma flood gun, a cooling plate, a platen, and/or an arc chamber base.
    Type: Grant
    Filed: August 14, 2019
    Date of Patent: January 4, 2022
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Joshua M. Abeshaus, Jordan B. Tye
  • Patent number: 11217491
    Abstract: Methods herein may include forming a gate dielectric within a set of trenches in a stack of layers. A first work function (WF) metal may be formed atop the gate dielectric, and a capping layer may be formed over the first WF metal using an angled ion implant deposition, the capping layer extending across the trenches.
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: January 4, 2022
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Min Gyu Sung, Naushad K. Variam, Sony Varghese, Johannes Van Meer, Jae Young Lee