Abstract: An optoelectronic device is disclosed, comprising: a photodiode array including a plurality of first photodiodes, each first photodiode including a respective n+ region and a respective n-well region; a guide array disposed over the photodiode array, the guide array including a plurality of guide members separated from one another by a layer of light-blocking material, the guide members being aligned with the n+ regions of the first photodiodes, such that each guide member is disposed over a different respective n+ region, and the layer of light-blocking material being aligned with the n-well regions of the first photodiodes; and a filter array disposed over the guide array, the filter array including a plurality of bandpass filters, each bandpass filter being aligned with a different one of the plurality of guide members, each bandpass filter having a different transmission band.

Abstract: An optoelectronic device is disclosed, comprising: a photodiode array including a plurality of first photodiodes, each first photodiode including a respective n+ region and a respective n-well region; a guide array disposed over the photodiode array, the guide array including a plurality of guide members separated from one another by a layer of light-blocking material, the guide members being aligned with the n+ regions of the first photodiodes, such that each guide member is disposed over a different respective n+ region, and the layer of light-blocking material being aligned with the n-well regions of the first photodiodes; and a filter array disposed over the guide array, the filter array including a plurality of bandpass filters, each bandpass filter being aligned with a different one of the plurality of guide members, each bandpass filter having a different transmission band.

Abstract: An optoelectronic device is disclosed, comprising: a photodiode array including a plurality of first photodiodes, each first photodiode including a respective n+ region and a respective n-well region; a guide array disposed over the photodiode array, the guide array including a plurality of guide members separated from one another by a layer of light-blocking material, the guide members being aligned with the n+ regions of the first photodiodes, such that each guide member is disposed over a different respective n+ region, and the layer of light-blocking material being aligned with the n-well regions of the first photodiodes; and a filter array disposed over the guide array, the filter array including a plurality of bandpass filters, each bandpass filter being aligned with a different one of the plurality of guide members, each bandpass filter having a different transmission band.

Abstract: A chip resistor includes an insulating substrate, top terminal electrodes formed on top surface of the substrate using silver-based cermet, bottom electrodes, resistive element that is situated between the top terminal electrodes and overlaps them partially, an optional internal protective coating that covers resistive element completely or partially, an external protective coating that covers completely the internal protection coating and partially covers top terminal electrodes, a plated layer of nickel that covers face sides of the substrate, top and bottom electrodes, and overlaps partially external protective coating, finishing plated layer that covers nickel layer. The overlap of nickel layer and external protective layer possesses a sealing property because of metallization of the edges of external protective layer prior to the nickel plating process.

Abstract: A chip resistor includes an insulating substrate, top terminal electrodes formed on top surface of the substrate using silver-based cermet, bottom electrodes, resistive element that is situated between the top terminal electrodes and overlaps them partially, an optional internal protective coating that covers resistive element completely or partially, an external protective coating that covers completely the internal protection coating and partially covers top terminal electrodes, a plated layer of nickel that covers face sides of the substrate, top and bottom electrodes, and overlaps partially external protective coating, finishing plated layer that covers nickel layer. The overlap of nickel layer and external protective layer possesses a sealing property because of metallization of the edges of external protective layer prior to the nickel plating process.

Abstract: A novel digitally controlled antenna tuning circuit that enables the implementation of low cost, wideband tuning circuits for antennas in receive applications. The invention is operative to switch a plurality of tuning elements into and out of a main receive signal path. Each individual tuning element is switched into or out of the receive signal path using a single PIN diode. For series connected tuning elements, the diode is connected in parallel to the tuning element. For tuning elements connected in parallel, the diode is connected in series with the tuning element. The diodes are switched in accordance with control voltages which forward bias the diodes to effectively create a low resistance path thus either inserting or removing a tuning element from the receive signal path depending on its configuration in the circuit.

Abstract: A chip resistor includes an insulating substrate 11, top terminal electrodes 12 formed on top surface of the substrate using silver-based cermet, bottom electrodes 13, resistive element 14 that is situated between the top terminal electrodes 12 and overlaps them partially, an optional internal protective coating 15 that covers resistive element 14 completely or partially, an external protective coating 16 that covers completely the internal protection coating 15 and partially covers top terminal electrodes 12, a plated layer of nickel 17 that covers face sides of the substrate, top 12 and bottom 13 electrodes, and overlaps partially external protective coating 16, finishing plated layer 18 that covers nickel layer 17. The overlap of nickel layer 17 and external protective layer 16 possesses a sealing property because of metallization of the edges of external protective layer 16 prior to the nickel plating process.

Abstract: A precision high-frequency capacitor includes a dielectric layer formed on the front side surface of a semiconductor substrate and a first electrode on top of the dielectric layer. The semiconductor substrate is heavily doped and therefore has a low resistivity. A second electrode, insulated from the first electrode, is also formed over the front side surface. In one embodiment, the second electrode is connected by a metal-filled via to a layer of conductive material on the back side of the substrate. In alternative embodiments, the via is omitted and the second electrode is either in electrical contact with the substrate or is formed on top of the dielectric layer, yielding a pair of series-connected capacitors. ESD protection for the capacitor can be provided by a pair of oppositely-directed diodes formed in the substrate and connected in parallel with the capacitor.

Abstract: A chip resistor includes an insulating substrate 11, top terminal electrodes 12 formed on top surface of the substrate using silver-based cermet, bottom electrodes 13, resistive element 14 that is situated between the top terminal electrodes 12 and overlaps them partially, an optional internal protective coating 15 that covers resistive element 14 completely or partially, an external protective coating 16 that covers completely the internal protection coating 15 and partially covers top terminal electrodes 12, a plated layer of nickel 17 that covers face sides of the substrate, top 12 and bottom 13 electrodes, and overlaps partially external protective coating 16, finishing plated layer 18 that covers nickel layer 17. The overlap of nickel layer 17 and external protective layer 16 possesses a sealing property because of metallization of the edges of external protective layer 16 prior to the nickel plating process.

Abstract: A novel antenna system for receiving transmissions in the VHF and UHF frequency bands particularly suitable as a miniaturized antenna for UHF reception, such as of digital video broadcasting transmissions. The antenna system utilizes a combination of three techniques including (1) the use of dialect loading using a high dielectric constant ceramic substrate; (2) an antenna dielectrically loaded and tuned to a significantly higher frequency than desired; and (3) use of a tuning circuit to compensate for the frequency offset of the antenna thereby shifting the resonant frequency to cover the entire band. The antenna is intentionally designed to be too small to radiate at the frequency of interest. The antenna element is then ‘forced’ to be tuned to the desired lower frequency using passive (or active) reactive components as part of a tuning circuit. Multi-band operation is achieved by providing a bypass switch to connect the antenna element either to (1) a first receiver without the tuning circuit (i.e.

Abstract: Thermally stable four-terminal resistor (current sensor) is characterized by having the capacity to adjust both resistance and temperature coefficient of resistance (TCR), during manufacturing process. The four-terminal resistor includes 3 or 4 elementary resistors R1-R3 forming a closed loop. Resistor R1 is the principal low-ohmic value resistor. The terminals of resistor R1 serve as “Force” terminals of the four-terminal resistor. Resistors R2, R3 form a voltage divider intended to minimize the TCR of the four-terminal resistor and connected in parallel to resistor R1. The terminals of resistor R3 serve as “Sense” terminals of the four-terminal resistor. Resistor R2 may be split into two resistors: R2a, R2b to simplify the implementation of four-terminal resistor. Elementary resistors R1, R2 must have the same sign of TCR. Target resistance and TCR minimization in four-terminal resistor are reached by adjustment of resistance of the elementary resistors.

Abstract: A precision high-frequency capacitor includes a dielectric layer formed on the front side surface of a semiconductor substrate and a first electrode on top of the dielectric layer. The semiconductor substrate is heavily doped and therefore has a low resistivity. A second electrode, insulated from the first electrode, is also formed over the front side surface. In one embodiment, the second electrode is connected by a metal-filled via to a layer of conductive material on the back side of the substrate. In alternative embodiments, the via is omitted and the second electrode is either in electrical contact with the substrate or is formed on top of the dielectric layer, yielding a pair of series-connected capacitors. ESD protection for the capacitor can be provided by a pair of oppositely-directed diodes formed in the substrate and connected in parallel with the capacitor.

Abstract: A precision high-frequency capacitor includes a dielectric layer formed on the front side surface of a semiconductor substrate and a first electrode on top of the dielectric layer. The semiconductor substrate is heavily doped and therefore has a low resistivity. A second electrode, insulated from the first electrode, is also formed over the front side surface. In one embodiment, the second electrode is connected by a metal-filled via to a layer of conductive material on the back side of the substrate. In alternative embodiments, the via is omitted and the second electrode is either in electrical contact with the substrate or is formed on top of the dielectric layer, yielding a pair of series-connected capacitors. ESD protection for the capacitor can be provided by a pair of oppositely-directed diodes formed in the substrate and connected in parallel with the capacitor.

Abstract: A chip resistor includes an insulating substrate 11, top terminal electrodes 12 formed on top surface of the substrate using silver-based cermet, bottom electrodes 13, resistive element 14 that is situated between the top terminal electrodes 12 and overlaps them partially, an optional internal protective coating 15 that covers resistive element 14 completely or partially, an external protective coating 16 that covers completely the internal protection coating 15 and partially covers top terminal electrodes 12, a plated layer of nickel 17 that covers face sides of the substrate, top 12 and bottom 13 electrodes, and overlaps partially external protective coating 16, finishing plated layer 18 that covers nickel layer 17. The overlap of nickel layer 17 and external protective layer 16 possesses a sealing property because of metallization of the edges of external protective layer 16 prior to the nickel plating process.

Abstract: A dielectric ceramic composition has a dielectric constant, K, of at least 200 and a dielectric loss, DF, of 0.0006 or less at 1 MHz. The dielectric ceramic composition may be formed by sintering by firing in air without a controlled atmosphere. The dielectric ceramic composition may have a major component of 92.49 to 97.5 wt. % containing 60.15 to 68.2 wt. % strontium titanate, 11.02 to 23.59 wt. % calcium titanate and 7.11 to 21.32 wt. % barium titanate; and a minor component of 2.50 to 7.51 wt. % containing 1.18 to 3.55 wt. % calcium zirconate, 0.50 to 1.54 wt. % bismuth trioxide, 0.2 to 0.59 wt. % zirconia, 0.02 to 0.07 wt. % manganese dioxide, 0.12 to 0.35 wt. % zinc oxide, 0.12 to 0.35 wt. % lead-free glass frit, 0.24 to 0.71 wt. % kaolin clay and 0.12 to 0.35 wt. % cerium oxide. UHF antennas and monolithic ceramic components may use the dielectric ceramic composition.

Abstract: A bidirectional direct sequence spread spectrum half-duplex RF modem. that can be applied to transmit and receive numerous types of analog and digital pulse modulation. The modem incorporates a SAW based correlator for performing the spreading and de-spreading functions in the transmitter and receiver. A programmable frequency synthesizer provides the frequency source for various signals in the modem including the local oscillator (LO), IF interrogating pulse and clock signals. An upconverter/downconverter provides frequency translation to the desired frequency band. Pulse gating and interrogating pulse shaping are employed to reduce the spectral side bands of the transmitted spread pulse. The RF modem operates as an analog or digital pulse transmitter and receiver. It is adapted to be generic and is versatile enough to be used in many different types of data communication systems, such as OOK, PWM and PPM.

Abstract: A dielectric ceramic composition has a dielectric constant, K, of at least 200 and a dielectric loss, DF, of 0.0006 or less at 1 MHz. The dielectric ceramic composition may be formed by sintering by firing in air without a controlled atmosphere. The dielectric ceramic composition may have a major component of 92.49 to 97.5 wt. % containing 60.15 to 68.2 wt. % strontium titanate, 11.02 to 23.59 wt. % calcium titanate and 7.11 to 21.32 wt. % barium titanate; and a minor component of 2.50 to 7.51 wt. % containing 1.18 to 3.55 wt. % calcium zirconate, 0.50 to 1.54 wt. % bismuth trioxide, 0.2 to 0.59 wt. % zirconia, 0.02 to 0.07 wt. % manganese dioxide, 0.12 to 0.35 wt. % zinc oxide, 0.12 to 0.35 wt. % lead-free glass frit, 0.24 to 0.71 wt. % kaolin clay and 0.12 to 0.35 wt. % cerium oxide. UHF antennas and monolithic ceramic components may use the dielectric ceramic composition.

Abstract: An electronic component such as a capacitor includes a substrate having first and second principal surfaces, a dielectric layer overlaying the first principal surface of the substrate, a first electrode, and a second electrode. There is a passivation layer overlaying the first and second electrodes, a first opening being formed in the passivation layer over the first electrode and a second opening being formed in the passivation layer over the second electrode. A first bottom electrode termination is positioned in the first opening and a second bottom electrode termination is positioned in the second opening. The first bottom electrode termination is electrically connected to the first electrode and the second bottom electrode termination is electrically connected to the second electrode. A standoff is positioned between the first bottom electrode termination and the second bottom electrode termination and attached to the passivation layer to thereby provide support for the electronic component when mounted.

Abstract: A chip resistor includes an insulating substrate 11, top terminal electrodes 12 formed on top surface of the substrate using silver-based cermet, bottom electrodes 13, resistive element 14 that is situated between the top terminal electrodes 12 and overlaps them partially, an optional internal protective coating 15 that covers resistive element 14 completely or partially, an external protective coating 16 that covers completely the internal protection coating 15 and partially covers top terminal electrodes 12, a plated layer of nickel 17 that covers face sides of the substrate, top 12 and bottom 13 electrodes, and overlaps partially external protective coating 16, finishing plated layer 18 that covers nickel layer 17. The overlap of nickel layer 17 and external protective layer 16 possesses a sealing property because of metallization of the edges of external protective layer 16 prior to the nickel plating process.

Abstract: An interwoven spreading code is formed by a stretched spreading code series at a first frequency and a mirror of the stretched spreading code series at a second frequency. The interwoven spreading code can be used to spread a baseband signal. Data can be recovered through correlation of a received signal with the interwoven spreading code. The spreading code used in forming the interwoven spreading code can be a Barker code.