Patents Assigned to WaferMasters, Inc.
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Patent number: 6790475Abstract: A method and system are provided for delivering a source gas to a processing chamber. A source gas delivery method includes providing a precursor chamber configured to hold precursor vapor, providing a saturated precursor vapor at a selected pressure within the precursor chamber, and flowing or diffusing saturated precursor vapor from the precursor chamber to the processing chamber until a selected pressure is provided in the processing chamber. A source gas delivery system includes a precursor chamber configured to hold precursor vapor, a heat source for heating a precursor liquid to provide saturated precursor vapor at a selected pressure within the precursor chamber, and a vapor pathway allowing saturated precursor vapor to enter a processing chamber until a selected pressure is provided in the processing chamber. Advantageously, the present invention allows for improved precursor vapor delivery and enhanced control over thin film deposition with less waste of precursor material.Type: GrantFiled: April 9, 2002Date of Patent: September 14, 2004Assignee: Wafermasters Inc.Inventor: Woo Sik Yoo
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Patent number: 6737361Abstract: A system and method for conserving and/or recycling hydrogen used in processing operations. The present invention can be used with any conventional reactor, which supports semiconductor processes using hydrogen. Hydrogen is pumped into the reactor from a hydrogen gas supply chamber. The hydrogen is used in the reactor as needed to perform the process function. The hydrogen accompanied with other process gases is exhausted from the reactor. The exhausted gases are routed through a scrubber, which is used to separate the hydrogen from the other gases. The other gases are allowed to vent from the system in a typical manner. The hydrogen is then pumped through an H2 purifier, which cleans the hydrogen gas making the gas once again useable in the semiconductor process.Type: GrantFiled: April 6, 2001Date of Patent: May 18, 2004Assignee: WaferMaster, IncInventor: Woo Sik Yoo
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Patent number: 6727194Abstract: A system and method for isothermally distributing a temperature across a semiconductor device. A furnace assembly is provided, which includes a processing tube configured to removably receive a wafer carrier having a full compliment of semiconductor wafers. A heating assembly is provided which can include a resistive heating element positioned to heat air or other gases allowed to enter the process tube. The wafer carrier and heating assembly are vertically raised into a position within the process tube. Once the heating assembly forms a seal with the process tube, the process tube is exhausted and purged of air. Gas is then allowed to flow into the process tube and exchange heat with the heating element. The heated gas circulates through the process tube to convectively raise the temperature of the wafers.Type: GrantFiled: August 2, 2002Date of Patent: April 27, 2004Assignee: WaferMasters, Inc.Inventor: Woo Sik Yoo
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Patent number: 6709470Abstract: A benchtop processing system utilizing a wafer receptacle for wafer processing is provided. The wafer receptacle has a plurality of sloped projections capable of receiving a plurality of wafers having different diameter sizes. The wafer receptacle is transported to a processing chamber from a wafer reception module which can also be used as a cooling module. Advantageously, the benchtop processing system and method of the present invention allows for efficient and compact wafer processing.Type: GrantFiled: April 15, 2002Date of Patent: March 23, 2004Assignee: WaferMasters, Inc.Inventor: Woo Sik Yoo
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Patent number: 6698718Abstract: A valve assembly including a main body defining a central axis and a gate. The gate includes a curved surface relative to the central axis and the gate is disposed within the main body. The gate is rotatable about an axis of rotation running along the length of the gate. The valve assembly also includes an actuation assembly for rotating the gate about the axis of rotation between a first position where said valve is open and a second position where said valve is closed.Type: GrantFiled: August 29, 2001Date of Patent: March 2, 2004Assignee: WaferMasters, Inc.Inventor: Woo Sik Yoo
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Publication number: 20040022528Abstract: A system and method for isothermally distributing a temperature across a semiconductor device. A furnace assembly is provided, which includes a processing tube configured to removably receive a wafer carrier having a full compliment of semiconductor wafers. A heating assembly is provided which can include a heating element positioned to heat air or other gases allowed to enter the process tube. The furnace assembly and process tube are capable of being vertically raised and lowered into a position enclosing the heating assembly within the process tube. Once the heating assembly forms a seal with the process tube, the process tube is exhausted and purged of air. Gas is then allowed to flow into the process tube and exchange heat with the heating element. The heated gas circulates through the process tube to convectively change the temperature of the wafers.Type: ApplicationFiled: December 5, 2002Publication date: February 5, 2004Applicant: WaferMasters, Inc.Inventors: Woo Sik Yoo, Takashi Fukada
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Patent number: 6636626Abstract: A wafer mapping system uses a camera to acquire an image of a carrier containing wafers. In one embodiment, the acquired image is stored as rows and columns of pixels. The presence and location of a wafer in the carrier are determined by looking for pixel intensity variations in a column of the image.Type: GrantFiled: November 30, 1999Date of Patent: October 21, 2003Assignee: WaferMasters, Inc.Inventors: Woo Sik Yoo, Kitaek Kang
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Patent number: 6633132Abstract: An apparatus and process for processing a substrate using components and particles formed in a remote plasma generation section of a processing chamber. The processing chamber includes a processing section and a plasma generation section. A plasma field is generated in the plasma generation section, such that the plasma field is generated remotely from the processing section. Components and particles from the plasma field can diffuse and/or drift from the plasma generation section through a passageway to the processing section. The processing chamber may include a plurality of plasma generation sections for generating additional plasma fields. In each instance, the additional plasma fields are generated remotely from the processing section.Type: GrantFiled: January 23, 2001Date of Patent: October 14, 2003Assignee: WaferMasters Inc.Inventor: Woo Sik Yoo
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Patent number: 6621943Abstract: An improved system and method for obtaining data related to the operation of a processing system which converts from analog measurement data, usually obtained from meters and gages, to digital data. Visual images of various types of measuring instruments are collected and used for measuring a process functionality. An image sensor provides an image of a first feature of the measuring instrument. The image data is processed by an image processor, which is operable to detect a first feature and determine its position relative to a second feature of the measuring instrument. The difference in the relative positions (measured distance) can then be compared to a predetermined or expected value. If the measured and expected values are not substantially the same, a signal can be generated which instructs a controller to adjust the process functionality until the measured value reaches the expected value.Type: GrantFiled: June 8, 2000Date of Patent: September 16, 2003Assignee: WaferMasters, Inc.Inventors: Woo Sik Yoo, Kitaek Kang, Taro Yamazaki
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Patent number: 6602797Abstract: A wafer processing system occupies minimal floor space by using vertically mounted modules such as reactors, load locks, and cooling stations. Further saving in floor space is achieved by using a loading station which employs rotational motion to move a wafer carrier into a load lock. The wafer processing system includes a robot having extension, rotational, and vertical motion for accessing vertically mounted modules. The robot is internally cooled and has a heat resistant end-effector, making the robot compatible with high temperature semiconductor processing.Type: GrantFiled: April 23, 2002Date of Patent: August 5, 2003Assignees: WaferMasters, Inc., Tokyo Electron LimitedInventors: Hiromitsu Kuribayashi, Woo Sik Yoo
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Patent number: 6591161Abstract: A robot wafer alignment tool uses a reflector mounted on a multi-axis robot to determine the position of the robot or other objects within a chamber. The reflector reflects images to at least one camera from an area or object of interest in the chamber.Type: GrantFiled: January 31, 2001Date of Patent: July 8, 2003Assignee: WaferMasters, Inc.Inventors: Woo Sik Yoo, Kitaek Kang
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Patent number: 6575739Abstract: A processing system including a chamber defining an interior cavity having a processing tube assembly arranged within the interior cavity. A heating assembly moveable relative to the processing tube assembly from a first position where said processing tube assembly is disposed within the heating assembly and a second position where the processing tube assembly is exposed to an internal environment within the interior cavity of the chamber.Type: GrantFiled: April 15, 2002Date of Patent: June 10, 2003Assignee: WaferMasters, Inc.Inventor: Woo Sik Yoo
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Patent number: 6568899Abstract: A wafer processing system occupies minimal floor space by using vertically mounted modules such as reactors, load locks, and cooling stations. Further saving in floor space is achieved by using a loading station which employs rotational motion to move a wafer carrier into a load lock. The wafer processing system includes a robot having extension, rotational, and vertical motion for accessing vertically mounted modules. The robot is internally cooled and has a heat resistant end-effector, making the robot compatible with high temperature semiconductor processing.Type: GrantFiled: November 30, 1999Date of Patent: May 27, 2003Assignees: WaferMasters, Inc., Tokyo Electron LimitedInventors: Hiromitsu Kuribayashi, Woo Sik Yoo
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Publication number: 20030042457Abstract: A valve assembly including a main body defining a central axis and a gate. The gate includes a curved surface relative to the central axis and the gate is disposed within the main body. The gate is rotatable about an axis of rotation running along the length of the gate. The valve assembly also includes an actuation assembly for rotating the gate about the axis of rotation between a first position where said valve is open and a second position where said valve is closed.Type: ApplicationFiled: August 29, 2001Publication date: March 6, 2003Applicant: WaferMasters, Inc.Inventor: Woo Sik Yoo
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Patent number: 6528435Abstract: An apparatus and method for depositing a thin film on a semiconductor substrate. The apparatus includes a chamber or housing suited for holding a plurality of wafer platforms. The wafer platforms are arranged stacked in the chamber equidistant and electrically isolated from each other wafer platform. At least two of the plurality of wafer platforms are electrically coupled to a power source to form a first electrode and a second electrode. The remainder of the plurality of wafer platforms are disposed therebetween. In this manner, the first electrode and the second electrode form a single series capacitor. At least one reactant gas is provided in the chamber and reacted with sufficiently supplied energy to form a plasma. Radicals or ions from the plasma react on the surface of the wafers to cause a thin film layer to be distributed on the equally dispersed wafers positioned on a surface of the wafer platforms.Type: GrantFiled: August 25, 2000Date of Patent: March 4, 2003Assignee: WaferMasters, Inc.Inventor: Woo Sik Yoo
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Patent number: 6516244Abstract: A system and associated method for aligning semiconductor wafers and wafer-like objects relative to a transport mechanism. An image of, for example, a wafer is acquired, digitized, and stored in a computer as an array of pixels, each pixel representing a point on the image. Data points along the edge of the wafer are extracted and used to geometrically estimate the center of the wafer object. The estimated wafer center is then compared to the position of a predetermined reference position to determine an offset. Using this information, the wafer transport mechanism can then be re-adjusted to pick up the wafer on the corrected center.Type: GrantFiled: August 25, 2000Date of Patent: February 4, 2003Assignee: WaferMasters, Inc.Inventors: Woo Sik Yoo, Kitaek Kang
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Patent number: 6500737Abstract: A system and method for providing substantially defect free rapid thermal processing. The present invention includes a wafer processing system used to process semiconductor wafers into electronic devices. In accordance with the present invention, once the wafer is processed, a shield can be inserted into the reactor to a position between the reactor heating surface and the wafer. The shield causes the temperature of the wafer to be reduced. Once the temperature of the wafer has been reduced to below a predetermined critical temperature, the robot picks up the wafer and removes the wafer from the processing chamber.Type: GrantFiled: June 8, 2000Date of Patent: December 31, 2002Assignee: WaferMasters, Inc.Inventor: Woo Sik Yoo
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Patent number: 6500264Abstract: A processing system and associated method for vacuum evaporation of material onto a substrate. The processing system includes a loading chamber, a transfer chamber, and a thermal processing chamber arranged together to form a cluster tool. The cluster tool arrangement provides the system a continuous processing capability. The system also includes an evacuation system arrangement for evacuating the processing system to adequate processing pressure levels. The evacuation system arrangement includes a series of pumps, which are capable of maintaining the selected processing pressure levels for continuous thermal evaporation processing without the need for lowering the pressure to deep vacuum pressure levels.Type: GrantFiled: April 6, 2001Date of Patent: December 31, 2002Assignee: WaferMasters, Inc.Inventor: Woo Sik Yoo
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Publication number: 20020090836Abstract: A wafer processing system which requires no isolation between the operational areas within the processing system. The system of the present invention includes operational areas, such as a loading area, a transport area, and a reactor or thermal processing area. Advantageously, since there are no isolation devices or gate valves separating the areas, the processing system effectively has each operational area combined into a “single” chamber. Preferably, the single chamber has a single slit valve, hinge door, or other vacuum sealable door disposed proximate to the loading area to allow for the removal/insertion of the wafers into the loading area. Once the door to the loading area has been closed the internal pressure within the chamber can be kept uniform throughout each operational area.Type: ApplicationFiled: February 14, 2002Publication date: July 11, 2002Applicant: WaferMasters, Inc.Inventor: Yoo Woo Sik
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Patent number: 6410455Abstract: A wafer processing system occupies minimal floor space by using vertically mounted modules such as reactors, load locks, and cooling stations. Further saving in floor space is achieved by using a loading station which employs rotational motion to move a wafer carrier into a load lock. The wafer processing system includes a robot having extension, rotational, and vertical motion for accessing vertically mounted modules. The robot is internally cooled and has a heat resistant end-effector, making the robot compatible with high temperature semiconductor processing.Type: GrantFiled: November 30, 1999Date of Patent: June 25, 2002Assignees: WaferMasters, Inc., Tokyo Electron LimitedInventors: Hiromitsu Kuribayashi, Woo Sik Yoo