Abstract: An integrated circuit package structure having an array of metal pegs connected by printed circuit lines. The package includes a die pad having a die positioned above and an area array distribution of external metal pegs surrounding the die. The package also contains a plurality of internal metal pegs that surround the die. These internal pegs are electrically connected to the bonding pads on the die via conductive medium. The die pad, the die, the conductive medium and the internal pegs are all enclosed by an insulating material. The bottom side of the die pad is exposed while the external metal pegs are electrically connected to various internal metal pegs using printed circuit lines. Furthermore, an electroplate layer is also formed on the end face of each metal peg.

Abstract: An improved heat dissipation module for BGA IC's is a thin metal module used for heat dissipation in an encapsulated IC device. It has an annular base with several supports extending from its inner rim upwards to support a top plate. At least one protruding annular ring is provided on the top surface of the top plate. This design can ensure the top plate and a mold match during the capsulation process, avoid the glue overflow problem, and increase its total dissipation area to facilitate heat dissipation.

Abstract: A semiconductor die package has a lead frame, a die attached to the lead frame and an encapsulant enclosing the lead frame and the die. The distance between the top outside face of the encapsulant and the frame is substantially equal to the distance between the bottom outside face of the encapsulant and the die, and the distance between the top outside face of the encapsulant and the frame is substantially two and half times the distance between the bottom outside face of the encapsulant and the lead frame. Consequently, the different thickness of different encapsulant portions achieves an optimum balance during curing that effectively reduces the deformation of the encapsulant. In addition, the encapsulant can be completely formed by an injection process, and no crack will form in the encapsulant.

Abstract: A semiconductor die package has a lead frame, a die attached to the lead frame and an encapsulant enclosing the lead frame and the die. The distance between the top outside face of the encapsulant and the frame is substantially equal to the distance between the bottom outside face of the encapsulant and the die, and the distance between the top outside face of the encapsulant and the frame is substantially two and half times the distance between the bottom outside face of the encapsulant and the lead frame. Consequently, the different thickness of different encapsulant portions achieves an optimum balance during curing that effectively reduces the deformation of the encapsulant. In addition, the encapsulant can be completely formed by an injection process, and no crack will form in the encapsulant.

Abstract: A stacked integrated circuit structure, in which main package bodies of a plurality of integrated circuits are stacked on each other. Connections between leads of the stacked integrated circuits are made by means of a stacking substrate. Therein, each of two surfaces of the stacking substrate has a plurality of terminals electrically connected to corresponding terminals. The stacking substrate includes a plurality of through vias as well, which connect to the corresponding terminals of the two surfaces. For two stacked integrated circuits, a hole can be defined in the stacking substrate, which housed the main package body of one of the two stacked integrated circuits, or by means of a plurality of separated substrates arranged around the perimeter of the main package body of one of the two stacked integrated circuits, so that the thickness of the stacked integrated circuits can be reduced.

Abstract: A method for forming ball grid array package. The ball grid array package has internal trace lines and exposed metal pegs. A metal substrate is provided. Electroplated layers are formed over metal peg regions and a die pad region on the surface of the metal substrate. A layer of substrate material at the top surface of the metal substrate is removed so that thickness of the metal substrate is reduced. Hence, trace lines, die pad and internal metal pegs are formed. A die is attached to the die pad and electrical connections from the die to the internal metal pegs are made. A molding process is carried out to enclose the die, the die pad and the internal metal pegs on one side of the metal substrate with plastic material. The lower surface of the metal substrate is etched to form external metal pegs while exposing the mold material and the bottom surface of the die pad. The internal metal pegs and the external metal pegs are interconnected via the trace lines.

Abstract: A semiconductor package containing a silicon chip, a lead frame, a plurality of conductive wires, a heat sink and some packaging material. Both the silicon chip and the heat sink are mounted on the lead frame, and the silicon chip is located between the heat sink and the lead frame. The silicon chip is electrically connected to some contact points on the lead frame by a plurality of conductive wires, and the space between the heat sink and the lead frame is filled with packaging material. The heat sink has a narrow pinhole gate and a plurality of conical positioning holes. The pinhole gate is formed in the middle of the heat sink so that packaging material can enter the mold cavity in the middle through the roof of the package. Both the pinhole gate and the positioning holes are filled with packaging material.

Abstract: The addition of a heat slug to a lead frame establishes a heat conduction path from a silicon chip on the lead frame to the heat slug. Hence, when a semiconductor package that encloses the lead frame and the silicon chip is formed, heat produced by the silicon chip can still be channeled away through the radiating surface of the heat slug. Furthermore, the heat slug can be bent over to cover burrs outside the package.

Abstract: A lead frame for a semiconductor package. The lead frame includes a die pad and a plurality of leads. One surface of the die pad supports a silicon chip while the other surface has a plurality of annular grooves all having the same geometric center. The inner lead portion of the leads surrounds the die pad, but the die pad and the leads are on different planar surfaces.