Abstract: A system and method for configuring a virtual computing environment to operate in direct interrupt mode; receiving a triggering event triggering a transition from direct interrupt mode to virtual interrupt mode; copying contents of a physical interrupt queue into a virtual interrupt queue; acknowledging vectors present in the physical interrupt queue; and transitioning the virtual computing environment to virtual interrupt mode. The system includes a processor for performing the steps of the method.

Abstract: A method including mapping a first portion of a virtual memory containing code of an operating system for access by a processor; receiving a call for an entry point of the operating system; and mapping, after receiving the call, a second portion of the virtual memory containing data for executing entry point code associated with the entry point for access by the processor. The processor executing the operating system code is permitted to access only data from the first and second portions of the virtual memory.

Abstract: A device and method generates a graphical representation for memory leak detection. The method includes executing a selected application for a time period. The method includes determining a plurality of memory application programming interface (API) functions performed during the execution of the selected application in the time period. Each of the memory API functions request a chunk of a memory of the electronic device at a specified time. The method includes determining select ones of the memory API functions that do not release the respective chunk of the memory in the time period. The method includes generating the graphical representation including the selected memory API functions at the respective specified time for identification of a memory leak of the selected application.

Abstract: A method and system encrypts data in a least privileged operating system. The method includes determining a first encryption scheme to be used with software code to be mapped to a virtual memory. The method includes mapping a first portion of the virtual memory with the software code for access by a processor using the first encryption scheme. The method includes receiving a call for an entry point of the operating system. The method includes determining a second encryption scheme to be used with the entry point when mapped to the virtual memory. The method includes mapping a second portion of the virtual memory for executing entry point code associated with the entry point for access by the processor using the second encryption scheme. The processor executing the software code is permitted to access only data from the first and second portions of the virtual memory.

Abstract: A system and method for dynamically processing data across a plurality of processor cores in a multi-core computing environment for breaking down incoming data traffic into a plurality of segments and dynamically distribute and re-distribute the segments on an ongoing basis so as to allocate the handling of data traffic in a resource efficient manner.

Abstract: A method including selecting a prospective local port from a plurality of available local ports for a computing environment; determining a hash value based on the prospective local port, the hash value being further determined based on a hash value determination method of a network interface of the computing environment; determining whether the hash value results in incoming traffic being delivered to a selected one of a plurality of cores of the computing environment; and sending data relating to an application executed by the selected core over the network interface using the prospective local port, if the hash value results in incoming traffic being delivered to the selected core.

Abstract: An electronic device includes a processing component and a task manager. The processing component is configurable for one of a single-core processing mode and a multi-core processing mode. The task manager determines a number of tasks running on the electronic device. The processor is configured to switch between either the single-core processing mode or the multi-core processing mode as a function of the number of tasks.

Abstract: The exemplary embodiments described herein relate to systems and methods for operating system aware low latency handling. One embodiment relates to a non-transitory computer readable storage medium including a set of instructions executable by a processor, the set of instructions, when executed, resulting in a performance of receiving a fast interrupt request asserted by a hardware device while the processor is executing within a kernel critical section, executing a fast interrupt handler at a first priority level, raising a second priority level interrupt by the fast interrupt handler based on the fast interrupt request, wherein the second priority level interrupt invokes a kernel service and processing the second priority level interrupt once the processor has executed the kernel critical section.

Abstract: The exemplary embodiments describe systems and methods for utilizing a semaphore with timeout and lock-free path for message passing architectures. One embodiment is related to a method comprising receiving a request from a client to access an object, the object including a plurality of resources, placing the request in a lock-free pend queue of a semaphore, manipulating a count of the semaphore based on an availability of at least one of the plurality of resources, and determining whether the client can use a fast path to the object.

Abstract: The exemplary embodiments described herein relate to supporting fast and deterministic execution and simulation in multi-core environments. Specifically, the exemplary embodiments relate to systems and methods for implementing determinism in a memory system of a multithreaded computer. A exemplary system comprises a plurality of processors within a multi-processor environment, a cache memory within the processor and including metadata, and a hardware check unit performing one of a load check and a store check on the metadata to detect a respective one of a load metadata mismatch and a store metadata mismatch, and invoking a runtime software routine to order memory references upon a detection of one of the load metadata mismatch and the store metadata mismatch.

Abstract: A non-transitory computer-readable storage medium storing a set of instructions that are executable by a processor. The set of instructions, when executed by one or more processors of a multi-processor computing system, causes the one or more processors to perform operations including initiating a first processor of the multi-processor computing system with an operating system image of an operating system, the operating system image including a predetermined object map, initiating a second processor of the multi-processor computing system with the operating system image, placing a plurality of system objects with corresponding processors according to the predetermined object map, receiving a triggering event causing a change to the predetermined object map and relocating one of the system objects to a different one of the processors based on the change to the predetermined object map.

Abstract: A method includes duplicating, by an acceleration engine that is associated with a software application executing in a computing environment, a state of a kernel stack of an operating system of the computing environment to generate a duplicate network stack; receiving, by the acceleration engine, a request by the software application to send traffic over a network interface; and sending, by the acceleration engine, the request to a network driver relating to the network interface.

Abstract: A method including mapping a first portion of a virtual memory containing code of an operating system for access by a processor; receiving a call for an entry point of the operating system; and mapping, after receiving the call, a second portion of the virtual memory containing data for executing entry point code associated with the entry point for access by the processor. The processor executing the operating system code is permitted to access only data from the first and second portions of the virtual memory.

Abstract: A method for an acquisition of a semaphore for a thread includes decrementing a semaphore count, storing a current thread context of the semaphore when the semaphore count is less than a first predetermined value, determining a release count of a pending queue associated with the semaphore where the pending queue indicates unpended threads of the semaphore, and adding the thread to the pending queue when the release count is less than a second predetermined value.

Abstract: A method for extracting static information from user code, analyzing the static information to determine location expressions for program information and comparing the location expressions to reference location expressions of the user code. In addition, a system having a reading module configured to read and extract static information from user code, an analyzing module configured to analyze the static information to determine location expressions for program information and a comparison module configured to compare the location expressions to reference location expressions of the user code.

Abstract: A non-transitory computer-readable storage medium storing a set of instructions executable by a processor, the set of instructions, when executed by the processor, causing the processor to perform operations including mapping a memory area storing a segment of code for a kernel of the system during an initialization time of a system. The operations also include executing the segment of code during the initialization time. The operations also include unmapping a portion of the memory area for the kernel after the segment of code has been executed.

Abstract: A non-transitory computer-readable storage medium storing a set of instructions that are executable by a processor. The set of instructions, when executed by one or more processors of a multi-processor computing system, causes the one or more processors to perform operations including initiating a first processor of the multi-processor computing system with an operating system image of an operating system, the operating system image including a predetermined object map, initiating a second processor of the multi-processor computing system with the operating system image, placing a plurality of system objects with corresponding processors according to the predetermined object map, receiving a triggering event causing a change to the predetermined object map and relocating one of the system objects to a different one of the processors based on the change to the predetermined object map.

Abstract: A method includes receiving, from a requesting guest environment, a device call requesting access to a device; sending the device call to an emulating guest environment, the emulating guest environment emulating the device; receiving, from the emulating guest environment, a result of the device call; and sending the result of the device call to the requesting guest environment.

Abstract: A method includes receiving a request to access a resource; determining a presence of a memory buffer in a hardware-assisted memory pool; and determining a response to the request to access the resource based on the presence of the memory buffer. A system includes a plurality of processors, a resource, and a hardware-assisted memory pool including a memory buffer; one of the plurality of processors receives a request to access the resource, determines a presence of the memory buffer, and determines a response to the request to access the resource based on the presence of the memory buffer.

Abstract: A method including selecting a prospective local port from a plurality of available local ports for a computing environment; determining a hash value based on the prospective local port, the hash value being further determined based on a hash value determination method of a network interface of the computing environment; determining whether the hash value results in incoming traffic being delivered to a selected one of a plurality of cores of the computing environment; and sending data relating to an application executed by the selected core over the network interface using the prospective local port, if the hash value results in incoming traffic being delivered to the selected core.