Abstract: A system and method deterministically switches context in a real-time scheduler to guarantee schedule periodicity. The method includes determining a time slice for each of the plurality of processes. The method includes determining a time slice switch duration between consecutive ones of the time slices. The method includes determining a starting point for each time slice. The method includes generating a schedule as a function of the time slices, the time slice switch durations, and the starting points of the time slices. The schedule includes an order for each of the time slices for a respective one of the plurality of processes. Each of the time slices and each of the time slice switch durations are required to run for their entire duration to guarantee a periodicity of the schedule.

Abstract: A system and method donates time from a first process to a second process. The method includes determining a time slice for each of a plurality of processes to generate a schedule therefrom. The method includes determining a time donation scheme for the first process, the time donation scheme indicative of a donation policy in which the execution time of the first process is donated to the second process. During execution of the processes, the method includes receiving a request from the first process for a time donation to the second process and executing the second process during the time slice of the first process.

Abstract: The exemplary embodiments describe systems and methods for utilizing a semaphore with timeout and lock-free path for message passing architectures. One embodiment is related to a method comprising receiving a request from a client to access an object, the object including a plurality of resources, placing the request in a lock-free pend queue of a semaphore, manipulating a count of the semaphore based on an availability of at least one of the plurality of resources, and determining whether the client can use a fast path to the object.

Abstract: The exemplary embodiments described herein relate to systems and methods for identifying and authenticating a mobile platform. One embodiment relates to a method comprising receiving, by a mobile platform, a digital certificate from an integrated circuit card (“ICC”) via close-proximity radio communication, verifying the digital certificate with a digital signature stored on the mobile platform, and booting the mobile platform upon verification of the digital certificate of the ICC. A further embodiment relates to a mobile platform, comprising a non-transitory computer readable storage medium storing a digital signature, and a processor receiving a digital certificate from an integrated circuit card (“ICC”) via close- proximity radio communication between the ICC and the mobile platform, verifying the digital certificate with the digital signature, booting the mobile platform upon verification of the digital certificate of the ICC.

Abstract: A system includes a memory including a plurality of software applications. The plurality of software applications includes a first software application and a second software application. The system also includes a deterministic group comprising a first processing core. The first processing core executes a first resource monitor and the first software application. The system also includes a constrained group comprising a second processing core. The second processing core executes a second resource monitor and the second software application. The first resource monitor detects an insufficient access to resources by the first software application and sends an indication to the second resource monitor. The second resource monitor receives the indication and instructs the second processing core to modify execution of the second software application.

Abstract: The exemplary embodiments described herein relate to systems and methods for optimizing the aging and learning processes. One embodiment relates to a system comprising a shared memory, a plurality of forwarding cores in communication with the shared memory, wherein each forwarding core includes a local memory, and an arbitrator core in communication with the forwarding cores and the shared memory, wherein the arbitrator core receives forwarding information from a plurality of forwarding cores, wherein each of the forwarding cores includes a local memory storing local forwarding tables, synchronizes the forwarding information from each of the local forwarding tables to generate a temporary working table, sorts the temporary working table into a predetermined array, generates a master forwarding table from the temporary working table, and distributes the master forwarding table to each of the forwarding cores.

Abstract: The exemplary embodiments described herein relate to systems and methods for improved process switching of a paravirtualized guest with a software-based memory management unit (“MMU”). One embodiment relates to a non-transitory computer readable storage medium including a set of instructions executable by a processor, the set of instructions, when executed, resulting in a performance of the following: create a plurality of new processes for each of a plurality of virtual environments, each of the virtual environments assigned one of a plurality of address space identifiers (“ASIDs”) stored in a cache memory, perform a process switch to one of the virtual environments thereby designating the one of the virtual environments as the active virtual environment, determine whether the active virtual environment has exhausted each of the ASIDs, and flush a cache memory when it is determined that the active virtual environment has exhausted each of the ASIDs.

Abstract: A method includes duplicating, by an acceleration engine that is associated with a software application executing in a computing environment, a state of a kernel stack of an operating system of the computing environment to generate a duplicate network stack; receiving, by the acceleration engine, a request by the software application to send traffic over a network interface; and sending, by the acceleration engine, the request to a network driver relating to the network interface.

Abstract: A method includes receiving a request to access a resource; determining a presence of a memory buffer in a hardware-assisted memory pool; and determining a response to the request to access the resource based on the presence of the memory buffer. A system includes a plurality of processors, a resource, and a hardware-assisted memory pool including a memory buffer; one of the plurality of processors receives a request to access the resource, determines a presence of the memory buffer, and determines a response to the request to access the resource based on the presence of the memory buffer.

Abstract: A system and method for receiving a request from a requester for access to a computing resource, instructing the requester to wait for access to the resource when the resource is unavailable and allowing the requester to perform other tasks while waiting, determining whether the requester is available when the resource subsequently becomes available, and granting access to the resource by the requester if the requester is available.

Abstract: The exemplary embodiments described herein relate to systems and methods for operating system aware low latency handling. One embodiment relates to a non-transitory computer readable storage medium including a set of instructions executable by a processor, the set of instructions, when executed, resulting in a performance of receiving a fast interrupt request asserted by a hardware device while the processor is executing within a kernel critical section, executing a fast interrupt handler at a first priority level, raising a second priority level interrupt by the fast interrupt handler based on the fast interrupt request, wherein the second priority level interrupt invokes a kernel service and processing the second priority level interrupt once the processor has executed the kernel critical section.

Abstract: Described is a method for determining whether a first partition selected to run in a time window is a member of a transaction, the transaction including at least one further partition, determining a tail partition from among the at least one further partition and scheduling the tail partition to run in the time window. A transaction scheduler having a transaction determination module determining whether a first partition selected to run in a time window is a member of a transaction, the transaction including at least one further partition, a tail determination module determining a tail partition from among the at least one further partition and a scheduling module scheduling the tail partition to run in the time window.

Abstract: A system and method for setting a first indicator indicating that interrupts are virtually locked, receiving a first interrupt at a processor of a computing device, setting a second indicator indicating the receipt of the first interrupt and recording a first timestamp based on the receipt of the first interrupt. The system and method further adapted to virtually execute a routine for the first interrupt that includes determining if the second indicator is set, record a second timestamp based on the virtual execution of the routine and determine an interrupt latency based on the first and second timestamp.

Abstract: A method including requesting access to a resource governed by a spinlock; determining an allocation of the resource to a further requester; determining an expiration of a time limit for the spinlock, if the resource is allocated to the further requester; and initiating a fault recovery, if the time limit is expired.

Abstract: A host having a network interface communicating with a plurality of users and a plurality of target devices, a workbench tool including software development tools, the plurality of users having access to the workbench, at least one user creating a first sensorpoint module using the workbench and a database storing the first sensorpoint module, the host loading the first sensorpoint module onto at least one of the target devices.

Abstract: A system and method for receiving an image of compiled user code, scanning the image to determine each of a plurality of functions included in the user code and creating a separately compiled executable module corresponding to selected ones of the plurality of functions, wherein the module includes instructions to create a stack trace for the selected ones of the functions.

Abstract: A computer implemented method of computer implemented method for installing a code object in a user process virtual memory space, while the user process is running is provided. The user process is run in a virtual memory space. A controller process is run in a different virtual memory space than the user process. The control process requests to a kernel module to install the code object into the virtual memory space of the user process. The kernel module installs the code object into the virtual memory space of the user process, while the user process is running.

Abstract: A device includes a data interface and a memory. The memory includes a first memory area and a second memory area. The first memory area stores a base module including an operating system and boot logic operative to load a further module. The second memory area stores a module comprising a software application. The first memory area and the second memory area do not reside within a file system.

Abstract: A system and method for storing a plurality of trace records in a memory and searching, by a hardware processor, the plurality of trace records for specific trace data from the trace records, the searching including feeding the trace records back into a hardware real time event processor that collected the trace records.

Abstract: Described herein are systems and methods for fast boot from non-volatile (“NV”) memory. The exemplary embodiments relate to systems and methods for significant improvements in performance speed with simple implementations. One embodiment relates to a non-transitory computer readable storage medium including a set of instructions executable by a processor, the set of instructions operable to identify a page fault, determine whether the page fault occurred due to a read from a NV memory, copy a page from the NV memory to a random-access memory (“RAM”) storage, and create an identity mapping for the page in the RAM storage.