Abstract: A semiconductor device may include a first active component region (20) and a second active region (22) extending flat along a first lateral direction (L1) and a second lateral direction (L2) deviating from said first lateral direction. The semiconductor device may include a trench isolation structure (10, 10?) that electrically isolates the first active component region (20) from the second active region (22) along the first lateral direction (L1) and comprises at least one electrically conductive sidewall (14, 14?, 14?); said trench isolation structure (10) having a continuously extending insulating trench isolation base wall (30) and a plurality of spaced apart trench isolation portions (32a, 32b) with electrically conductive sidewall portions (14a, 14b) therebetween. The plurality of trench isolation portions (32a, 32b) and the electrically conductive sidewall portions (14a, 14b) are spaced (a, b) from the base wall (30).

Abstract: The invention relates to a geometric design and corresponding methods for components 22, which are produced on a carrier substrate 10 and prepared by detachment in an etching process 30 for a subsequent absorption and a transfer with a stamp for application to a further substrate. The components 22 are designed in such a way that additional active surfaces are provided for the etching process 30 for undercut the components, so that a faster, more reliable and more homogeneous etching profile is achieved.

Abstract: A Complementary Metal Oxide Semiconductor (CMOS) wavefront sensor including a sensor element having an array of photodiodes and a passivation layer covering the sensor element. The sensor further includes a binary lens formed in the passivation layer and arranged to focus incident light onto the sensor element.

Abstract: A semiconductor device, which comprises: a silicon substrate having a front surface and a back surface; a metal layer located on said front surface; a through silicon via (TSV) extending through said silicon substrate from said back surface to said front surface, wherein said TSV is connected at one end to said metal layer; and a redistribution layer (RDL), wherein said RDL is embedded in said silicon substrate.

Abstract: A single photon avalanche diode (SPAD) device comprises: a silicon layer; an active region in said silicon layer for detecting incident light; and a blocking structure overlapping said active region for blocking incident light having a wavelength at least in the range of 200 nm to 400 nm, so that light having said wavelength can only be detected by said SPAD device when incident upon a region of said silicon layer outside of said active region.

Abstract: A method of fabricating a laterally diffused metal oxide semiconductor transistor including providing a substrate, forming a first well of a first doping polarity type in the substrate, forming a gate on a portion of the first well, the gate including an oxide layer and an at least partially conductive layer on the oxide layer, and forming a mask on at least a portion of the gate and at least a portion of the first well, wherein the mask has a sloping edge. The method further includes forming a second well of a second doping polarity type at least partially in the first well by implanting ions in the first well, the second well extending under a portion of the gate, the second doping polarity type being of opposite type to the first doping polarity type. The method includes forming a first one of a source and drain of the first doping polarity type in or on the second well, thereby defining a channel of the transistor under the gate.

Abstract: Protection against electrostatic discharges is to be improved for electronic devices, or is to be provided in the first place. The device for protection against electrostatic discharges having an integrated semiconductor protection device comprises an inner region (1) configured at least as a thyristor (SCR) and at least one outer region (2a, 2b) configured as a corner region, which is formed and configured at least as a PNP transistor. The inner region (1) and the at least one outer region (2a, 2b) are arranged adjacent to one another.

Abstract: Methods for mounting devices on a non-native substrate by a transfer stamp are disclosed. A method may include providing (102) a first semiconductor wafer (300) comprising mostly functional first devices (304) and a few non-functional first devices (302) in a first grid pattern (x, y); providing (102) a second semiconductor wafer (400) comprising second devices (402) in a second grid pattern (x?, y?); removing (108) the non-functional first devices (302) from the first semiconductor wafer (300) in respective individual first transfer printing steps; transferring (110) a plurality of the functional first devices (304) from the first semiconductor wafer (300) to the associated second devices (402) of the second semiconductor wafer (400) in a second transfer printing step; and transferring (112) individual functional first devices (304) of the first semiconductor wafer (300) to second devices not having first devices printed thereon (408) in respective individual third transfer printing steps.

Abstract: A semiconductor arrangement including a substrate, a dielectric layer, and a semiconductor layer disposed between the substrate and the dielectric layer. The arrangement further includes an ohmic contact including a plurality of metal contact fragments located in a plurality of trenches formed in the dielectric layer, and a metallic connector layer electrically connecting the metal contact fragments. The ohmic contact electrically connects the metallic connector layer to the semiconductor layer.

Abstract: A Complementary Metal Oxide Semiconductor, CMOS, device for radiation detection. The CMOS device includes a semiconductor diffusion layer having a photodetector region for receiving incident light, and a polysilicon layer having a patterned structure in a region at least partially overlapping the photodetector region. The structure includes a plurality of features being perforations extending through the polysilicon layer or columns of polysilicon, wherein the perforations are filled with, or the columns are surrounded by, a dielectric material.

Abstract: Methods for the production of a semiconductor device are disclosed. In one embodiment, a method may include: (1) mechanically contacting a first substrate (100) having a semiconductor material to a second substrate (200) having a bondable passivation material and contact vias (210) extending through the bondable passivation material; (2) covering the contact vias (210) with an at least high-resistance material (220, 300) on a side facing away from the first substrate (100); (3) applying an electric potential between the at least high-resistance material and the first substrate. The potential has a sufficient level that is functionally sufficient to initiate a bonding process between the bondable passivation material of the second substrate and the semiconductor material of the first substrate.

Abstract: A semiconductor device may include a first active component region (20) and a second active region (22) extending flat along a first lateral direction (L1) and a second lateral direction (L2) deviating from said first lateral direction. The semiconductor device may include a trench isolation structure (10, 10?) that electrically isolates the first active component region (20) from the second active region (22) along the first lateral direction (L1) and comprises at least one electrically conductive sidewall (14, 14?, 14?); said trench isolation structure (10) having a continuously extending insulating trench isolation base wall (30) and a plurality of spaced apart trench isolation portions (32a, 32b) with electrically conductive sidewall portions (14a, 14b) therebetween. The plurality of trench isolation portions (32a, 32b) and the electrically conductive sidewall portions (14a, 14b) are spaced (a, b) from the base wall (30).

Abstract: A semiconductor device for light detection comprises: a photodiode comprising an optical active region; and a resistor connected to said photodiode and overlapping at least a part of said optical active region, wherein the resistor comprising an anti-reflective coating for reducing reflection loss.

Abstract: A wafer suitable for epitaxial growth of gallium nitride (GaN) in a Metal Oxide Chemical Vapor Deposition (MOCVD) process. The wafer includes a silicon substrate having a front side and a back side and an edge extending between the front side and the back side, the edge including a front bevel surface connected to the front side and a back bevel surface connected to the back side, wherein the silicon substrate comprises an oxygen denuded silicon layer surrounding a core. The wafer further includes a protection layer being a thermally grown silicon oxide (SiO2) layer substantially covering the front bevel surface and the back bevel surface of the edge, while leaving at least a central region of the front side of the silicon substrate exposed, for preventing meltback during the MOCVD process.

Abstract: Electrically modulatable photodiode, comprising a substrate having a first and a second p-n junction, a common contact for jointly contacting the p or n dopings of the two p-n junctions, and two further contacts for separately contacting the other doping of the p and n dopings of the two p-n junctions, and a circuit, wherein the circuit is designed to measure a current flow caused by charge carriers which have been generated by impinging radiomagnetic waves in the substrate and which have reached the first further contact, and to switch the second further contact at different times to at least one first and one second switching state, wherein in the first switching state the second further contact is switched to the floating state and in the second switching state a potential is applied, and wherein a blocking voltage applied between the common contact and the first further contact is constant.

Abstract: Methods of fabricating a field-effect transistor, where the methods include providing a substrate, forming a first well of a first doping polarity type in the substrate, and forming a gate on a portion of the first well, the gate comprising an oxide layer and an at least partially conductive layer on the oxide layer. A second well of a second doping polarity type is formed by implanting ions in the first well, the second well extending under a portion of the gate. A first one of a source and drain of the first doping polarity type in or on the second well is formed, thereby defining a channel of the transistor under the gate. A second one of the source and drain of the first doping polarity type in or on the first well is formed. The second well may be formed by means of a two-step implant.

Abstract: A semiconductor device for light detection including a semiconductor layer having an optical active region for receiving incident light and a peripheral region around the optical active region. The device further includes a lens layer including a first lens for directing light into the optical active region, the first lens being located in a first region of the lens layer which overlaps a part but not the whole of the optical active region in the semiconductor layer.

Abstract: A semiconductor structure (100; 200) is provided.

Abstract: A semiconductor memory device comprising a strained semiconductor layer and a contact etch stop layer, CESL, wherein the strained semiconductor layer and the CESL are both arranged to reduce the probability of an electron tunnelling out of a charge trapping layer of the semiconductor memory device.

Abstract: The transfer of devices or device components from a carrier substrate to a further carrier substrate or to a plurality of further carrier substrates can be performed with little effort (few transfer steps) to the at least one further carrier substrate. The method comprises producing first devices on the first carrier substrate in a two-dimensional grid. It comprises defining positions on the second carrier substrate on the basis of the two-dimensional grid for at least some of the first devices. It comprises releasing a plurality of the first devices from the first carrier substrate while maintaining the two-dimensional grid. Finally, the plurality of first devices are applied to the second carrier substrate in the defined positions while maintaining the two-dimensional grid or a multiple thereof in at least one of the two directions.