Patents Assigned to Yield Engineering Systems, Inc.
  • Patent number: 11919036
    Abstract: A method of improving the adhesion of a metal-organic interface in an electronic device includes providing a substrate with a metal structure, treating a surface of the metal structure to form a monolayer coating of a selected chemical composition on the surface, and coating the treated surface with an organic material.
    Type: Grant
    Filed: August 9, 2023
    Date of Patent: March 5, 2024
    Assignee: YIELD ENGINEERING SYSTEMS, INC.
    Inventor: Kenneth Sautter
  • Publication number: 20240066618
    Abstract: A method of using a processing oven may include disposing at least one substrate in a chamber of the oven and activating a lamp assembly disposed above them to increase their temperature to a first temperature. A chemical vapor may be admitted into the chamber above the at least one substrate and an inert gas may be admitted into the chamber below the at least one substrate. The temperature of the at least one substrate may then be increased to a second temperature higher than the first temperature and then cooled down.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Applicant: Yield Engineering Systems, Inc.
    Inventors: Lei Jing, M Ziaul Karim, Kenneth Sautter, Kang Song
  • Patent number: 11850672
    Abstract: A method of using a processing oven may include disposing at least one substrate in a chamber of the oven and activating a lamp assembly disposed above them to increase their temperature to a first temperature. A chemical vapor may be admitted into the chamber above the at least one substrate and an inert gas may be admitted into the chamber below the at least one substrate. The temperature of the at least one substrate may then be increased to a second temperature higher than the first temperature and then cooled down.
    Type: Grant
    Filed: July 25, 2022
    Date of Patent: December 26, 2023
    Assignee: YIELD ENGINEERING SYSTEMS, INC.
    Inventors: Lei Jing, M Ziaul Karim, Kenneth Sautter, Kang Song
  • Patent number: 11818849
    Abstract: A method of improving the adhesion of a metal-organic interface in an electronic device includes providing a substrate with a metal structure, depositing a mono-layer of a selected silane composition on a surface of the metal structure with a vapor of the selected silane composition, and coating the treated surface with an organic material.
    Type: Grant
    Filed: April 21, 2023
    Date of Patent: November 14, 2023
    Assignee: YIELD ENGINEERING SYSTEMS, INC.
    Inventors: Kenneth Sautter, Syndee Young, Charudatta Galande
  • Publication number: 20230294190
    Abstract: A semiconductor processing apparatus includes a process chamber that defines an enclosure. The enclosure includes a substrate support configured to support a substrate and rotate the substrate about a central axis of the process chamber. The substrate support is also configured to move vertically along the central axis and position the substrate at multiple locations in the enclosure. The apparatus also includes one or more UV lamps configured to irradiate a top surface of the substrate supported on the substrate support.
    Type: Application
    Filed: May 3, 2023
    Publication date: September 21, 2023
    Applicant: Yield Engineering Systems, Inc.
    Inventors: Tapani Laaksonen, M Ziaul Karim, Christopher Lane, Craig Walter McCoy, Ramakanth Alapati
  • Patent number: 11688621
    Abstract: A batch processing oven comprising a processing chamber and a rack configured to be positioned in the processing chamber. The rack is configured to support a plurality of substrates and a plurality of panels in a stacked manner such that one or more substrates of the plurality of substrates are positioned between at least one pair of adjacent panels of the plurality panels. Vertical gaps separate each substrate of the one or more substrates from an adjacent substrate or panel on either side of the substrate.
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: June 27, 2023
    Assignee: YIELD ENGINEERING SYSTEMS, INC.
    Inventors: Mark William Curry, Ronald R. Stevens, Craig W. McCoy, Charudatta Galande, Gabriel Ormonde
  • Publication number: 20230117184
    Abstract: A batch processing oven includes a processing chamber, a magnet, and a rack. The processing chamber includes a gas inlet on a first side and a gas outlet on a second side opposite the first side, the gas inlet is configured to direct a hot gas into the processing chamber and the gas outlet is configured to exhaust the convective energy in parallel with the radiative energy from the walls. The magnet is arranged such that its north pole will be formed on the first side of the processing chamber and its south pole will be formed on the second side of the processing chamber. The rack is configured to be positioned between the first and second ends of the processing chamber and is configured to support a plurality of vertically spaced-apart substrates.
    Type: Application
    Filed: October 20, 2021
    Publication date: April 20, 2023
    Applicant: Yield Engineering Systems, Inc.
    Inventors: M. Ziaul Karim, Christopher Lane
  • Publication number: 20230060603
    Abstract: A method of using a processing oven may include disposing at least one substrate in a chamber of the oven and activating a lamp assembly disposed above them to increase their temperature to a first temperature. A chemical vapor may be admitted into the chamber above the at least one substrate and an inert gas may be admitted into the chamber below the at least one substrate. The temperature of the at least one substrate may then be increased to a second temperature higher than the first temperature and then cooled down.
    Type: Application
    Filed: July 25, 2022
    Publication date: March 2, 2023
    Applicant: Yield Engineering Systems, Inc.
    Inventors: Lei Jing, M Ziaul Karim, Kenneth Sautter, Kang Song
  • Patent number: 11465225
    Abstract: A method of using a solder reflow oven can include disposing at least one substrate including solder in a chamber of the oven. The method can include decreasing a pressure of the chamber to a first pressure between about 0.1-50 Torr. After decreasing the pressure of the chamber, the temperature of the at least one substrate can be increased to a first temperature. Formic acid vapor can be admitted into the chamber above the at least one substrate while nitrogen is discharged into the chamber below the at least one substrate. The method can also include removing at least a portion of the formic acid vapor from the enclosure. After the removing step, the temperature of the at least one substrate can be further increased to a second temperature higher than the first temperature. The at least one substrate can be maintained at the second temperature for a first time. And then, the at least one substrate can be cooled.
    Type: Grant
    Filed: March 11, 2022
    Date of Patent: October 11, 2022
    Assignee: YIELD ENGINEERING SYSTEMS, INC.
    Inventors: Lei Jing, M Ziaul Karim, Kenneth Sautter, Kang Song
  • Patent number: 11456274
    Abstract: A method of using an oven includes supporting a substrate on a rotatable spindle in a processing chamber of the oven and rotating the substrate. The method may also include raising the spindle with the substrate to a heating zone and activating a lamp assembly to heat a top surface of the substrate. The substrate may then be lowered to a dosing zone and a chemical vapor directed into the processing chamber above the substrate. The substrate may then be further heated using the lamp assembly and cooled.
    Type: Grant
    Filed: March 4, 2022
    Date of Patent: September 27, 2022
    Assignee: YIELD ENGINEERING SYSTEMS, INC.
    Inventors: M Ziaul Karim, Lei Jing, Kenneth Sautter
  • Patent number: 11444053
    Abstract: The present disclosure is directed to a compact vertical oven for reflow of solder bumps for backend processes in semiconductor wafer assembly and packaging. This disclosure describes a vertical oven which uses a plurality of wafers (e.g., an example value is 50-100 wafers) in a batch with controlled injection of the reducing agent (e.g. formic acid), resulting in a process largely free of contamination. This disclosure describes controlled formic acid flow through a vertical system using laminar flow technology in a sub-atmospheric pressure environment, which is not currently available in the industry. The efficacy of the process depends on effective formic acid vapor delivery, integrated temperature control during heating and cooling, and careful design of the vapor flow path with exhaust. Zone-dependent reaction dynamics managed by vapor delivery process, two-steps temperature ramp control, and controlled cooling process and formic acid content ensures the effective reaction without any flux.
    Type: Grant
    Filed: April 17, 2020
    Date of Patent: September 13, 2022
    Assignee: YIELD ENGINEERING SYSTEMS, INC.
    Inventors: M Ziaul Karim, Randy Hall, Peter Krotov
  • Patent number: 11367640
    Abstract: A process chamber system adapted for both vacuum process steps and steps at pressures higher than atmospheric pressure. The chamber door may utilize a double door seal which allows for high vacuum in the gap between the seals such that the sealing force provided by the high vacuum in the seal gap is higher than the opposing forces due to the pressure inside the chamber and the weight of the components.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: June 21, 2022
    Assignee: Yield Engineering Systems, Inc.
    Inventors: William Moffat, Craig Walter McCoy
  • Publication number: 20220189809
    Abstract: A batch processing oven comprising a processing chamber and a rack configured to be positioned in the processing chamber. The rack is configured to support a plurality of substrates and a plurality of panels in a stacked manner such that one or more substrates of the plurality of substrates are positioned between at least one pair of adjacent panels of the plurality panels. Vertical gaps separate each substrate of the one or more substrates from an adjacent substrate or panel on either side of the substrate.
    Type: Application
    Filed: March 31, 2021
    Publication date: June 16, 2022
    Applicant: Yield Engineering Systems, Inc.
    Inventors: Mark William Curry, Ronald R. Stevens, Craig W. McCoy, Charudatta Galande, Gabriel Ormonde
  • Patent number: 11335662
    Abstract: A solder reflow oven may include a reflow chamber and a plurality of vertically spaced apart wafer-support plates positioned in the reflow chamber. A plurality of semiconductor wafers each including a solder are configured to be disposed in the reflow chamber such that each semiconductor wafer is disposed proximate to, and vertically spaced apart from, a wafer-support plate. Each wafer-support plate may include at least one of liquid-flow channels or resistive heating elements. A control system control the flow of a hot liquid through the channels or activate the heating elements to heat a wafer to a temperature above the solder reflow temperature.
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: May 17, 2022
    Assignee: YIELD ENGINEERING SYSTEMS, INC.
    Inventors: M Ziaul Karim, Randy Hall, Peter Krotov
  • Patent number: 11296049
    Abstract: A solder reflow oven includes a processing chamber that defines an enclosure. The enclosure includes a spindle configured to support a substrate and rotate the substrate about a central axis of the processing chamber. The spindle is also configured to move vertically along the central axis and position the substrate at different locations within the enclosure. The oven further includes a chemical delivery tube configured to direct a chemical vapor into the enclosure, a lamp assembly configured to heat a top surface of the substrate, and a lift assembly configured to move the spindle along the central axis.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: April 5, 2022
    Assignee: YIELD ENGINEERING SYSTEMS, INC.
    Inventors: Christopher Lane, Eli Vronsky, Taylor Nguyen, Ronald R Stevens, Gabriel Ormonde, Jed Hsu
  • Publication number: 20210398937
    Abstract: A solder reflow oven may include a reflow chamber and a plurality of vertically spaced apart wafer-support plates positioned in the reflow chamber. A plurality of semiconductor wafers each including a solder are configured to be disposed in the reflow chamber such that each semiconductor wafer is disposed proximate to, and vertically spaced apart from, a wafer-support plate. Each wafer-support plate may include at least one of liquid-flow channels or resistive heating elements. A control system control the flow of a hot liquid through the channels or activate the heating elements to heat a wafer to a temperature above the solder reflow temperature.
    Type: Application
    Filed: September 2, 2021
    Publication date: December 23, 2021
    Applicant: Yield Engineering Systems, Inc.
    Inventors: M Ziaul Karim, Randy Hall, Peter Krotov
  • Patent number: 10840068
    Abstract: A device and method of spreading plasma which allows for plasma etching over a larger range of process chamber pressures. A plasma source, such as a linear inductive plasma source, may be choked to alter back pressure within the plasma source. The plasma may then be spread around a deflecting disc which spreads the plasma under a dome which then allows for very even plasma etch rates across the surface of a substrate. The apparatus may include a linear inductive plasma source above a plasma spreading portion which spreads plasma across a horizontally configured wafer or other substrate. The substrate support may include heating elements adapted to enhance the etching.
    Type: Grant
    Filed: February 15, 2018
    Date of Patent: November 17, 2020
    Assignee: Yield Engineering Systems, Inc.
    Inventors: William Moffat, Craig Walter McCoy
  • Patent number: 10490431
    Abstract: A process chamber system adapted for both vacuum process steps and steps at pressures higher than atmospheric pressure. The chamber door may utilize a double door seal which allows for high vacuum in the gap between the seals such that the sealing force provided by the high vacuum in the seal gap is higher than the opposing forces due to the pressure inside the chamber and the weight of the components.
    Type: Grant
    Filed: March 12, 2018
    Date of Patent: November 26, 2019
    Assignee: Yield Engineering Systems, Inc.
    Inventors: William Moffat, Craig Walter McCoy
  • Patent number: 10319612
    Abstract: A process for the drying, and subsequent imidization, of polyimide precursors which minimizes or eliminates voids and which minimizes or eliminates discoloration. The process uses a sequential set of descending pressure operations that allow for time efficient processing of wafers. The set of descending pressure operations are interspersed with evacuation processes using heated gasses, which combine heating and byproduct evacuation. The process results in layers with reduced or eliminated voiding, discoloration, and solvent retention.
    Type: Grant
    Filed: October 29, 2018
    Date of Patent: June 11, 2019
    Assignee: Yield Engineering Systems, Inc.
    Inventor: William Moffat
  • Patent number: RE49802
    Abstract: A process for the drying, and subsequent imidization, of polyimide precursors which minimizes or eliminates voids and which minimizes or eliminates discoloration. The process uses a sequential set of descending pressure operations that allow for time efficient processing of wafers. The set of descending pressure operations are interspersed with evacuation processes using heated gasses, which combine heating and byproduct evacuation. The process results in layers with reduced or eliminated voiding, discoloration, and solvent retention.
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: January 16, 2024
    Assignee: YIELD ENGINEERING SYSTEMS, INC.
    Inventor: William Moffat