Abstract: Apparatus and method for automatically controlling the rotation of an angularly positionable antenna from one angular position to a desired new angular position. The disclosed technique provides the user with a list of destination indicia, each of which corresponds to a geographic location. The user is also provided with a selector for choosing one or more of the available destination indicia. Once the user selects a destination index, a retrieval system automatically retrieves the appropriate geographic reference location from a destination indicia table stored in memory. A calculation is then automatically performed to determine the desired angular position of the antenna with respect to an arbitrary reference angle. The antenna rotor shaft is then energized to rotate the shaft to the desired angular position.

Abstract: A personal portable computer having a fluorescent backlit LCD is provided with circuitry for mitigating noticeable flicker of the backlight. The signal driving the backlight is synchronized with the display refresh signal. More particularly, a horizontal sync signal from an LCD driver is applied to a counter which divides the horizontal sync signal by a predetermined amount. The counter is reset after each frame of the display is written by a vertical sync signal. The output of the counter is applied to a pluse width modulator, such as a monostable multivibrator, which provides a signal to the backlight, synchronized with the display refresh signal. The circuitry also allows for the duty cycle of the backlight signal to be adjusted to control the brightness of the display and consequently the power drain on the battery.

Abstract: A method and main memory system that provides a processor cache includes. Dual-port random access memory devices used for main memory, with one port providing typical random access and a second port being associated with an internal shift register that contains sequential instruction words. Improved system speed can be achieved by virtue of the shorter access time of the second port. A preferred embodiment is adapted to employ conventional video random access memory devices as constituents of a main memory system with unique control methods.

Abstract: A method of dynamically prefetching data for a cache memory is controlled by the past history of data requests. If the previous fetch and current fetch request are not sequential, no data is prefetched. If the previous fetch and current fetch request are sequential and less than all of the current fetch request is already in the cache, two blocks of data sequentially beyond the current fetch request are prefetched. If the previous two blocks fetched and current fetch request are sequential and less than all of the current fetch request is already in the cache, four blocks of data sequentially beyond the current fetch request are prefetched. If the previous three blocks fetched and the current fetch request are sequential and less than all of the current fetch request is already in the cache, eight blocks of data sequentially beyond the current fetch request are preferred. The prefetch algorithm is limited at eight blocks.

Abstract: A computing device includes a system control processor, a built-in keyboard having a plurality of keys, a connector which facilitates connection of an external keyboard or keypad to the device, an electronic switch which is controlled by the internal keyboard processor and can electrically couple the connector to the system control processor. The internal keyboard processor monitors signals from the system control processor, connector and internal keyboard keys in order to open and close the analog switch so as to facilitate transfers between the system control processor and the internal keyboard through itself, and transfers between the system control processor and an external keyboard through the electronic switch.

Abstract: A memory system includes a memory unit with plural addressable storage locations, a connector arrangement for detachably electrically coupling the memory unit to a computer, and a decoding arrangement for determining whether a computer memory address is within a range of addresses to which the memory unit is to respond, the decoding arrangement including a base address register storing a value representing the first address in the range and a size register defining the number of addresses in the range.

Abstract: A computer bus interface suited to connecting an expansion bus to a computer's internal bus. The interface is capable of selecting and deselecting any devices coupled to the expansion bus by enabling and disabling buffers which intercept signals between the expansion bus and the internal bus.

Abstract: A computer system reads data from selected locations in a memory while each address applied to the memory is temporarily stored in a register. If a data error is detected, two flipflops are set, one of which can generate and interrupt the central processing unit, and the other of which disables an AND gate through which a load signal is applied to the register in order to disable the register. An arrangement for resetting the second flipflop includes a third flipflop which is set and reset respectively at the beginning and end of each input/output cycle and which has an output coupled to one input of an AND gate having a further input to which is applied a signal selectively actuable by the central processing unit, the output of the AND gate and a system reset signal being applied to inputs of an OR gate which has its output connected to a reset input of the second flipflop.

Abstract: Four parallel, spaced arrays of apertures are provided in a printed circuit (PC) board to accommodate mounting of 16- and 18-pin dynamic random access memories (DRAMs) within a minimum area footprint. First and second 8-aperture linear arrays are provided in the PC board in spaced relation to accommodate 16-pin DRAMs as are third and fourth 9-aperture linear arrays to accommodate 18-pin DRAMs, wherein the third and fourth arrays of apertures are aligned parallel with and respectively positioned intermediate and outside of the first and second arrays of apertures in the PC board. Corresponding apertures in the 16- and 18-aperture arrays for receiving corresponding pins of the 16- and 18- pin DRAMs are electrically coupled, with the two additional apertures of the 18-aperture array extending beyond the 16-aperture array and aligned therewith.

Abstract: A slide guide for a removable computer drive module that permits the module to float as a self aligning connector engages. A computer housing has tracks that guide the module as it is inserted and release the forward end of the module just before the connector engages alignment pins that align the connector as it engages.

Abstract: An improved means and method for expanded memory system access and control is disclosed. A logic array in the expanded memory control circuitry which accesses and controls up to two separate expansion boards through the use of static random access memory as register circuits and octal buffers for addressing. The control and access method implemented through a state machine in the logic array provides the operation of the improved expanded memory system to control additional expansion boards and to access the appropriate memory locations.

Abstract: A method and apparatus for monitoring the voltage discharge of a battery power supply while under load, and to manage the power supply by accurately calculating the time the useful charge is nearly depleted, providing a series of warnings to the user-operator of that fact, and subsequently performing a system shutdown before a complete discharge of the battery. If the invention is applied to a battery power supply for a computer, the series of warnings enable the computer operator to transfer data from a temporary memory to permanent storage in the time interval between a warning signal and computer shutdown; and since computer shutdown is effected before the battery is fully discharged a battery-destructive phenomenon known as a polarity cell reversal is prevented.

Abstract: An installation mechanism for a removable computer drive module with a handle operated automatically engaging dual rack and pinion device. The pinions are carried by the handle which is pivotally mounted adjacent a module receiving opening in a console. The module carries a pair of rails that have the rack gears formed integrally at one end. After the handle is pivoted to an upward position, the module is inserted into the console and pushed forward engaging the handle pinions. Further pushing on the module causes driving engagement between the racks and the pinions forcing the handle to pivot downwardly. The connectors between the module and the console are engaged by grasping and rotating the handle further downwardly driving the module further into the console.

Abstract: An improved method for refreshing dynamic random access memory devices is disclosed. Normal refresh clocking signals are monitored and a count accumulated up to a selected value. Refresh operations are then initiated less frequently and only when the selected count has been accumulated. Once control of the bus to the memory has been achieved, a burst of refresh operations are performed prior to release of the bus. Improved efficiency and operating speed may be achieved by minimizing wasted time associated with acquisition and control of the bus. A preferred embodiment illustrates savings associated with a burst of four refresh operations each time the bus to the memory device is acquired for refreshing. Page addressing techniques are enhanced by forcing a change of state of the row address strobe line bus frequently than typical refresh operations.

Abstract: Disclosed is an assembly for a hard disk drive which is removable from a computer. A latch is provided suitable for forcing the the drive into or out of engagement with the computer against resistance from mounting guide rails and an electrical connector. The latch is also suitable for locking the drive securely in place when it is in use and for carrying the drive between computers.

Abstract: A portable computer with a base and keyboard with a pivotal lid assembly containing both a visual display panel and a parallel mounted central processing unit circuit board, as well as coplanar memory and visual display driving circuitry. The lid assembly is provided with front and rear clam shell covers with the front cover holding a bezel around the visual display (an LCD), and the front also provides the supports for the circuit boards in spaced, parallel relation to both the LCD and the rear cover, so when the lid is open and generally vertical, air blows by convection through lower vent holes in the covers, over both sides of the boards, and exits through upper vent holes.

Abstract: A computer stand for supporting a horizontal compute in a vertical position.

Abstract: Page mode memory access is enabled despite an immediately previous idle cycle. A row address strobe signal is maintained active during an idle cycle so that if a page hit is detected on a subsequent memory cycle, all that is needed to read or write to memory is a column address strobe signal which can be provided via a page mode access. In this manner, memory speed is enhanced because a conventional access is not required on the first memory cycle following one or more idle cycles.