Abstract: A circuit board includes at least one core substrate, at least one insulating layer and at least one dielectric sheet. An opening is defined in the insulating layer corresponding to the core substrate. An area of cross-section of the opening is larger than that of the core substrate. The core substrate is received in the opening. The dielectric sheet is positioned on one side surface of the core substrate and the insulating layer. A cavity is defined in the circuit board. A number of pads of the core substrate are exposed via the cavity. The present disclosure also provides a method for manufacturing the circuit board and package structure.

Abstract: A printed circuit board with circuit visible includes a wiring layer, a first adhesive layer, a first dielectric layer, and a cover film, which are stacked in described order, the wiring layer comprising at least one electrical contact pad. The cover film has at least one opening corresponding to the electrical contact pad. The cover film includes a second dielectric layer and a second adhesive layer. A flow initiation temperature of the first adhesive layer is in a range from 85 degrees centigrade to 90 degrees centigrade, and a hardening temperature of the first adhesive being lower than 150 degrees centigrade.

Abstract: A printed circuit board includes an insulating layer, a signal trace, a ground trace, and a fin. The insulating layer has a first surface and an opposite second surface. The signal trace and the ground trace are formed on the first surface of the insulating layer. The first fin is directly formed on the ground trace. Also provided is a method for manufacturing the printed circuit board.

Abstract: An exemplary multilayer printed circuit board includes a first circuit substrate, a third circuit substrate, a second circuit substrate between the first and third circuit substrates, a first anisotropically conductive adhesive layer between the first and second circuit substrates, and a second anisotropically conductive adhesive layer between the second and third circuit substrates. The first circuit substrate includes a first conductive terminal and a first through hole. The second circuit substrate includes a second conductive terminal and two through holes (i.e. second and third through holes). The third circuit substrate includes a third conductive terminal and a fourth through hole. The first anisotropically conductive adhesive layer fills the first and third through holes to electrically connect the first and second conductive terminals. The second anisotropically conductive adhesive layer fills the second and fourth through holes to electrically connect the second and third conductive terminals.

Abstract: A heat-dissipating interposer includes an insulating base, a plurality of conductive pillars and a thermal conducting frame. The insulating base includes a first surface and an opposite second surface. The conductive pillars are arranged on the insulating base. The conductive pillars protrude from the second surface. The height of the conductive pillars relative to the second surface is greater than the thickness of the insulating base. The thermal conducting frame is placed on the second surface and receives a heat-generating component. The interposer can be used in a package on package structure.

Abstract: A packaging substrate includes a base layer, a first wiring layer, a second wiring layer, a first solder mask layer, a second solder mask layer and copper portions. The first second wiring layers are arranged on opposite sides of the base layer. The first solder mask layer covers the first wiring layer, and defines plenty of first openings. The first wiring layer exposed through the first openings serves as first contact pads. The second solder mask layer covers the second wiring layer. The second solder mask layer defines plenty of second openings. The second wiring layer exposed through the second openings serves as second contact pads. The copper portions are formed on the second contact pads. The copper portions protrude beyond the second solder mask layer. This disclosure further relates to a method of manufacturing the packaging substrate and a chip packaging body.

Abstract: A printed circuit board includes a first outer electrically conductive pattern layer, a first insulation layer, a first inner electrically conductive pattern layer, a connection adhesive sheet, a second inner electrically conductive layer, a second insulation layer, a second outer electrically conductive pattern layer, and a identification mark, which are arranged in that order. The first outer electrically conductive pattern layer includes many first gold fingers. The second outer electrically conductive pattern layer includes many second gold fingers. The blind hole corresponds to the identification mark. The first outer electrically conductive pattern layer, the second outer electrically conductive pattern layer, and the at least one identification mark are simultaneously formed.

Abstract: In a method for manufacturing a printed circuit board, a substrate, including a number of plated through holes (PTHs) is provided. Each of the PTHs has an electrically conductive layer plated on its inner wall and includes an electrically connecting portion and a stub. A protective layer is formed on a surface of the substrate adjacent to the stub. An etching device, including an upper plate and a number of spray tubes corresponding to the PTHs, is provided. Each of the spray tubes includes a protruding portion beyond the upper plate. The substrate is arranged in such a manner that the protective layer is in contact with the upper plate and the protruding portions are received in the stubs. After that, the protruding portions spray an etchant to etch and remove the electrically conductive layer of the stubs, and the protective layer is removed.

Abstract: A printed circuit board includes a first, second, and third dielectric layers, and a first, second, and third trace layers. The first trace layer and the second trace layer are formed on opposite surfaces of the first dielectric layer. The second dielectric layer is formed on the second trace layer, a first blind hole is defined in the first surface and terminated at a position in the first dielectric layer, a first conductive via is formed in the first blind hole. A second blind hole is formed in the second dielectric layer and the first dielectric layer. A second conductive via is formed in the second blind hole. The third trace layer is electrically connected with the second conductive via. The first trace layer is electrically connected with the second trace layer through the first conductive via and the second conductive via.

Abstract: A chip packaging substrate includes a dielectric layer, a first inner wiring layer embedded in the dielectric layer, an outer wiring layer, and many conductive connection points. The outer wiring layer is formed at one side of the dielectric layer, and is electrically connected to the first inner wiring layer through many first conductive vias in the dielectric layer. The conductive connection points are formed at the other side of the dielectric layer, and are electrically connected to the first inner wiring layer through many second conductive vias in the dielectric layer.

Abstract: A printed circuit board includes a first trace layer, a first dielectric layer, a second trace layer, a second dielectric layer, a third trace layer, a third dielectric layer and a fourth trace layer arranged in that order. A cavity is defined in the printed circuit board running through from the fourth trace layer to the second dielectric layer. Portion of the second dielectric layer is exposed in the cavity. Surfaces of the fourth trace layer combining with the second dielectric layer, and surfaces of the second trace layer combining with the first dielectric layer, are all roughened to increase the strength of adhesion.

Abstract: A packaging substrate includes a supporting sheet, a copper foil, a number of connecting pads, a number of solder balls, a resin layer, a wiring layer and a solder mask layer. The copper foil is attached on a surface of the supporting sheet through an adhesive sheet. The connecting pads are formed on the copper foil. The solder balls are formed on the connecting pads. The resin layer infills the gaps between the solder balls. The wiring layer is formed on the resin layer and the solder balls. Terminal portions of the solder balls facing away from the connecting pads are electrically connected to the wiring layer. The solder mask layer is formed on the wiring layer. The solder mask layer defines a number of openings exposing portions of the wiring layer. The portions of the wiring layer exposed through the openings serve as contact pads.

Abstract: A method for manufacturing a package on package structure includes the steps of: providing a connection substrate comprising a main body and electrically conductive posts, the main body comprising a first surface and an opposite second surface, each electrically conductive post passing through the first and second surfaces, and each end of the two ends of the electrically conductive post protruding from the main body; arranging a first package device on a side of the first surface of the connection substrate, arranging a package adhesive on a side of the second surface of the connection substrate, thereby obtaining a semi-finished package on package structure; and arranging a second package device on a side of the package adhesive furthest from the first package device, thereby obtaining a package on package structure.

Abstract: A printed circuit board includes a base, a number of conductive pads, a dielectric layer, an activated metal layer, a first metal seed layer, a second metal seed layer, and a plurality of metal bumps. The conductive pads are formed on the base. The dielectric layer is formed on a surface of the conductive pads and portions of the base are exposed from the c conductive pads. The dielectric layer includes blind vias corresponding to the conductive pads, and a laser-activated catalyst. The activated metal layer is obtained by laser irradiation at the wall of the blind via. The activated metal layer is in contact with the dielectric layer. The second metal seed layer is formed on the activated metal layer and the conductive pads. Each metal bump is formed on the second metal seed layer, and each metal bump protrudes from the dielectric layer.

Abstract: A method for manufacturing a package on package structure includes the step of: providing a package body comprising a first package device and a connection substrate, the first package device comprising a number of first solder pads, the connection substrate comprising a substrate main body and a number of first electrically conductive posts, the first electrically conductive posts spatially corresponding to and being connected to the first solder pads, and a solder paste printed on each first electrically conductive post; attaching a second device on the second surface of the connection substrate, thereby obtaining a stacked structure, the second package device comprising a number of second solder pads; and solidifying the solder paste on each first electrically conductive post, such that each second solder pad is soldered to the corresponding first electrically conductive post using the solder paste, thereby obtaining a package on package structure.

Abstract: A printed circuit board includes a base, a circuit pattern, a solder mask, an activated metal layer, a plurality of metal seed layers, and a plurality of metal bumps. The conductive circuit pattern is formed on the base, to include a plurality of conductive pads. The solder mask is formed on a surface of the conductive circuit pattern and portions of the base are exposed from the circuit pattern. The solder mask includes blind vias corresponding to the pads, and laser-activated catalyst. The activated metal layer is obtained by laser irradiation at the wall of the blind via. The activated metal layer is in contact with the solder mask. The metal seed layer is formed on the activated metal layer and the pads. Each metal bump is formed on the metal seed layer, and each metal bump protrudes from the solder mask.

Abstract: A method for manufacturing a PCB includes certain steps. A printed circuit board sheet is provided. The printed circuit board includes an unwanted portion and a printed circuit board unit which includes a plurality of contact pads. An imaginary boundary line is defined between the printed circuit board unit and the unwanted portion. Each of the contact pads defines an outline. A nearest distance between the outline and the imaginary boundary line is less than 4 millimeters. The printed circuit board sheet is punched along the imaginary boundary line, forming one hollow portion or a plurality of through slots. A plurality of burrs is generated on an inner surface of the hollow portion or the through slots. The burrs are removed using a low-energy laser cutting process, thereby obtaining a printed circuit board. A laser power used in the low-energy laser cutting process is 5-8 watts.

Abstract: A method for manufacturing a multilayer FPCB includes certain steps. A first printed circuit substrate is provided, the first printed circuit substrate includes a first copper layer and a first protective film, the film defining a first opening. A second printed circuit substrate is provided, this substrate includes a second copper layer and a second protective film. The second protective film defines a second opening. The first printed circuit substrate is laminated together with the second printed circuit substrate by an adhesive sheet. The adhesive sheet defines a third opening in communication with and aligned with the first opening and the second opening. The first copper layer is then etched to form a first outer wiring layer and the third copper layer is also etched to form a second outer wiring layer, thereby obtaining a multilayer FPCB.

Abstract: A printed circuit board includes a first electrically conductive circuit pattern, a substrate layer, an adhesive sheet, and a second electrically conductive circuit pattern, which are arranged in the above described order. The printed circuit board includes a single layer electrically conductive circuit area. The adhesive sheet defines a first opening spatially corresponding to the single layer electrically conductive circuit area. The adhesive sheet includes a first inner sidewall surrounding the first opening. The second electrically conductive circuit pattern defines a second opening spatially corresponding to the single layer electrically conductive circuit area. The second electrically conductive circuit pattern includes a second inner sidewall surrounding the second opening. The first inner sidewall and the second inner sidewall are not completely coplanar.

Abstract: A method for manufacturing a resin coating on copper foil includes following steps. Firstly, two diamines of 2,2-bis[4-(4-aminophenoxy)phenyl] propane and 4,4?-oxydianiline, and two acid anhydrides of pyromellitic diandydride and oxydiphthalic anhydride are added into a polar aprotic solvent and the solvent is stirred to form a mixed solution. Secondly, the mixed solution is heated to a temperature of about 170° C.-190° C. to allow a cross-linking reaction to be completed between the two diamines and the two acid anhydrides, thereby forming a thermoplastic polyimide adhesive fluid. The thermoplastic polyimide adhesive fluid is coated on a copper foil and cured to form a thermoplastic polyimide adhesive layer on the copper foil, thereby obtaining a resin coated copper foil. This disclosure also relates to resin coated copper foil and a method for manufacturing a multi-layer circuit board.