Abstract: Direct memory access (‘DMA’) in a hybrid computing environment that includes a host computer, an accelerator, the host computer and the accelerator adapted to one another for data communications by a system level message passing module, where DMA includes identifying, by the system level message passing module, a buffer of data to be transferred from the host computer to the accelerator according to a DMA protocol; segmenting, by the system level message passing module, the buffer of data into a predefined number of memory segments; pinning, by the system level message passing module, the memory segments against paging; and asynchronously with respect to pinning the memory segments, effecting, by the system level message passing module, DMA transfers of the pinned memory segments from the host computer to the accelerator.

Abstract: A phase locked loop (“PLL”) includes a voltage controlled oscillator (“VCO”) operable to acquire and maintain lock at a selected output frequency of the VCO and control logic operable to perform steps in a method of selecting a frequency band for operating the VCO.

Abstract: A mechanism is provided for firehose dumping modified data in a static random access memory of a hard disk drive to non-volatile memory of the hard disk drive during a power event. Responsive an indication of a power event in the hard disk drive, hard disk drive command processing is suspended. A token is set in the non-volatile storage indicating that flash memory in the non-volatile memory contains modified data. A portion of a static random access memory cache table containing information on the modified data in the static random access memory is copied to the flash memory. The modified data from the static random access memory is then copied to the flash memory. Responsive to a determination that the power event that initiated the copy of the modified data in the static random access memory to the flash memory is still present, the hard disk drive is shut down.

Abstract: Disclosed is a circuit configured to synchronize multiple signals received by one clock domain from a different asynchronous clock domain, when simultaneous movement of the signals between the clock domains is intended. In the circuit multiple essentially identical pipelined signal paths receive digital input signals. XOR gates are associated with each of the signal paths. Each XOR gate monitors activity in a given signal path and controls, directly or indirectly (depending upon the embodiment), advancement of signal processing in the other signal path(s) to ensure that, if warranted, output signals at the circuit output nodes are synchronized. In a two-signal path embodiment, advancement of signal processing in one signal path is triggered, whenever transitioning digital signals are detected within the other signal path. In an n-signal path advancement of signal processing is triggered in all signal paths, whenever transitioning digital signals are detected on at least one signal path.

Abstract: A rack mount assembly measurement tool, for determining physical values including air flow and heat loads, includes a front assembly and a rear duct assembly that are non-intrusively and releasably mounted on the front and rear of such rack mount enclosure. Physical values are sensed at multiple vertical locations to enable a determination of overall and localized heat loads within the enclosure. Front sensor values are collected and wirelessly transmitted from the front assembly to a receiver/processor supported on the rear duct, which generates computed values that are displayed in addition to the sensed values.

Abstract: A method, system, and computer program product for transferring selected open browser tabs from a host computer to a client computer. The method includes copying a selected number of hyperlink addresses from a plurality of hyperlink addresses associated with a plurality of selected open browser tabs in a first browser of the host computer. A hyperlink import module of the client computer is activated for transferring the copied hyperlink addresses from the host computer. Before the transfer can occur, the client computer is authenticated. After authentication, the user of the client computer selects a subset of the copied hyperlink addresses from the host computer. Only the subset of the copied hyperlink addresses is transferred from the host computer to the client computer. The client user opens the subset of the copied hyperlink addresses in a second browser of the client computer for displaying.

Abstract: A method, system and computer program product are presented for causing a parallel load/store of stride-separated words from a data vector using different memory chips in a computer.

Abstract: A solution for performing an optical proximity correction (OPC) process on a layout by incorporating a critical dimension (CD) correction is provided. A method may include separating the layout into a first portion and a second portion corresponding to the two exposures; creating a model for calculating a CD correction for a site on the first portion, the model corresponding to a topography change on the site due to the double exposures; implementing an OPC iteration for the fragment based on the model to generate an OPC solution for the first portion; and combining the OPC solution for the first portion with an OPC solution for the second portion to generate an OPC solution for the layout to generate a mask for fabricating a structure using the layout.

Abstract: Mobile phone signals may be corrupted by noise, fading, interference with other signals, and low strength field coverage of a transmitting and/or a receiving mobile phone as they pass through the communication network (e.g., free space). Because of the corruption of the mobile phone signal, a voice conversation between a caller and a receiver may be interrupted and there may be gaps in a received oral communication from one or more participants in the voice conversation forcing either or both the caller and the receiver to repeat the conversation. Transmitting a transcript of the oral communication along with a voice signal comprising the oral communication can help ensure that voice conversation is not interrupted due to a corrupted voice signal. The transcript of the oral communication can be used to retrieve parts of the oral communication lost in transmission (e.g., by fading, etc.) to make the conversation more fluid.

Abstract: Embodiments of the invention provide techniques for arranging virtual objects within an immersive virtual environment. In one embodiment, avatar characteristics, viewport/display characteristics, and object/location characteristics may be analyzed to determine a degree of visibility of various locations within a virtual space to a user. Further, past user interactions within the immersive virtual environment may be analyzed to determine which portions of the user's viewport, when including virtual objects that are offered for sale, are most likely to result in a sale to the user. A set of virtual objects may then be assigned to locations within the virtual space based on the determined visibility to the user, past purchases by the user, and characteristics of the virtual objects.

Abstract: A method of executing a task includes executing, by using a processor, a first task including a low-frequency task in which garbage is collected using a garbage collector, initializing a second task including a high-frequency task by constructing an instance of a class that implements a standard runnable thread interface, and creating a data structure for supporting communication between the second task and lower priority threads, the data structure being accessible by a thread running in a garbage-collected heap in the first task to communicate data between the high-frequency task and the low-frequency task, validating the second task to ensure that the second task is executable without synchronizing with the first task, instantiating the second task to create a class for executing the second task; and after the instantiating the second task, executing the second task, the garbage collector being preemptable by the second task.

Abstract: A method, system, and computer usable program product for updating firmware without disrupting service are provided in the illustrative embodiments. An updated firmware code is sent to a first firmware component and a second firmware component. The first firmware component is a primary firmware component and the second firmware component is a backup firmware component in a redundant firmware configuration. The updated firmware code is installed in second firmware component. The updated firmware code is activated in a third firmware component. The third firmware component is in communication with the first firmware component. A fail-over from the first firmware component to the second firmware component is performed such that a user communicating with the data processing system and receiving a service using the first firmware component continues to receive the service using the second firmware component without a disruption in the service.

Abstract: A switchable element. The element includes a source electrode, a drain electrode, a conducting channel between the source electrode and the drain electrode, and a gate with multiferroic material being switchable, by application of an electrical signal to the gate, between a first switching state with a first spontaneous polarization direction and a second switching state with a second spontaneous polarization direction. The conducting channel is magnetoresistive, and a magnetic field strength at the conducting channel in the first switching state is different than a magnetic field strength in the second switching state, whereby a current-voltage characteristic of the conducting channel is dependent on the switching state of the multiferroic material.

Abstract: A security system for inventory automatically detects removal of inventory items from an area or areas protected with security sensors. A person removing the item then scans an identifying code of the item, such as its bar code or radio-frequency identification (“RFID”) tag, with a device such as a portable shopping assistant device; if the item is not scanned in an appropriate manner, such as within a particular a time period, then theft of the item may be suspected. Information for completing a purchase transaction can be sent from the portable shopping assistant device. In this manner, items can be purchased directly from the protected areas.

Abstract: One aspect of the invention is a method for providing real-time feedback regarding the effect of applying a policy definition used for management in a computing system. An example of the method includes receiving the policy definition, and accessing stored information regarding at least one managed entity in the computing system. This example also includes applying the policy definition to the information regarding the at least one managed entity. This example further includes outputting information providing real-time feedback regarding the effect of applying the policy definition to the information regarding the at least one managed entity. Another aspect of the invention is a method for defining a policy used for management in a computing system.

Abstract: A computer implemented method, a tangible computer medium, and a data processing system proactively share current and upcoming schedule information. When the data processing system detects an outgoing e-mail from an e-mail client; a calendar entry is retrieved from a calendar application. The calendar entry indicates an availability of a user of the e-mail client. The calendar entry is attached to the outgoing e-mail, and the e-mail client then sends the outgoing e-mail.

Abstract: An invention that provides a client-side simulated virtual universe environment is provided. In one embodiment, there is a simulation tool, including an analysis component configured to identify whether a server-side virtual universe is available; and a construction component configured to provide a client-side simulated virtual universe environment in the case that the server-side virtual universe is unavailable.

Abstract: A method for portal performance optimization comprises receiving a request for a portal page, the portal page comprising a plurality of portlets; determining a current system load; determining, based on the current system load, whether a performance rule is triggered; and in the event a performance rule is triggered, deactivating at least one of the plurality of portlets. A system for portal performance optimization comprises a portal server configured to receive a request for a portal page, the portal page comprising a plurality of portlets, the portal server comprising a performance management component, the performance management component configured to determine a current system load; and a rules engine, the rules engine configured to determine if a performance rule is triggered by the determined current system load, and, in the event a performance rule is triggered, to apply the triggered performance rule to at least one of the plurality of portlets.

Abstract: Semiconductor-based electronic devices and techniques for fabrication thereof are provided. In one aspect, a device is provided comprising a first pad; a second pad and a plurality of nanowires connecting the first pad and the second pad in a ladder-like configuration formed in a silicon-on-insulator (SOI) layer over a buried oxide (BOX) layer, the nanowires having one or more dimensions defined by a re-distribution of silicon from the nanowires to the pads. The device can comprise a field-effect transistor (FET) having a gate surrounding the nanowires wherein portions of the nanowires surrounded by the gate form channels of the FET, the first pad and portions of the nanowires extending out from the gate adjacent to the first pad form a source region of the FET and the second pad and portions of the nanowires extending out from the gate adjacent to the second pad form a drain region of the FET.

Abstract: A phase change memory device includes a memory cell, first word line conductor and a second word line conductor, and first and second access devices responsive to the first and second word line conductors respectively. Control circuits are arranged to access the memory cell for read operations using only the first word line conductor to establish a current path from the bit line through the memory cell to a source line through the first access device, and to access the memory cell for operations to reset the memory cell using both the first and second access devices to establish a current path from the bit line through the memory cell to two source lines.

Abstract: A user can log into an organization portal. An organizational role can be determined for the user. For a decision maker, a set of metric driven portlets can be graphically presented within the organization portal. The metrics driven portlets can include at least one scorecard and at least one dashboard, each tailored for the determined organizational role. The scorecard and the dashboard can be dynamically updated based upon metrics provided by a plurality of discrete services. The discrete services can obtain the metrics from a set of geographically distributed data sources. The discrete services can be functionally independent of each other and can be responsible for federating data in a portlet and role specific manner. Online collaboration capabilities can be provided through collaboration and alerting portlets of the organization portal, and which can be tailored for the determined organizational role.

Abstract: An approach is provided that that uses an electronic multi-touch floor covering that has numerous sensors to identify shapes. The electronic multi-touch floor covering identifies a shape of an object that is in contact with the surface of the electronic multi-touch floor covering. An entity record is then retrieved from a data store, such as a database, with the retrieved entity record corresponding to the identified shape. Actions are then retrieved from a second data store with the actions corresponding to the retrieved entity record. The retrieved actions are then executed by the computer system.

Abstract: The present invention relates to improved methods and structures for forming interconnect patterns in low-k or ultra low-k (i.e., having a dielectric constant ranging from about 1.5 to about 3.5) interlevel dielectric (ILD) materials. Specifically, reduced lithographic critical dimensions (CDs) (i.e., in comparison with target CDs) are initially used for forming a patterned resist layer with an increased thickness, which in turn allows use of a simple hard mask stack comprising a lower nitride mask layer and an upper oxide mask layer for subsequent pattern transfer. The hard mask stack is next patterned by a first reactive ion etching (RIE) process using an oxygen-containing chemistry to form hard mask openings with restored CDs that are substantially the same as the target CDs. The ILD materials are then patterned by a second RIE process using a nitrogen-containing chemistry to form the interconnect pattern with the target CDs.

Abstract: Techniques to manage position information of parts such that, if discrepancy of the parts occurs, the discrepancy can be detected and corrected while the advantages of using the constraint conditions can be offered. In one embodiment, when an input unit receives information of an icon click, a receiving section receives the information of the click, and a saving section saves the position and the angle of geographic data indicating the three-dimensional geometry of the part as absolute-position information calculated with reference to the absolute origin into the storage unit.

Abstract: Compositions characterized by the presence of an aqueous base-soluble polymer having aromatic moieties and aliphatic alcohol moieties have been found which are especially useful as developable bottom antireflective coatings in 193 nm lithographic processes. The compositions enable improved lithographic processes which are especially useful in the context of subsequent ion implantation or other similar processes where avoidance of aggressive antireflective coating removal techniques is desired.

Abstract: Techniques for automated pricing of an item are provided. The techniques include obtaining historical data of one or more previous purchases for the item, performing a regression on the historical data, and using the regression to obtain a buying price and a selling price for the item.

Abstract: According to one embodiment of the present invention, a method for debugging a computer system is provided. According to one embodiment of the invention, a method includes encrypting data and query program instructions using correlated order invariant encrypting, the data and query program instructions operating in a customer computer system. The encrypted data and encrypted query program instructions are then transferred to a servicing entity having a test system. The encrypted data and encrypted query program instructions are run on the test system to generate a set of results. The set of results are then used to generate a diagnosis of a problem with the customer computer system. Thus the customer problem can be resolved without the servicing entity having access to the customer's data and query program instructions.

Abstract: A Dynamic Meeting Group Organizer automatically creates sub-groups from a group of responders to a meeting invitation sent by email by determining a number of subgroups and a subgroup size parameter; determining a question and a criteria associated with the question to create a survey; determining a list of invitees and a response date by which an invitee is to return a completed survey; sending a plurality of invitations with the survey attached to each invitee on the list; accumulating a plurality of responses to the questionnaire in a response file; and accessing the response file and automatically processing the plurality of responses by organizing the list of invitees into a plurality of subgroups according to each invitee's response to the question and the subgroup size parameter.

Abstract: A hierarchical fanout connectivity infrastructure is built and used to start a parallel application within a parallel computing environment. The connectivity infrastructure is passed to a checkpoint library, which employs the infrastructure and a defined sequence of events, to perform checkpoint, restart and/or migration operations on the parallel application.

Abstract: Each of a hot-carrier non-volatile memory device and a method for fabricating the hot carrier non-volatile memory device is predicated upon a semiconductor structure and related method that includes a metal oxide semiconductor field effect transistor structure. The semiconductor structure and related method include at least one of: (1) a spacer that comprises a dielectric material having a dielectric constant greater than 7 (for enhanced hot carrier derived charge capture and retention); and (2) a drain region that comprises a semiconductor material that has a narrower bandgap than a bandgap of a semiconductor material from which is comprised a channel region (for enhanced impact ionization and charged carrier generation).

Abstract: A method, a system and a computer program product are directed towards determination of a variable toll for a particular target vehicle using a particular point-to-point travel segment of a particular toll road. The variable toll is calculated predicated upon a deviation of an instantaneous point-to-point traffic volume for the particular target vehicle exiting the toll road in comparison with an arbitrarily determined baseline point-to-point traffic volume. The instantaneous point-to-point traffic volume includes vehicles traveling at least a portion of the same point-to-point travel segment as the target vehicle during an effective time interval when the target vehicle traveled the point-to-point travel segment.

Abstract: A method of manufacturing dual embedded epitaxially grown semiconductor transistors is provided, the method including depositing a first elongated oxide spacer over first and second transistors of different types, depositing a first elongated nitride spacer on the first oxide spacer, depositing a first photoresist block on the nitride spacer above the first transistor, etching the first nitride spacer above the second transistor, implanting a first halo around the second transistor, etching a first recess in an outer portion of the first halo, stripping the first photoresist above the first transistor, forming a first epitaxially grown semiconductor material in the first recess, implanting a first extension in a top portion of the first material, depositing an elongated blocking oxide over the first and second transistors and first extension, depositing a second photoresist block on the blocking oxide above the second transistor and first extension, etching the blocking oxide and first nitride spacer above th

Abstract: A semiconductor structure includes an epitaxial surface semiconductor layer having a first dopant polarity and a first crystallographic orientation, and a laterally adjacent semiconductor-on-insulator surface semiconductor layer having a different second dopant polarity and different second crystallographic orientation. The epitaxial surface semiconductor layer has a first edge that has a defect and an adjoining second edge absent a defect. Located within the epitaxial surface semiconductor layer is a first device having a first gate perpendicular to the first edge and a second device having a second gate perpendicular to the second edge. The first device may include a performance sensitive logic device and the second device may include a yield sensitive memory device.

Abstract: Methods and UBM structures having bilayer or trilayer UBM layers that include a thin TiW adhesion layer and a thick Ni-based barrier layer thereover both deposited under sputtering operating conditions that provide the resultant bilayer or trilayer UBM layers with minimal composite stresses. The Ni-based barrier layer may be pure Ni or a Ni alloy. These UBM layers may be patterned to fabricate bilayer or trilayer UBM capture pads, followed by joining a lead-free solder thereto for providing lead-free solder joints that maintain reliability after multiple reflows. Optionally, the top layer of the trilayer UBM structures may include soluble or insoluble metals for doping the lead-free solder connections.

Abstract: A memory cell includes double-gate first and second access devices configured to selectively interconnect cross-coupled inverters with true and complementary bit lines. Each access device has a first gate connected to a READ word line and a second gate connected to a WRITE word line. During a READ operation, the first and second access devices are configured to operate in a single-gate mode with the READ word line “ON” and the WRITE word line “OFF” while the double-gate pull-down devices are configured to operate in a double gate mode. During a WRITE operation, the first and second access devices are configured to operate in a double-gate mode with the READ word line “ON” and the WRITE word line also “ON.

Abstract: An information handling system device includes a plurality of electronic components; an electric circuit including at least one trace for connecting two or more of the plurality of electronic components and transmitting data between the plurality of electronic components via at least one electric signal; and a substrate including an insulating material for serving as a base for the electric circuit and the plurality of electronic components, wherein the at least one electric signal transmitted between the plurality of electronic components is transmitted utilizing slope manipulation to provide a slope directly proportional to a data value.

Abstract: A layer of nanoparticles having a dimension on the order of 10 nm is employed to form a current constricting layer or as a hardmask for forming a current constricting layer from an underlying insulator layer. The nanoparticles are preferably self-aligning and/or self-planarizing on the underlying surface. The current constricting layer may be formed within a bottom conductive plate, within a phase change material layer, within a top conductive plate, or within a tapered liner between a tapered via sidewall and a via plug contains either a phase change material or a top conductive material. The current density of the local structure around the current constricting layer is higher than the surrounding area, thus allowing local temperature to rise higher than surrounding material. The total current required to program the phase change memory device, and consequently the size of a programming transistor, is reduced due to the current constricting layer.

Abstract: An apparatus for cooling a heat-generating component is disclosed. The apparatus includes a cooling chamber containing a liquid metal. The cooling chamber has a heat-conducting wall thermally coupled to the heat-generating component. A plurality of extendable tubes making up an array of cooling pin fins is attached to the cooling chamber. Each of the extendable tubes has a port end that opens into the cooling chamber and a sealed end that projects away from the cooling chamber. Moreover, each of the extendable tubes has an extended position when filled with liquid metal from the cooling chamber and a retracted position when emptied of the liquid metal. A pump system is included for urging the liquid metal from the cooling chamber into the plurality of extendable tubes.

Abstract: A technique for updating elements in a data storage facility, including a single server or a multi-server system, such as by providing updated internal code packages to the elements. The update is performed using a fixed state machine, where the elements are updated in a coordinated manner within the constraints of the state machine. In a multi-server device, code packages are distributed to elements associated with the different servers in one traversal of the state machine, during distribute states of the state machine. The distributed code packages are activated in activate states of the state machine in multiple traversals of the state machine, so there is a serial activation. The code packages can be grouped in a flexible way by configuring an external update bundle used by the state machine. The distributing of the code is based on the grouping.

Abstract: A method is provided for selecting an operating band of a voltage-controlled oscillator (“VCO”) of a phase locked loop (“PLL”) for which the lock frequency is closest to a center of the frequency range of the operating band. In such method, steps can be performed to determine the maximum and minimum frequencies of the operating band and the center frequency between them. From the center frequency of the operating band and the lock frequency within such operating band, a difference value can then be determined. The operating bands of the PLL can be tested until an operating band having the smallest difference value is determined. The VCO can then be set to such operating band in order for the lock frequency to be closest to the center frequency of the operating band.

Abstract: A system and method is provided for avoiding duplication of effort in drafting documents and, in particular, to a system and method for avoiding duplication of effort in preparing patent related submissions. The method is implemented on a computer infrastructure comprises storing disclosure information related to non-public proprietary innovation and receiving terms associated with an innovation. The method further comprises matching the terms with the stored disclosure information and providing an alert to a user that certain of the terms overlap with the stored disclosure information.

Abstract: In one aspect, a method of a storage adapter controlling a redundant array of independent disks (RAID) may be provided. The method may include examining performance curves of a storage adapter with a write cache, determining if an amount of data entering the write cache of the storage adapter has exceeded a threshold, and implementing a strategy based on the determining operation. The strategy may include one of coupling Read-XOR/Write operations and providing priority reordering of Read operations over the Read-XOR/Write operations in order to minimize host read response time if data entering the write cache is less than the threshold, and allowing all Read operations and Read-XOR/Write operations to be queued at the device using simple tags in order to achieve maximum throughput if data entering the write cache is greater than the threshold. Additional aspects are described.

Abstract: A method, system and computer program product for automated use of uninterpreted functions in sequential equivalence checking. A first netlist and a second netlist may be received and be included in an original model, and from the original model, logic to be abstracted may be determined. A condition for functional consistency may be determined, and an abstract model may be created by replacing the logic with abstracted logic using one or more uninterpreted functions. One or more functions may be performed on the abstract model. For example, the one or more functions may include one or more of a bounded model checking (BMC) algorithm, an interpolation algorithm, a Boolean satisfiability-based analysis algorithm, and a binary decision diagram (BDD) based reachability analysis algorithm, among others.

Abstract: A system and associated method for selectively constructing a search result for a data requested by a search request specifying path information of a data node comprising the data. A template tree represents a hierarchy of the search result with expandable nodes which initially do not have actual data. A node of the template tree is dynamically expanded by a callback function to have a respective data for the node when the node is traversed for the first time during traversing the template tree according to the path information. The search result is created by expanding all nodes of the template tree that are specified in the path information. The data node in the search result is communicated to an entity that had originated the search request.

Abstract: Processing requests may be routed between a plurality of runtime environments, based on whether or not program(s) required for completion of the processing requests is/are loaded in a given runtime environment. Cost measures may be used to compare costs of processing a request in a local runtime environment and of processing the request at a non-local runtime environment.

Abstract: A method and structure of connecting at least two integrated circuits in a 3D arrangement by a through silicon via which simultaneously connects a connection pad in a first integrated circuit and a connection pad in a second integrated circuit.

Abstract: The present invention relates to semiconductor devices, and more particularly to a structure and method for forming memory cells in a semiconductor device using a patterning layer and etch sequence. The method includes forming trenches in a layered semiconductor structure, each trench having an inner sidewall adjacent a section of the layered semiconductor structure between the trenches and an outer sidewall opposite the inner sidewall. The trenches are filled with polysilicon and the patterning layer is formed over the layered semiconductor structure. An opening is then patterned through the patterning layer, the opening exposing the section of the layered semiconductor structure between the trenches and only a vertical portion of the polysilicon along the inner sidewall of each trench. The layered semiconductor structure is then etched. The patterning layer prevents a second vertical portion of the polysilicon along the outer sidewall of each trench from being removed.

Abstract: A method, computer program product, and system are disclosed for dynamically provisioning clusters of middleware appliances. In one embodiment, the method includes referencing a resource measurement from a plurality of middleware appliances. The middleware appliances process one or more service domains and the resource measurement includes processing resources consumed by each middleware appliance for each of the one or more service domains. The method may also include determining an implementation plan based on a performance goal and one or more resource calculations. The implementation plan specifies service domain instances to activate and service domain instances to deactivate on the plurality of middleware appliances. The method may also include dynamically enabling and disabling the service domain instances on the plurality of middleware appliances based on the implementation plan.

Abstract: In a method of mitigating hysteresis effect in a sense amplifier circuit, a data value is sensed from a data source with the sense amplifier during a first period. The data value is stored in a latch. The data valued stored in the latch is inverted, thereby generating an inverted data value. The data source is isolated from the sense amplifier and the inverted data value is read with the sense amplifier during a second period immediately following the first period.

Abstract: A method and a system for utilizing less recently used (LRU) bits and presence bits in selecting cache-lines for eviction from a lower level cache in a processor-memory sub-system. A cache back invalidation (CBI) logic utilizes LRU bits to evict only cache-lines within a LRU group, following a cache miss in the lower level cache. In addition, the CBI logic uses presence bits to (a) indicate whether a cache-line in a lower level cache is also present in a higher level cache and (b) evict only cache-lines in the lower level cache that are not present in a corresponding higher level cache. However, when the lower level cache-line selected for eviction is also present in any higher level cache, CBI logic invalidates the cache-line in the higher level cache. The CBI logic appropriately updates the values of presence bits and LRU bits, following evictions and invalidations.