Patents Examined by A. Dexter Tugbang
  • Patent number: 10784435
    Abstract: Methods for producing ceramic multi-layer components and multi-layer components made by such methods. A method includes the following steps: providing green layers for the ceramic multi-layer components, stacking the green layers into a stack and subsequently pressing the stack into a block, singulating the block into partial blocks each having a longitudinal direction, thermally treating the partial blocks and subsequently machining surfaces of the partial blocks. Recesses are produced on the surfaces of the partial blocks during the machining, and the partial blocks are singulated.
    Type: Grant
    Filed: July 21, 2015
    Date of Patent: September 22, 2020
    Assignee: TDK ELECTRONICS AG
    Inventors: Marion Ottlinger, Peter Windisch, Robert Krumphals, Manfred Reinisch, Martin Galler, Georg K├╝gerl
  • Patent number: 10770205
    Abstract: A method for manufacturing an electronic component including a step of providing an outer electrode that includes a step of providing a sintered layer containing a sintered metal, a step of providing an insulation layer containing an electric insulation material, and a step of providing a Sn-containing layer containing Sn. The sintered layer extends from each of end surfaces of an element assembly onto at least one main surface thereof. The insulation layer is directly provided on the sintered layer at each of the end surfaces so as to extend in a direction perpendicular or substantially perpendicular to a side surface of the element assembly, and defines a portion of a surface of the outer electrode. The Sn-containing layer covers the sintered layer except for a portion of the sintered layer that is covered by the insulation layer, and constitutes another portion of the surface of the outer electrode.
    Type: Grant
    Filed: October 10, 2017
    Date of Patent: September 8, 2020
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Haruhiko Mori, Hiroyuki Otsuna
  • Patent number: 10771031
    Abstract: A method of fabricating an FBAR filter device including an array of resonators, each resonator comprising a single crystal piezoelectric film sandwiched between a first metal electrode and a second metal electrode, wherein the first electrode is supported by a support membrane over an air cavity, the air cavity embedded in a silicon dioxide layer over a silicon handle, with through-silicon via holes through the silicon handle and into the air cavity, the side walls of said air cavity in the silicon dioxide layer being defined by perimeter trenches that are resistant to a silicon oxide etchant.
    Type: Grant
    Filed: February 5, 2018
    Date of Patent: September 8, 2020
    Assignee: Zhuhai Crystal Resonance Technologies Co., Ltd.
    Inventor: Dror Hurwitz
  • Patent number: 10770646
    Abstract: Techniques and structures are provided for manufacturing a flexible PMUT array. In one embodiment, a piezoelectric micromechanical ultrasonic transducer (PMUTs) array comprises a plurality of PMUTs, where each PMUT in the flexible array of PMUTs includes: a first polymer layer configured to support the PMUT, a mechanical layer configured to provide planarization to the PMUT, a first electrode, a second electrode, a piezoelectric layer configured to separate the first electrode and the second electrode, patterns on the first electrode, the piezoelectric material, and the second electrode configured to route electrical signals, and a cavity configured to adjust a frequency response of the PMUT.
    Type: Grant
    Filed: February 27, 2017
    Date of Patent: September 8, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Donald William Kidwell, Jr., Ravindra Shenoy, Jon Lasiter
  • Patent number: 10770991
    Abstract: A method of manufacturing a vibration type actuator providing a satisfactory actuator performance even when an increase in speed is achieved and having a contact spring. The actuator includes an elastic member and a hollow protrusion having a side wall portion protruding with respect to a surface of the elastic member, a contact portion configured to come into contact with a body, and a first connection portion connecting the side wall portion and the contact portion, the method includes, forming the hollow protrusion including the side wall portion and a distal end portion by performing drawing on an elastic plate and forming the contact portion and the first connection portion by performing drawing or squeezing on the distal end portion, wherein the contact portion is surrounded by the first connection portion.
    Type: Grant
    Filed: July 6, 2017
    Date of Patent: September 8, 2020
    Assignee: Canon Kabushiki Kaisha
    Inventor: Atsushi Kimura
  • Patent number: 10763813
    Abstract: An acoustic wave device fabrication method includes: forming on a piezoelectric substrate a comb-shaped electrode and a wiring layer coupled to the comb-shaped electrode; forming on the piezoelectric substrate a first dielectric film having a film thickness greater than those of the comb-shaped electrode and the wiring layer, covering the comb-shaped electrode and the wiring layer, and being made of silicon oxide doped with an element or undoped silicon oxide; forming on the first dielectric film a second dielectric film having an aperture above the wiring layer; removing the first dielectric film exposed by the aperture of the second dielectric film by wet etching using an etching liquid causing an etching rate of the second dielectric film to be less than that of the first dielectric film so that the first dielectric film is left so as to cover an end face of the wiring layer and the comb-shaped electrode.
    Type: Grant
    Filed: June 6, 2017
    Date of Patent: September 1, 2020
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Kentaro Nakamura, Fumiya Matsukura, Naoki Takahashi, Takashi Matsuda, Tsutomu Miyashita
  • Patent number: 10764995
    Abstract: A method for fabricating a substrate structure is provided, which includes the steps of: disposing at least a strengthening member on a carrier; sequentially forming a first circuit layer and a dielectric layer on the carrier, wherein the strengthening member is embedded in the dielectric layer; forming a second circuit layer on the dielectric layer; removing the carrier; and forming an insulating layer on the first circuit layer and the second circuit layer. The strengthening member facilitates to reduce thermal warping of the substrate structure.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: September 1, 2020
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Jin-Wei You, Chun-Lung Chen
  • Patent number: 10756501
    Abstract: Methods and systems for heating forming dies by an induction coil, including a pair of electromagnetic (EM) field stabilizers, each EM field stabilizer configured to be adjacent one end of the forming die while the forming die is within the induction heating coil.
    Type: Grant
    Filed: May 22, 2015
    Date of Patent: August 25, 2020
    Assignee: The Boeing Company
    Inventors: Cameron Kai-Ming Chen, Marc R. Matsen, Robert James Miller, Scott David Billings
  • Patent number: 10742188
    Abstract: A method of manufacturing a piezoelectric resonator unit that includes mounting a piezoelectric resonator on a base member using a conductive adhesive, keeping the piezoelectric resonator in an environment having a temperature and a humidity higher than those of a surrounding region for a predetermined time, performing frequency adjustment of the piezoelectric resonator by etching using an ion beam, and joining a lid member to the base member using a joining material such that the piezoelectric resonator is hermetically sealed between the lid member and the base member.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: August 11, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Seita Takahashi, Hiroaki Kaida, Kenyo Makino, Hiroyuki Araya
  • Patent number: 10741519
    Abstract: A system for applying materials to components generally includes a tool operable for transferring a portion of a material from a supply of the material to a component. The tool may include a resilient material configured for tamping the portion of the material onto the component and/or for imprinting the portion of the material for release and transfer from the supply.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: August 11, 2020
    Assignee: Laird Technologies, Inc.
    Inventors: Jason L. Strader, Michael S. Wladyka, Keith David Johnson, Jingting Yang, Kevin Joel Bohrer, Mark D. Kittel
  • Patent number: 10735101
    Abstract: A method of manufacturing an optical communication device includes preparing first and second pre-defined break lines in a carrier wafer. A first sub-mount is positioned near the first break line to accommodate an optical laser and a second sub-mount is positioned near the second break line to accommodate an optical modulator. The first sub-mount is secured to a thermally conductive and electrically nonconductive spacer which is secured to a thermo-electrical cooler that defines a gap between the first submount and the thermo-electrical cooler. A portion of the carrier wafer between the sub-mounts is removed.
    Type: Grant
    Filed: July 31, 2017
    Date of Patent: August 4, 2020
    Assignee: Cisco Technology, Inc.
    Inventors: Stefan Pfnuer, Ravi Kachru, John Fangman, Utpal Chakrabarti
  • Patent number: 10734142
    Abstract: In a method for manufacturing an electronic component, a step of providing an outer electrode includes a step of providing a sintered layer including a sintered metal, a step of providing a reinforcement layer not containing Sn but including Cu or Ni, a step of providing an insulation layer, and a step of providing a Sn-containing layer. The sintered layer extends from each end surface of an element assembly onto at least one main surface thereof to cover Bich. The reinforcement layer covers the sintered layer entirely. The insulation layer is directly provided on the reinforcement layer at each end surface of the element assembly and defines a portion of a surface of the outer electrode. The Sn-containing layer covers the reinforcement layer except for a portion of the reinforcement layer that is covered by the insulation layer, and defines another portion of the surface of the outer electrode.
    Type: Grant
    Filed: October 11, 2017
    Date of Patent: August 4, 2020
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Haruhiko Mori, Hiroyuki Otsuna
  • Patent number: 10727801
    Abstract: A method for fabricating a piezoelectric quartz crystal resonator is disclosed, which comprises: arranging a plurality of design units on a circuit board, wherein each design unit includes a quartz crystal resonator and a thermistor, and a division clearance is preset between every two adjacent design units; in each design unit, arranging at least one extension welding pad and at least one resonator welding pad; arranging at least one thermistor welding pad corresponding to the thermistor at the circuit board; welding the quartz crystal resonator and the thermistor onto their corresponding welding pads respectively; using thermoplastic material to seal the welded quartz crystal resonator and thermistor; dividing the circuit board processed by the thermoplastic material according to the design units.
    Type: Grant
    Filed: January 10, 2017
    Date of Patent: July 28, 2020
    Assignee: INTERQUIP ELECTRONICS (SHENZHEN) CO., LTD.
    Inventors: William Dean Beaver, Huiping Liang, Xiaoming Sun, Guangyu Wu, Junchao Xie
  • Patent number: 10720566
    Abstract: It is formed, over a supporting body made of a ceramic, a bonding layer composed of one or more material selected from the group consisting of mullite, alumina, tantalum pentoxide, titanium oxide and niobium pentoxide. Neutralized beam is irradiated onto a surface of the bonding layer to activate the surface of the bonding layer. The surface of the bonding layer and the piezoelectric single crystal substrate are bonded by direct bonding.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: July 21, 2020
    Assignee: NGK INSULATORS, LTD.
    Inventors: Tomoyoshi Tai, Yuji Hori, Keiichiro Asai, Takashi Yoshino, Masashi Goto, Masahiko Namerikawa
  • Patent number: 10714851
    Abstract: An interface structure connecting an electronic component to a circuit board. The interface structure includes a base defining an elongated through hole with a central axis and a coil spring retained in the elongated through hole. The coil spring has a proximal portion and a distal portion extending from the elongated through hole in an uncompressed condition and being offset at an angle with respect to the central axis. As the coil spring is compressed, the coil spring creates a force having a component substantially perpendicular to the central axis.
    Type: Grant
    Filed: December 12, 2016
    Date of Patent: July 14, 2020
    Assignee: Sensata Technologies
    Inventor: Hideyuki Takahashi
  • Patent number: 10714351
    Abstract: Provided is a substrate holding unit that holds a pair of substrates that are aligned and layered, comprising a first holding member that holds one of the substrates; a plurality of members to be joined that are connected to the first holding member; a second holding member that holds the other of the substrates to face the one of the substrates; a plurality of joining members that exert an adhesion force on the members to be joined and are connected to the second holding member at positions corresponding to positions of the members to be joined; and an adhesion restricting section that restricts the adhesion force until the substrates are aligned.
    Type: Grant
    Filed: February 7, 2013
    Date of Patent: July 14, 2020
    Assignee: Nikon Corporation
    Inventors: Hidehiro Maeda, Satoshi Katagiri
  • Patent number: 10714059
    Abstract: A method of manufacturing a device for, among other things, preventing picks from falling into soundholes of various musical instruments is disclosed. The device is both decorative and functional, including having multiple sizes, contours, and usages. Further, various methods of manufacturing the device are disclosed. The device can have various electronics incorporated therein, and in some embodiments communicates with a mobile application on a handheld computing device. The method of manufacture can include, in an embodiment, manufacturing a circular frame having an inner and outer diameter; manufacturing a circular screen also having an inner and outer diameter to be inserted within the frame in a non-movable snug-fit, fabricating the frame to have an instrument-facing surface and a string-facing surface, and preparing an instrument-facing surface of the frame to be suitable for attachment to a surface of the instrument, among potentially other steps.
    Type: Grant
    Filed: September 30, 2017
    Date of Patent: July 14, 2020
    Inventor: Mackenzie Taylor
  • Patent number: 10707406
    Abstract: In a method of manufacturing a piezoelectric device, during an isolation formation step, a supporting substrate has a piezoelectric thin film formed on its front with a compressive stress film present on its back. The compressive stress film compresses the surface on a piezoelectric single crystal substrate side of the supporting substrate, and the piezoelectric thin film compresses the back of the supporting substrate, which is opposite to the surface on the piezoelectric single crystal substrate side. Thus, the compressive stress produced by the compressive stress film and that produced by the piezoelectric thin film are balanced in the supporting substrate, which causes the supporting substrate to be free of warpage and remain flat. A driving force that induces isolation in the isolation formation step is gasification of the implanted ionized element rather than the compressive stress to the isolation plane produced by the piezoelectric thin film.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: July 7, 2020
    Assignee: MURATA MANUFACTURING CO., LTD
    Inventor: Korekiyo Ito
  • Patent number: 10693353
    Abstract: A method for producing a magnet plate for a linear motor is provided. The magnet plate comprises a base plate and a plurality of magnets juxtaposed to one another on a surface of the base plate. The method comprises providing the plurality of magnets on a surface of the base plate at a certain interval, placing the base plate into a mold, supplying a resin material into the mold, so as to form a resin molding covering the plurality of magnets on the surface of the base plate by means of injection molding, and magnetizing the plurality of magnets.
    Type: Grant
    Filed: May 17, 2016
    Date of Patent: June 23, 2020
    Assignee: FANUC CORPORATION
    Inventors: Yoshifumi Shimura, Takuya Maeda, Yuusuke Kondou
  • Patent number: 10693431
    Abstract: A method for manufacturing a semiconductor apparatus includes: on a base substrate, forming an isolation trench layer, a first dielectric layer, a lower electrode layer and a second dielectric layer; forming a piezoelectric film and an upper electrode layer in an opening in the second dielectric layer; forming a third dielectric layer; forming a first cavity in the third dielectric layer to expose at least part of the upper electrode layer; bonding a first assistant substrate to seal the first cavity; removing a part of the base substrate to expose the isolation trench layer; forming a fourth dielectric layer on a side of the isolation trench; and etching through the fourth dielectric layer, the isolation trench layer, the first dielectric layer to form a second cavity beneath the lower electrode layer, plan views of the first and second cavities providing an overlapped region having a polygon shape without parallel sides.
    Type: Grant
    Filed: March 8, 2017
    Date of Patent: June 23, 2020
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, NINGBO SEMICONDUCTOR INTERNATIONAL CORPORATION
    Inventors: Herb He Huang, Clifford Ian Drowley, Jiguang Zhu, Haiting Li