Abstract: A quasi-resonant auto-tuning controller includes a zero-voltage crossing detection circuit and a valley tuning finite-state machine having a look-up table. The zero-voltage crossing detection circuit receives a reference voltage and receives an auxiliary signal from an auxiliary winding. The zero-voltage crossing detection circuit produces a comparison signal having pulses when the auxiliary signal is less than the reference voltage. The valley tuning finite-state machine produces a divided pulse width based on the comparison signal, stores the divided pulse width of each pulse in the look-up table, determines, from the comparison signal, that the auxiliary signal is less than the reference voltage, waits a time period corresponding to the divided pulse width stored in the look-up table if the auxiliary signal is less than the reference voltage, and produces a valley point signal after waiting the time period.

Abstract: Methods and systems include identifying an abnormal condition in a PFC circuit comprising an input configured to be coupled to a 3-phase power source and to receive input 3-phase power from the 3-phase power source, a bus having a plurality of bus lines, each bus line configured to be coupled to the input and to carry one phase of the input 3-phase power, a PFC leg including a contactor configured to selectively couple a capacitor bank included in the PFC leg to the bus. In response to identifying the abnormal condition, the contactor is controlled to decouple the capacitor bank from the bus, and after a reset button has been activated, the contactor is recoupled to the capacitor bank to resume operating the PFC leg to provide power factor correction to the input 3-phase power.

Abstract: A Hybrid DC-DC switching converter architecture is described. The Hybrid architecture includes a capacitive converter cascaded by an inductive converter for a boost switching converter, and an inductive converter cascaded by a capacitive converter for a buck switching converter. A capacitor at an intermediate node and a switch in the capacitive converter are removed. Reducing the switching converter by one switch and one capacitor results in a smaller implementation area. A single regulation circuit and an inductor with a smaller saturation current (Isat) are used.

Abstract: A resonant switching power converter includes: capacitors, switches, at least one charging inductor, at least one discharging inductor and a pre-charging circuit. The pre-charging circuit controls a first switch of the switches when the resonant switching power converter operates in a pre-charging mode, to control an electrical connection relationship between the input voltage and a first capacitor of the capacitors and to control other capacitors of the capacitors, thus controlling the capacitors to be connected in parallel to one another or to be connected in series to one another, so that when a voltage drop across the first capacitor is lower than a predetermined voltage, the voltage drop across each capacitor is charged to the predetermined voltage. After operating in the pre-charging mode, the resonant switching power converter subsequently operates in a resonant voltage conversion mode, to thereby convert an input voltage to an output voltage.

Abstract: The invention relates to a signal amplifier circuit for amplifying a signal, in particular an audio amplifier circuit, includes at least one first amplifier transistor (Q1) and at least one second amplifier transistor (Q2), wherein the first amplifier transistor (Q1) and the second amplifier transistor (Q2) are connected to one another in a push-pull circuit and are fed by an amplifier voltage source (V+, V?); and one or more bias diodes (D1, D2) thermally coupled in each case to an associated amplifier transistor (Q1, Q2), wherein the bias diodes (D1, D2) are arranged in a parallel connection with respect to the amplifying transistors (Q1, Q2) to reduce or avoid a crossover distortion, wherein the bias diodes (D1, D2) are fed at least partly by a voltage source (UA) which is independent of the amplifier voltage source (V+, V?).

Abstract: A method for reducing and/or managing energy-related stress in an electrical system includes processing electrical measurement data from or derived from energy-related signals captured by at least one intelligent electronic device (IED) in the electrical system to identify and track at least one energy-related transient in the electrical system. An impact of the at least one energy-related transient on equipment in the electrical system is quantified, and one or more transient-related alarms are generated in response to the impact of the at least one energy-related transient being near, within or above a predetermined range of the stress tolerance of the equipment. The transient-related alarms are prioritized based in part on at least one of the stress tolerance of the equipment, the stress associated with one or more transient events, and accumulated energy-related stress on the equipment.

Abstract: A circuit comprising: a first switch having: first side (FS) connected to first capacitor's second side (1C2S); and second side (SS) connected to reference node (RN); a second switch having: FS connected to second voltage node (2VN); and SS connected to 1C2S; a third switch having: FS connected to the first capacitor's first side (1C1S); and SS connected to 2VN; a fourth switch having: FS connected to a third voltage node (3VN); and SS connected to 1C1S; a fifth switch having: FS connected to second capacitor's second side (2C2S); and SS connected to RN; a sixth switch having: FS connected to 3VN; and SS connected to 2C2S; a seventh switch having: FS connected to the second capacitor's first side (2C1S); and SS connected to 3VN; and an eighth switch having: FS connected to first voltage node; and SS connected to 2C1S.

Abstract: A direct-current voltage conversion circuit having on/off control with a dead-time period performed alternately on a first switch and a second switch included in a direct-current voltage conversion circuit. When alternating current flows in a series circuit part including two transformers magnetically independent, current flows in an output circuit including a secondary side of one transformer, and energy is accumulated in the other transformer. The permeabilities of the magnetic cores in the first and second transformers is between 15 and 120.

Abstract: A hybrid gate driver circuit includes a field effect transistor (FET) drive terminal, a switching node terminal, a transistor, and a capacitor. The transistor includes a first terminal coupled to the FET drive terminal, and a second terminal coupled to ground. The capacitor includes a first terminal coupled to the switching node terminal, and a second terminal coupled to a third terminal of the transistor.

Abstract: Multi-pole and single-pole circuit breakers include a housing and a reset lockout mechanism disposed within the housing. The reset lockout mechanism disables electrical communication between line and load terminals of the circuit breaker if a predefined condition exists. Some circuit breakers include a single actuator, transition between ON and OFF states, and are capable of performing test functions. The test functions may involve testing AFCI and/or GFCI functions of the circuit breakers. The test functions may be performed when the circuit breaker transitions from an OFF state to an ON state. Some circuit breakers including a reset lockout mechanism may be powered only on its line side. Some circuit breakers provide an electrical indication when they are in the OFF state.

Abstract: According to one aspect of the present disclosure, an energy storage system includes one or more power sources, one or more energy storage components, and one or more solid state circuit breakers disposed between the one or more power sources and the one or more energy storage components such that electrical power is exchanged between the one or more power sources to the one or more energy storage components through the one or more solid state circuit breakers. The energy storage system also includes a controller configured to operate the one or more solid state circuit breakers to control current exchanged with the one or more energy storage components and protect the one or more energy storage components from the one or more power sources during a fault condition.

Abstract: A control circuit for controlling switching operation of a switching stage of a converter includes a phase detector circuit that generates a pulse-width modulated (PWM) signal in response to a phase comparison of two clock signals. A first clock signal has a frequency determined as a function of a first feedback signal proportional to converter output voltage. A first transconductance amplifier generates a first current indicative of a difference between a reference voltage and the first feedback signal, and a second transconductance amplifier generates a second current indicative of a difference between the reference voltage and a second feedback signal proportional to a derivative of the converter output voltage. A delay line introduces a delay in the first clock signal that is dependent on the first and second currents as well as a compensation current dependent on a selected operational mode of the converter.

Abstract: A system including an arc flash sensor that detects an arc flash event and an arc flash mitigation device in communication with the sensor. The mitigation device includes a path of least resistance having a path input and a path output. The arc flash sensor is located downstream the output. The mitigation device includes an electro-mechanical switch between the input and the output and an actuator. The mitigation device also includes a bypass power switch device that includes a solid-state circuit interrupter and that conduct current between the input and the output in response to an open-circuit condition of the switch. A system controller is provided to generate a trigger to activate the actuator to generate the open-circuit condition of the switch, which causes the power switch device to interrupt a fault current associated with a fault event in response to detection of the arc flash event.

Abstract: An apparatus includes a buck-boost converter comprising a buck portion and a boost portion connected in cascade, and a controller comprising a first timer and a second timer, wherein the first timer is configured to determine a turn-on time of a high-side switch of the buck portion, and wherein the first timer determines the turn-on time of the high-side switch of the buck portion based on a comparison between a first signal and a second signal, and wherein the first signal is proportional to an output voltage of the buck-boost converter and the second signal is generated based on a signal proportional to an input voltage of the buck-boost converter, and the second timer is configured to determine a turn-on time of a low-side switch of the boost portion.

Abstract: An apparatus includes a first high-side driver of a buck-boost converter, the first high-side driver powered between a first bootstrap voltage (VBST1) and a first output voltage of a first high-side switch driven by the first high-side driver. A second high-side driver is powered between a second bootstrap voltage (VBST2) and a second output voltage of a second high-side switch driven by the second high-side driver. A comparator is to detect VBST1 drop below a threshold value with respect to the first output voltage when the buck-boost converter is in boost mode. A leakage control circuit is to boost, using VBST2 as a voltage source, VBST1 each cycle of boost mode in which an output of the comparator is enabled.

Abstract: An isolated power converter and a hydrogen production system are provided. An electrical connection structure in the isolated power converter includes N secondary winding output bus bars, N rectifier circuit input bus bars, and a positive-negative bus bar, where N is greater than or equal to 1. A secondary winding may include M tapping points, and the secondary winding output bus bar and the rectifier circuit input bus bar that correspond to the secondary winding each include M copper bars that are insulated and stacked. The M tapping points of the secondary winding overlap the M copper bars of the secondary winding output bus bar at input ends of the M copper bars, respectively. The positive-negative bus bar includes two copper bars that are insulated and stacked.

Abstract: A thermal management system is provided. The system includes a temperature sensor, a fan, an electronic circuit breaker (ECB) coupled to the fan to provide electric power to the fan. The system includes a controller coupled to the temperature sensor and the ECB, to direct the ECB to turn off the electric power to the fan responsive to detecting a temperature, from the temperature sensor less than a temperature threshold based on a temperature rating of the fan.

Abstract: A voltage converter system includes a switch configured to switch between first and second states responsive to a first control signal. Timer circuitry is configured to generate a timing signal representing a duration of the first state based on input and output voltages of the voltage converter system. Control logic is coupled to the switch and the timer circuitry, and configured to generate the first control signal based on a second control signal. The second control signal is based on a feedback voltage and a reference voltage. Timer control circuitry is coupled to the control logic and the timer circuitry, and configured to: detect a phase difference between the first control signal and the second control signal; and adjust the timer circuitry to change the duration based on the phase difference.

Abstract: A direct-current (DC) voltage conversion device includes an energy providing circuit, a first transistor switch, a second transistor switch, a third transistor switch, a fourth transistor switch, and an output capacitor. The first transistor switch is turned on. The second transistor switch and the fourth transistor switch are turned off. The energy providing circuit charges the parasitic capacitance of the second transistor switch. When the third transistor switch is turned on, the parasitic capacitance discharges the output capacitor to establish the same voltage drops across the parasitic capacitance and the output capacitor. After establishing the same voltage drops across the parasitic capacitance and the output capacitor, the parasitic capacitance of the second transistor switch charges the parasitic capacitance of the fourth transistor switch, thereby establishing a zero voltage drop across the fourth transistor switch and achieving zero voltage switching.

Abstract: A magnetic component includes a main magnetic core, a power winding coupled to the main magnetic core, a variable reluctance core element arranged in a flux path of the main magnetic core and including a saturable magnetic core and a control winding coupled to the saturable magnetic core. The control winding is isolated relative to the power winding and configured to selectively saturate a section of the saturable magnetic core.