Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, are provided for resource scoring adjustment based on entity selection. In one aspect, a method includes the actions of accessing resource data that specifies, for each of a plurality of resources, a resource identifier and one or more referenced entities, and accessing search term data that specifies a plurality of search terms, and for each search term, a selection value for each resource, each selection value being based on user selections of search results that referenced the resource to which the selection value corresponds. From the resource data and search term data, for each search term and each entity, a search term-entity selection value is determined that is based on the selection values of resources that reference the entity and that were referenced by search results in response to a query that included the search term.
Abstract: A technique for tracing processes executing in a multi-threaded processor includes forming a trace message that includes a virtual core identification (VCID) that identifies an associated thread. The trace message, including the VCID, is then transmitted to a debug tool.
Type:
Grant
Filed:
April 11, 2007
Date of Patent:
November 24, 2015
Assignee:
FREESCALE SEMICONDUCTOR, INC.
Inventors:
Zheng Xu, Suraj Bhaskaran, Jason T. Nearing, Paul B. Rawlins
Abstract: A method is implemented in a computer infrastructure having computer executable code tangibly embodied on a computer readable storage medium having programming instructions. The programming instructions are operable to optimize data remanence over hybrid disk clusters using various storage technologies, determine one or more data storage technologies accessible by a file system, and determine secure delete rules for each of the one or more storage technologies accessible by the file system. The secure delete rules include a number of overwrites required for data to be securely deleted from each of the one or more storage technologies. The programming instructions are further operable to provide the secure delete rules to the file system upon a request for deletion of data for each of the one or more storage technologies a specific amount of times germane to secure delete data from the one or more storage technologies.
Type:
Grant
Filed:
May 16, 2014
Date of Patent:
May 19, 2015
Assignee:
International Business Machines Corporation
Inventors:
Abhinay R. Nagpal, Sandeep R. Patil, Sri Ramanathan, Matthew B. Trevathan
Abstract: A storage system includes a plurality of storage devices connected together, where the plurality of storage devices include a copy-source storage device having data to be copied and copy-target storage devices capable of receiving the copied data. The copy-source storage device includes a copy-source controller for checking parameters contained in a buffer newly setting command to determine a group of storage devices to be subjected to a newly setting of a buffer and a copy-target storage device in the group and transmitting the parameters to the specified copy-target storage device. The copy-target storage device includes a copy-target controller for performing a buffer newly setting process in the specified copy-target storage device on the basis of the parameters received from the copy-source storage device and notifying the copy-source storage device of a result of the buffer newly setting process.
Abstract: A multi-cloud data replication method includes providing a data replication cluster comprising at least a first host node and at least a first online storage cloud. The first host node is connected to the first online storage cloud via a network and comprises a server, a cloud array application and a local cache. The local cache comprises a buffer and a first storage volume comprising data cached in one or more buffer blocks of the local cache's buffer. Next, requesting authorization to perform cache flush of the cached first storage volume data to the first online storage cloud. Upon receiving approval of the authorization, encrypting the cached first storage volume data in each of the one or more buffer blocks with a data private key. Next, assigning metadata comprising at lest a unique identifier to each of the one or more buffer blocks and then encrypting the metadata with a metadata private key.
Abstract: A storage controller containing multiple processors. The processors are divided into groups, each of which handles a different stage of a pipelined process of performing host reads and writes. In one embodiment, the storage controller operates with a flash memory module, and includes multiple parallel pipelines that allow plural host commands to be handled simultaneously.
Abstract: An associative list processing unit and method comprising employing a plurality of prioritized cell blocks and permitting inserts to occur in a single clock cycle if all of the cell blocks are not full.
Abstract: For optimized communication between two memory-related processes in a computer system, a synchronization function is coupled with an operating system function such that it withholds an output of an operating system message that signals a data end of a file in a memory region of the computer system. It can thus be avoided that a memory read process interrupts the reading of the file because a memory write process has not yet written all data of the file into the corresponding memory region.
Abstract: In one or more embodiments, an apparatus comprises an alignment module implemented in hardware to identify requested data that is not aligned on a natural alignment boundary of a memory and load at least two sets of neighboring data such that each said set includes at least a portion of the requested data. The alignment module is further configured to extract the requested data from the at least two sets of neighboring data and output the extracted data to a processor.
Type:
Grant
Filed:
November 21, 2008
Date of Patent:
April 1, 2014
Assignee:
Marvell International Ltd.
Inventors:
Anitha Kona, Moinul H. Khan, Bradley C. Aldrich
Abstract: An apparatus and method to allocate memory in a storage system. Firmware running the method uses an iterative approach to find the best optimal memory configuration for a particular storage system given a variety of configuration data parameters stored as persistent data in non-volatile flash memory. The configuration data relates to resources in the environment that the storage system is found in, such as the number of virtual ports, targets and initiators supported by a storage system IOC. The configuration data is alterable, to allow flexibility in updating and changing parameters, and is employed at runtime when the storage system powers on, to enable the most flexible resource allocation.
Type:
Grant
Filed:
November 21, 2008
Date of Patent:
March 18, 2014
Assignee:
LSI Corporation
Inventors:
Roger T. J Clegg, Brad D. Besmer, Guy Kendall
Abstract: According to one aspect of the present disclosure, a method and technique for using processor registers for extending a cache structure is disclosed. The method includes identifying a register of a processor, identifying a cache to extend, allocating the register as an extension of the cache, and setting an address of the register as corresponding to an address space in the cache.
Type:
Grant
Filed:
November 12, 2010
Date of Patent:
March 18, 2014
Assignee:
International Business Machines Corporation
Inventors:
Wen-Tzer T. Chen, Diane G. Flemming, William A. Maron, Mysore S. Srinivas, David B. Whitworth
Abstract: The system described herein may track references to a shared object by concurrently executing threads using a reference tracking data structure that includes an owner field and an array of byte-addressable per-thread entries, each including a per-thread reference counter and a per-thread counter lock. Slotted threads assigned to a given array entry may increment or decrement the per-thread reference counter in that entry in response to referencing or dereferencing the shared object. Unslotted threads may increment or decrement a shared unslotted reference counter. A thread may update the data structure and/or examine it to determine whether the number of references to the shared object is zero or non-zero using a blocking-optimistic or a non-blocking mechanism. A checking thread may acquire ownership of the data structure, obtain an instantaneous snapshot of all counters, and return a value indicating whether the number of references to the shared object is zero or non-zero.
Abstract: A storage control device for controlling the storage device including a medium for storing data, logical address information, and address translation information and a memory for storing the address translation information read from the medium includes a first receiver for receiving a write request including logical address information, a first sending module for sending a read request including the logical address information of the write request to the storage device, a second receiver for receiving data and logical address information stored in the medium in accordance with the read request from the storage device, and a second sending module for sending an instruction to cause the storage device to write the address translation information stored in the medium into the memory when the logical address information received by the second receiver is different from logical address information included in the write request.
Abstract: A cache control method for a hybrid hard disk drive (HDD) comprising a nonvolatile cache (NVC) and a hard disk. When the hybrid HDD is operating in a non-parallel mode of operation, the control method sequentially searches the NVC and then reads the hard disk for requested data, but when the hybrid HDD is operating in a parallel mode of operation, the control method simultaneously searches the NVC and reads hard disk for the data requested.
Abstract: A cache memory architecture, a method of operating a cache memory and a memory controller. In one embodiment, the cache memory architecture includes: (1) a segment memory configured to contain at least one most significant bit (MSB) of a main memory address, the at least one MSB being common to addresses in a particular main memory logical segment that includes the main memory address, (2) a tag memory configured to contain tags that include other bits of the main memory address and (3) combinatorial logic associated with the segment memory and the tag memory and configured to indicate a cache hit only when both the at least one most significant bit and the other bits match a requested main memory address.
Type:
Grant
Filed:
October 3, 2008
Date of Patent:
February 25, 2014
Assignee:
Agere Systems LLC
Inventors:
Allen B. Goodrich, Alex Rabinovitch, Assaf Rachlevski, Alex Shinkar
Abstract: A second level memory controller uses shadow tags 711 to implement snoop read and write coherence. These shadow tags are generally used only for snoops intending to keep L2 SRAM coherent with the level one data cache. Thus updates for all external cache lines are ignored. The shadow tags are updated on all level one cache allocates and all dirty and invalidate modifications to data stored in L2 SRAM. These interactions happen on different interfaces, but the traffic on that interface includes level one data cache accesses to both external and level two directly addressable lines. These interactions create extra traffic on these interfaces and creating extra stalls to the CPU. Thus in this invention shadow tags are updated only on a subset of less than all updates of the level one tags.
Type:
Grant
Filed:
September 26, 2011
Date of Patent:
February 18, 2014
Assignee:
Texas Instruments Incorporated
Inventors:
Raguram Damodaran, Abhijeet Ashok Chachad, Joseph Raymond Michael Zbiciak, Jonathan (Son) Hung Tran
Abstract: A smartcard includes a write unit that writes data to be written to a data memory according to a write command supplied from an external device, a determining unit that determines whether important data is contained in the data to be written specified by the write command supplied from the external device, a calculating unit that calculates a head address of the important data in the data memory based on data length from a head of the data to be written to a head of the important data and an address on the data memory at which a process of writing the data to be written is started when the determining unit determines that important data is contained in the data to be written, and a position table that stores information indicating a head address of the important data in correspondence to information indicating the important data.
Abstract: Described is a technology by which a virtual hard disk is able to continue servicing virtual disk I/O (reads and writes) while a meta-operation (e.g., copying, moving, deleting, merging, compressing, defragmenting, cryptographic signing, lifting, dropping, converting, or compacting virtual disk data) is performed on the virtual disk. The servicing of virtual disk I/Os may be coordinated with meta-operation performance, such as by throttling and/or prioritizing the virtual disk I/Os. Also described is performing a meta-operation by manipulating one or more de-duplication data structures.
Type:
Grant
Filed:
February 8, 2010
Date of Patent:
January 7, 2014
Assignee:
Microsoft Corporation
Inventors:
Dustin L. Green, Jacob K. Oshins, Michael L. Neil
Abstract: Provided are a method, system, and program for creating at least one volume in a disk storage system. A request is received to create at least one volume on the disk storage system indicating a volume size and number of volumes to create. Selection is made of a storage pool object representing one of a plurality of storage pools having available storage space to create the requested number of volumes. retrieving a storage configuration service of the disk storage system using an association of a disk storage system object representing the disk storage system and the selected storage pool object. The disk storage system object representing the disk storage system is associated with the retrieved storage configuration service. A volume size of the volume to create is set to a calculated size. The storage pool is set as the selected storage pool object. A method is invoked through the retrieved storage configuration service for each volume in the requested number of volumes to create.
Type:
Grant
Filed:
March 16, 2011
Date of Patent:
January 7, 2014
Assignee:
International Business Machines Corporation
Inventors:
David W. Groves, Michael L. Lamb, Raymond M. Swank, Kevin J. Webster
Abstract: A disk drive comprising a rotatable disk, a head configured to read data from the disk, and a controller is disclosed. The controller is configured to read a plurality of track metadata files from the disk during one revolution of the disk using the head, wherein each track metadata file defines logical address to physical address mapping for a track of the disk, each track metadata file is located on a different track of the disk, and the track metadata files are located at track locations such that one of the track metadata files is read shortly after a track-to-track seek from a previous track.