Patents Examined by Andrea Lindgren Baltzell
  • Patent number: 12143088
    Abstract: A balun includes: first wiring that has a first end connected to a first balanced line and a second end connected to a second balanced line; second wiring that has a grounded first end and a second end; third wiring that has a first end connected to the second end of the second wiring and a second end connected to an unbalanced line and is electromagnetically coupled to the second wiring; a first capacitor that has a first end connected to the first end of the third wiring and a grounded second end; and a second capacitor that has a first end connected to the second end of the third wiring and a grounded second end. The first wiring is electromagnetically coupled to at least one of the second wiring and the third wiring.
    Type: Grant
    Filed: July 12, 2022
    Date of Patent: November 12, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Yuri Honda
  • Patent number: 12143073
    Abstract: A signal envelope detector is provided. The signal envelope detector includes an input node configured to receive an input signal. Further, the signal envelope detector includes a capacitive voltage divider coupled to the input node and configured to generate an attenuated input signal by voltage division of the input signal. The signal envelope detector additionally includes a source follower transistor coupled between a first node configured to receive a first voltage supply signal and a second node configured to receive a second voltage supply signal. A gate terminal of the source follower transistor is coupled to the capacitive voltage divider and configured to receive the attenuated input signal. The signal envelope detector includes a rectifier circuit configured to receive and rectify an output signal of the source follower transistor.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: November 12, 2024
    Assignee: Intel Corporation
    Inventors: Martin Clara, Giacomo Cascio
  • Patent number: 12143071
    Abstract: The present application discloses a trimming circuit of differential amplifier, wherein an output end of the differential amplifier is coupled to a first input end of the differential amplifier through a first voltage-dividing resistor; a shift voltage is coupled to a second input end of the differential amplifier through a second voltage-dividing resistor; the first voltage-dividing resistor and the second voltage-dividing resistor respectively form a T-shaped resistor network structure; the T-shaped resistor network structure comprises: a k-bit resistive network coupled to a T-shaped node and a reference power supply end, wherein a low n-bits of the k-bit resistive network is an R-2R resistive network, and part of branches are connected in series with at least one trimming resistor, and each trimming resistor is connected in parallel with a switch.
    Type: Grant
    Filed: July 12, 2019
    Date of Patent: November 12, 2024
    Assignee: Shanghai Analogy Semiconductor Technology Ltd.
    Inventors: Jun Zhang, Zhian Zhang
  • Patent number: 12143096
    Abstract: A filter device includes a first substrate, a first input electrode and a first output electrode on the first substrate, a first ground electrode on the first substrate and receiving a ground potential, an electrically open portion in or on the first substrate, a second substrate mounted on the first substrate, a second input electrode on a surface of the second substrate and connected to the first input electrode, a second output electrode on the surface of the second substrate and connected to the first output electrode, a second ground electrode on the surface of the second substrate and connected to the first ground electrode, and at least one first functional electrode on the second substrate and disposed on a first connecting path connecting the second input electrode and the second output electrode. The open portion is connected to the first connecting path.
    Type: Grant
    Filed: March 2, 2021
    Date of Patent: November 12, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kota Okubo, Takayuki Okude
  • Patent number: 12136911
    Abstract: An acoustic wave device includes an acoustic wave filter configured to filter a radio frequency signal and a loop circuit coupled to the acoustic wave filter. The loop circuit is configured to generate an anti-phase signal to a target signal at a particular frequency. The loop circuit includes a Lamb wave resonator having a piezoelectric layer and an interdigital transducer electrode disposed on the piezoelectric layer. The piezoelectric layer includes free edges. An edge of the piezoelectric layer is configured to one of suppress or scatter reflections of acoustic waves generated by the interdigital transducer electrode from the edge of the piezoelectric layer.
    Type: Grant
    Filed: April 5, 2021
    Date of Patent: November 5, 2024
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventor: Joshua James Caron
  • Patent number: 12136912
    Abstract: An RF filter device that provides small spatial dimensions and good electric performance is provided. The filter device comprises a resonator structure and a further electric circuit. An acoustic minor is arranged between the active structure and the further electric circuit.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: November 5, 2024
    Assignee: RF360 Singapore Pte. Ltd.
    Inventors: Alexandre Agusto Shirakawa, Marcel Giesen
  • Patent number: 12133323
    Abstract: A transmission device for suppressing the glass-fiber effect includes a circuit board and a transmission line. The circuit board includes a plurality of glass fibers, so as to define a fiber pitch. The transmission line is disposed on the circuit board. The transmission line includes a plurality of non-parallel segments. Each of the non-parallel segments of the transmission line has an offset distance with respect to a reference line. The offset distance is longer than or equal to a half of the fiber pitch.
    Type: Grant
    Filed: November 23, 2022
    Date of Patent: October 29, 2024
    Assignees: UNIMICRON TECHNOLOGY CORP., NATIONAL TAIWAN UNIVERSITY
    Inventors: Chin-Hsun Wang, Ruey-Beei Wu, Ching-Sheng Chen, Chun-Jui Huang, Wei-Yu Liao, Chi-Min Chang
  • Patent number: 12132457
    Abstract: A buffer circuit is provided. The buffer circuit includes a Current Differencing Transconductance Amplifier (CDTA) comprising a first input node and a second input node each configured to receive a respective one of a first signal and a second signal. The buffer circuit further includes a first source follower circuit coupled to a first output node of the CDTA and configured to generate a first buffer output signal based on a first output signal of the CDTA. Additionally, the buffer circuit includes a second source follower circuit coupled to a second output node of the CDTA and configured to generate a second buffer output signal based on a second output signal of the CDTA. The buffer circuit further includes a first feedback path comprising at least one of a first resistive element and a first capacitive element. The first feedback path couples an output node of the first source follower circuit to the first input node of the CDTA.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: October 29, 2024
    Assignee: Intel Corporation
    Inventors: Martin Clara, Giacomo Cascio
  • Patent number: 12132449
    Abstract: An amplification circuit includes: a power supply terminal that is connected to a power supply; a transistor that has a source terminal, a drain terminal, and a gate terminal to which a high-frequency signal is input; a transistor that has a source terminal that is connected to the drain terminal, a drain terminal that outputs a high-frequency signal, and a gate terminal that is grounded; a capacitor that is serially disposed on a second path that connects the gate terminal and the power supply terminal to each other; and a switch that is serially disposed on a first path or the second path. The drain terminal and the gate terminal are connected to each other via the switch and the capacitor.
    Type: Grant
    Filed: September 15, 2022
    Date of Patent: October 29, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Daisuke Watanabe
  • Patent number: 12132453
    Abstract: Embodiments of RF amplifiers and packaged RF amplifier devices each include an amplification path with a transistor die, and an output-side impedance matching circuit having a T-match circuit topology. The output-side impedance matching circuit includes a first inductive element connected between the transistor output terminal and a quasi RF cold point node, a second inductive element connected between the quasi RF cold point node and an output of the amplification path, and a first capacitance connected between the quasi RF cold point node and a ground reference node. The RF amplifiers and devices also include a baseband termination circuit connected to the quasi RF cold point node, which includes a third inductive element, a resistor, and a second capacitance in series between the quasi RF cold point node and the ground reference node and a third capacitance between a baseband termination circuit node and the ground reference node.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: October 29, 2024
    Assignee: NXP USA, Inc.
    Inventors: Jeffrey Spencer Roberts, Ning Zhu, Damon G. Holmes
  • Patent number: 12126305
    Abstract: A radio frequency (RF) equalizer in an envelope tracking (ET) circuit is disclosed. A transmitter chain includes an ET circuit having an RF equalizer therein. The RF equalizer includes a two operational amplifier (op-amp) structure that provides a relatively flat gain and a relatively constant negative group delay across a frequency range of interest (e.g., up to 200 MHz). The simple two op-amp structure provides frequency response equalization and time tuning adjustment and/or creates a window Vcc signal.
    Type: Grant
    Filed: May 27, 2021
    Date of Patent: October 22, 2024
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 12126309
    Abstract: In an example apparatus, a first transistor has a base terminal, a first current terminal and a second current terminal. The base terminal is coupled to an input voltage node. A second transistor has a control terminal, a third current terminal and a fourth current terminal. The third current terminal is coupled to the second current terminal. The fourth current terminal is coupled to a first resistor. A second resistor is coupled to the control terminal. An inductor is coupled between the first resistor and a ground terminal.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: October 22, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Siraj Akhtar, Swaminathan Sankaran
  • Patent number: 12126328
    Abstract: Acoustic filters devices and methods of making the same. A filter device includes two or more series resonators acoustically coupled along a shared acoustic track, and two or more shunt resonators electrically coupled to the two or more series resonators.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: October 22, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Sean McHugh, Kurt Raihn
  • Patent number: 12119791
    Abstract: A low noise amplifier comprising a first transconductance amplifier arranged to receive an input voltage at its input terminal and to generate an output current at its output terminal. A second transconductance amplifier is arranged such that its input terminal is connected to the input terminal of the first transconductance amplifier, and such that the output terminal of the second transconductance amplifier is connected to the input terminal of the second transconductance amplifier via a capacitive feedback network (C1).
    Type: Grant
    Filed: August 13, 2021
    Date of Patent: October 15, 2024
    Assignee: Nordic Semiconductor ASA
    Inventors: Jarkko Jussila, Pete Sivonen
  • Patent number: 12119793
    Abstract: A power amplifier module includes a substrate, an amplifier circuit including a plurality of transistors to be mounted on the substrate and a bump connected to the plurality of transistors, a harmonic termination circuit and an output matching circuit that are disposed in or on the substrate and configured to be electrically connected to the amplifier circuit, a connection pad disposed on the substrate and configured to be connected to the bump, and a plurality of connection wiring lines branching from the connection pad. The plurality of connection wiring lines include at least a first connection wiring line that connects the connection pad and the harmonic termination circuit to each other, a second connection wiring line that connects the connection pad and the output matching circuit to each other, and a third connection wiring line that connects the connection pad and an external power supply to each other.
    Type: Grant
    Filed: March 5, 2021
    Date of Patent: October 15, 2024
    Assignee: MURATA MANUFACTURING CO., LTD
    Inventors: Takashi Yamada, Satoshi Tanaka, Yasuhisa Yamamoto
  • Patent number: 12119530
    Abstract: This application provides a combiner, including: a plurality of radio frequency channels, where an ith radio frequency channel includes: an input port, configured to receive as input a first signal corresponding to the ith radio frequency channel, where frequencies of signals corresponding to any two radio frequency channels are different; an output port, configured to output the first signal from the ith radio frequency channel; a resonant cavity component configured between the input port and the output port, including a plurality of resonant cavities connected in series; and a matching resonator, connected to any resonant cavity in the resonant cavity component; and a combination port, connected to an output port of each radio frequency channel, where the ith radio frequency channel is any of the plurality of radio frequency channels, and a consumable device is disposed between matching resonators of any two neighboring radio frequency channels.
    Type: Grant
    Filed: April 15, 2022
    Date of Patent: October 15, 2024
    Assignee: Huawei Technologies Co., Ltd.
    Inventor: Jian Hu
  • Patent number: 12119807
    Abstract: A radio frequency filter includes at least a first sub-filter and a second sub-filter connected in parallel between a first port and a second port. Each of the sub-filters has a piezoelectric plate having front and back surfaces, the back surface attached to a substrate, and portions of the piezoelectric plate forming diaphragms spanning respective cavities in the substrate. A conductor pattern is formed on the front surface of the plate, the conductor pattern includes interdigital transducers (IDTs) of a respective plurality of resonators, with interleaved fingers of each IDT disposed on a respective diaphragm of the plurality of diaphragms. A thickness of the portions of the piezoelectric plate of the first sub-filter is different from a thickness of the portions of the piezoelectric plate of the second sub-filter.
    Type: Grant
    Filed: September 8, 2022
    Date of Patent: October 15, 2024
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Andrew Guyette, Neal Fenzi, Greg Dyer, Sean McHugh
  • Patent number: 12113516
    Abstract: An acoustic-wave ladder filter has a first port, a second port and a ground terminal, and includes a series resonator and a shunt circuit. The series resonator is coupled to and disposed between the first and the second ports in series. The shunt circuit is coupled to and disposed between the series resonator and the grounding terminal, and includes a shunt resonator and a functional circuit. The functional circuit is connected in series with the shunt resonator. The functional circuit includes a resistor having a resistance value. The resistance value is greater than 5 Ohms and is smaller than 50 ohms. The functional circuit may further have an inductance.
    Type: Grant
    Filed: November 12, 2021
    Date of Patent: October 8, 2024
    Assignee: TAI-SAW TECHNOLOGY CO., LTD.
    Inventors: Chih-Chung Hsiao, Fu-Kuo Yu, Shih-Meng Lin
  • Patent number: 12113483
    Abstract: A dc coupled amplifier includes a pre-driver, and amplifier and a bias control circuit. The pre-driver is configured to receive one or more input signals and amplify the one or more input signals to create one or more pre-amplified signals. The amplifier has cascode configured transistors configured to receive and amplify the one or more pre-amplified signals to create one or more amplified signals, the amplifier further having an output driver termination element. The bias control circuit is connected between the pre-driver and the amplifier, the bias control circuit receiving at least one bias current from the output driver termination element of the amplifier, wherein the pre-driver, the amplifier and the bias control circuit are all formed on a same die.
    Type: Grant
    Filed: November 28, 2022
    Date of Patent: October 8, 2024
    Assignee: MACOM Technologies Solutions Holdings, Inc.
    Inventors: Wayne Kennan, Baotoan Nguyen
  • Patent number: 12113513
    Abstract: A filter includes a ladder filter portion formed on a first piezoelectric substrate; and a multi-mode filter portion connected to the ladder filter portion and formed on a second piezoelectric substrate different from the first piezoelectric substrate. The ladder filter portion and the multi-mode filter portion constitute a single passband.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: October 8, 2024
    Assignee: KYOCERA Corporation
    Inventor: Tomonori Urata