Patents Examined by Andrea Lindgren Baltzell
  • Patent number: 12132457
    Abstract: A buffer circuit is provided. The buffer circuit includes a Current Differencing Transconductance Amplifier (CDTA) comprising a first input node and a second input node each configured to receive a respective one of a first signal and a second signal. The buffer circuit further includes a first source follower circuit coupled to a first output node of the CDTA and configured to generate a first buffer output signal based on a first output signal of the CDTA. Additionally, the buffer circuit includes a second source follower circuit coupled to a second output node of the CDTA and configured to generate a second buffer output signal based on a second output signal of the CDTA. The buffer circuit further includes a first feedback path comprising at least one of a first resistive element and a first capacitive element. The first feedback path couples an output node of the first source follower circuit to the first input node of the CDTA.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: October 29, 2024
    Assignee: Intel Corporation
    Inventors: Martin Clara, Giacomo Cascio
  • Patent number: 12132449
    Abstract: An amplification circuit includes: a power supply terminal that is connected to a power supply; a transistor that has a source terminal, a drain terminal, and a gate terminal to which a high-frequency signal is input; a transistor that has a source terminal that is connected to the drain terminal, a drain terminal that outputs a high-frequency signal, and a gate terminal that is grounded; a capacitor that is serially disposed on a second path that connects the gate terminal and the power supply terminal to each other; and a switch that is serially disposed on a first path or the second path. The drain terminal and the gate terminal are connected to each other via the switch and the capacitor.
    Type: Grant
    Filed: September 15, 2022
    Date of Patent: October 29, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Daisuke Watanabe
  • Patent number: 12132453
    Abstract: Embodiments of RF amplifiers and packaged RF amplifier devices each include an amplification path with a transistor die, and an output-side impedance matching circuit having a T-match circuit topology. The output-side impedance matching circuit includes a first inductive element connected between the transistor output terminal and a quasi RF cold point node, a second inductive element connected between the quasi RF cold point node and an output of the amplification path, and a first capacitance connected between the quasi RF cold point node and a ground reference node. The RF amplifiers and devices also include a baseband termination circuit connected to the quasi RF cold point node, which includes a third inductive element, a resistor, and a second capacitance in series between the quasi RF cold point node and the ground reference node and a third capacitance between a baseband termination circuit node and the ground reference node.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: October 29, 2024
    Assignee: NXP USA, Inc.
    Inventors: Jeffrey Spencer Roberts, Ning Zhu, Damon G. Holmes
  • Patent number: 12126305
    Abstract: A radio frequency (RF) equalizer in an envelope tracking (ET) circuit is disclosed. A transmitter chain includes an ET circuit having an RF equalizer therein. The RF equalizer includes a two operational amplifier (op-amp) structure that provides a relatively flat gain and a relatively constant negative group delay across a frequency range of interest (e.g., up to 200 MHz). The simple two op-amp structure provides frequency response equalization and time tuning adjustment and/or creates a window Vcc signal.
    Type: Grant
    Filed: May 27, 2021
    Date of Patent: October 22, 2024
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 12126309
    Abstract: In an example apparatus, a first transistor has a base terminal, a first current terminal and a second current terminal. The base terminal is coupled to an input voltage node. A second transistor has a control terminal, a third current terminal and a fourth current terminal. The third current terminal is coupled to the second current terminal. The fourth current terminal is coupled to a first resistor. A second resistor is coupled to the control terminal. An inductor is coupled between the first resistor and a ground terminal.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: October 22, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Siraj Akhtar, Swaminathan Sankaran
  • Patent number: 12126328
    Abstract: Acoustic filters devices and methods of making the same. A filter device includes two or more series resonators acoustically coupled along a shared acoustic track, and two or more shunt resonators electrically coupled to the two or more series resonators.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: October 22, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Sean McHugh, Kurt Raihn
  • Patent number: 12119791
    Abstract: A low noise amplifier comprising a first transconductance amplifier arranged to receive an input voltage at its input terminal and to generate an output current at its output terminal. A second transconductance amplifier is arranged such that its input terminal is connected to the input terminal of the first transconductance amplifier, and such that the output terminal of the second transconductance amplifier is connected to the input terminal of the second transconductance amplifier via a capacitive feedback network (C1).
    Type: Grant
    Filed: August 13, 2021
    Date of Patent: October 15, 2024
    Assignee: Nordic Semiconductor ASA
    Inventors: Jarkko Jussila, Pete Sivonen
  • Patent number: 12119793
    Abstract: A power amplifier module includes a substrate, an amplifier circuit including a plurality of transistors to be mounted on the substrate and a bump connected to the plurality of transistors, a harmonic termination circuit and an output matching circuit that are disposed in or on the substrate and configured to be electrically connected to the amplifier circuit, a connection pad disposed on the substrate and configured to be connected to the bump, and a plurality of connection wiring lines branching from the connection pad. The plurality of connection wiring lines include at least a first connection wiring line that connects the connection pad and the harmonic termination circuit to each other, a second connection wiring line that connects the connection pad and the output matching circuit to each other, and a third connection wiring line that connects the connection pad and an external power supply to each other.
    Type: Grant
    Filed: March 5, 2021
    Date of Patent: October 15, 2024
    Assignee: MURATA MANUFACTURING CO., LTD
    Inventors: Takashi Yamada, Satoshi Tanaka, Yasuhisa Yamamoto
  • Patent number: 12119530
    Abstract: This application provides a combiner, including: a plurality of radio frequency channels, where an ith radio frequency channel includes: an input port, configured to receive as input a first signal corresponding to the ith radio frequency channel, where frequencies of signals corresponding to any two radio frequency channels are different; an output port, configured to output the first signal from the ith radio frequency channel; a resonant cavity component configured between the input port and the output port, including a plurality of resonant cavities connected in series; and a matching resonator, connected to any resonant cavity in the resonant cavity component; and a combination port, connected to an output port of each radio frequency channel, where the ith radio frequency channel is any of the plurality of radio frequency channels, and a consumable device is disposed between matching resonators of any two neighboring radio frequency channels.
    Type: Grant
    Filed: April 15, 2022
    Date of Patent: October 15, 2024
    Assignee: Huawei Technologies Co., Ltd.
    Inventor: Jian Hu
  • Patent number: 12119807
    Abstract: A radio frequency filter includes at least a first sub-filter and a second sub-filter connected in parallel between a first port and a second port. Each of the sub-filters has a piezoelectric plate having front and back surfaces, the back surface attached to a substrate, and portions of the piezoelectric plate forming diaphragms spanning respective cavities in the substrate. A conductor pattern is formed on the front surface of the plate, the conductor pattern includes interdigital transducers (IDTs) of a respective plurality of resonators, with interleaved fingers of each IDT disposed on a respective diaphragm of the plurality of diaphragms. A thickness of the portions of the piezoelectric plate of the first sub-filter is different from a thickness of the portions of the piezoelectric plate of the second sub-filter.
    Type: Grant
    Filed: September 8, 2022
    Date of Patent: October 15, 2024
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Andrew Guyette, Neal Fenzi, Greg Dyer, Sean McHugh
  • Patent number: 12113516
    Abstract: An acoustic-wave ladder filter has a first port, a second port and a ground terminal, and includes a series resonator and a shunt circuit. The series resonator is coupled to and disposed between the first and the second ports in series. The shunt circuit is coupled to and disposed between the series resonator and the grounding terminal, and includes a shunt resonator and a functional circuit. The functional circuit is connected in series with the shunt resonator. The functional circuit includes a resistor having a resistance value. The resistance value is greater than 5 Ohms and is smaller than 50 ohms. The functional circuit may further have an inductance.
    Type: Grant
    Filed: November 12, 2021
    Date of Patent: October 8, 2024
    Assignee: TAI-SAW TECHNOLOGY CO., LTD.
    Inventors: Chih-Chung Hsiao, Fu-Kuo Yu, Shih-Meng Lin
  • Patent number: 12113483
    Abstract: A dc coupled amplifier includes a pre-driver, and amplifier and a bias control circuit. The pre-driver is configured to receive one or more input signals and amplify the one or more input signals to create one or more pre-amplified signals. The amplifier has cascode configured transistors configured to receive and amplify the one or more pre-amplified signals to create one or more amplified signals, the amplifier further having an output driver termination element. The bias control circuit is connected between the pre-driver and the amplifier, the bias control circuit receiving at least one bias current from the output driver termination element of the amplifier, wherein the pre-driver, the amplifier and the bias control circuit are all formed on a same die.
    Type: Grant
    Filed: November 28, 2022
    Date of Patent: October 8, 2024
    Assignee: MACOM Technologies Solutions Holdings, Inc.
    Inventors: Wayne Kennan, Baotoan Nguyen
  • Patent number: 12113513
    Abstract: A filter includes a ladder filter portion formed on a first piezoelectric substrate; and a multi-mode filter portion connected to the ladder filter portion and formed on a second piezoelectric substrate different from the first piezoelectric substrate. The ladder filter portion and the multi-mode filter portion constitute a single passband.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: October 8, 2024
    Assignee: KYOCERA Corporation
    Inventor: Tomonori Urata
  • Patent number: 12113495
    Abstract: An amplifier circuit having an adjustable gain is provided. The amplifier circuit includes an input terminal, an output terminal, an amplifier, and an attenuation circuit. The input terminal receives an input signal, which is in turn received by an input terminal of the amplifier. An output terminal of the amplifier outputs the input signal that is amplified. The attenuation circuit is coupled between the output terminal of the amplifier and the output terminal to provide a plurality of attenuation to the input signal that is amplified and generate a first attenuation signal, or between the input terminal and the output terminal to provide the plurality of attenuations to the input signal and generate a second attenuation signal. A difference between an impedance value of the input terminal of the attenuation circuit and an impedance value of the output terminal of the attenuation circuit is within a predetermined range.
    Type: Grant
    Filed: October 12, 2021
    Date of Patent: October 8, 2024
    Assignee: RichWave Technology Corp.
    Inventors: Chih-Sheng Chen, Ching-Wen Hsu
  • Patent number: 12113503
    Abstract: A manufacturing process for a bulk acoustic resonator, comprising: making an acoustic mirror on a substrate; making a bottom electrode layer for covering the acoustic mirror on the substrate; performing chemical treatment on a peripheral part of the bottom electrode layer to form a modified layer, which surrounds the bottom electrode layer; making a piezoelectric layer on the bottom electrode layer; and making a top electrode layer on the piezoelectric layer. A bulk acoustic resonator, comprising: a substrate, an acoustic mirror formed on the substrate, and a bottom electrode layer, a piezoelectric layer and a top electrode layer that are sequentially formed on the substrate with the acoustic mirror, chemical treatment is performed on a part of the bottom electrode layer close to an edge of the acoustic mirror to form a modified layer. Parasitic oscillation of the resonator is inhibited, and wiring of a top electrode is greatly simplified.
    Type: Grant
    Filed: September 27, 2020
    Date of Patent: October 8, 2024
    Assignee: HANGZHOU XINGHE TECHNOLOGY CO., LTD.
    Inventors: Linping Li, Jinghao Sheng, Zhou Jiang
  • Patent number: 12107554
    Abstract: Circuits and methods for use in amplifying amplitude and phase modulated signals. A circuit uses a digital controlled multi stage combiner, a signal phase discrete mapper and a combiner digital control circuit with N parallel signal feeding it. The signals resulting from N power amplifiers have phases with belonging to an alphabet with M discrete phases prior to being fed to the multi stage combiner. The phases of the N input signals are converted in an control signal generator into Ns sets of digital control signals to control N·M sets of switches where the signals are selected according the phase and sent to the corresponding combiner in the M possible combiners. Each one combiner from the set of M combiner then combines these signals. A second stage with digital controlled combiner, combines into two sub-sets of signals the signals resulting from first stage and the resulting outputs of the combiner are then combined by a third combining digital controlled stage into the output signal.
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: October 1, 2024
    Assignee: UNIVERSIDADE NOVA DE LISBOA
    Inventors: Paulo Miguel De Araújo Borges Montezuma De Carvalho, Rui Miguel Henriques Dias Morgado Dinis, João Pedro Abreu De Oliveira
  • Patent number: 12107563
    Abstract: An acoustic wave filter includes a longitudinally coupled resonator including IDT electrodes and a reflector. A standard deviation of a pitch deviation rate of at least one of the reflector and the IDT electrodes is greater than or equal to about 1.4%.
    Type: Grant
    Filed: January 13, 2022
    Date of Patent: October 1, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Akira Noguchi
  • Patent number: 12107311
    Abstract: A system for preventing crosstalk between adjacent channels comprises a crossover connector positioned along a length of one channel such that a portion of a positive trace for a first channel is positioned adjacent to a positive trace of a positive trace of an adjacent channel. The position of the crossover connector is based on preventing crosstalk and crossover connectors on adjacent channels may be staggered to further prevent crosstalk. A crossover connector may be based on capacitors or resistors to prevent crosstalk.
    Type: Grant
    Filed: October 29, 2021
    Date of Patent: October 1, 2024
    Assignee: Dell Products L.P.
    Inventors: Bhyrav Mutnury, Sandor Farkas
  • Patent number: 12107555
    Abstract: Provided is a drive amplifier. A drive amplifier may include: a main circuit configured to receive an RF input signal and output a first RF output signal; and a selective bias adjustment circuit comprising a first common gate transistor to which a first common gate bias voltage is applied and a second common gate transistor to which a second common gate bias voltage is applied, and configured to output a second RF output signal using the first common gate transistor and the second common gate transistor.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: October 1, 2024
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Min Park, Jang Hong Choi, Bon Tae Koo, Kisu Kim, Kyung Hwan Park
  • Patent number: 12100881
    Abstract: A directional coupler includes: a main line (11) through which a main signal (31) flows; a sub-line (12) through which a sub-signal (32) corresponding to the main signal (31) flows by electromagnetic coupling with the main line (11); and an inductor (13) that is connected in series with one line among the main line (11) and the sub-line (12) and through which one signal among the main signal (31) and the sub-signal (32) flows. A first portion (41) of a first wiring line (21) forming the inductor (13) and a second portion (42) of a second wiring line (22) forming the other line among the main line (11) and the sub-line (12) are electromagnetically coupled with each other.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: September 24, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Ryoki Shikishima