Patents Examined by Aneta B Cieslewicz
  • Patent number: 11963390
    Abstract: A light-emitting device and a display apparatus including the same are provided. The light-emitting device includes a metal reflective layer having a phase modulation surface, a first electrode on the metal reflective layer, an organic emission layer which is provided on the first electrode and emits white light, and a second electrode on the organic emission layer. The phase modulation surface includes a plurality of protrusions and a plurality of recesses.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: April 16, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sunjin Song, Wonjae Joo, Hyun Koo, Jisoo Kyoung, Sunghoon Lee
  • Patent number: 11937450
    Abstract: A display apparatus includes a display module including a display surface. The display module includes a display panel including a plurality of display devices which displays an image on the display surface, a plurality of light concentration lenses arranged on the display panel, a buffer layer disposed on the light concentration lenses, and a plurality of diffraction patterns arranged at regular intervals on the buffer layer, where the diffraction patterns diffract a portion of lights incident thereto.
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: March 19, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Koichi Sugitani, Jin-su Byun, Gwangmin Cha, Saehee Han, Hoon Kang, Jin-lak Kim
  • Patent number: 11908945
    Abstract: A coating liquid for forming an n-type oxide semiconductor film, the coating liquid including: a Group A element, which is at least one selected from the group consisting of Sc, Y, Ln, B, Al, and Ga; a Group B element, which is at least one of In and Tl; a Group C element, which is at least one selected from the group consisting of Group 4 elements, Group 5 elements, Group 6 elements, Group 7 elements, Group 8 elements, Group 9 elements, Group 10 elements, Group 14 elements, Group 15 elements, and Group 16 elements; and a solvent.
    Type: Grant
    Filed: September 9, 2016
    Date of Patent: February 20, 2024
    Assignee: RICOH COMPANY, LTD.
    Inventors: Naoyuki Ueda, Yuki Nakamura, Yukiko Abe, Shinji Matsumoto, Yuji Sone, Ryoichi Saotome, Sadanori Arae, Minehide Kusayanagi
  • Patent number: 11818911
    Abstract: The disclosure provides a display substrate and a manufacturing method thereof, a display panel and a display apparatus. The display substrate includes a substrate and an electroluminescent layer on the substrate. The display substrate further includes a first reflective electrode layer, a buffer layer and a second reflective electrode layer sequentially formed on a side of the electroluminescent layer distal to the substrate. The buffer layer is provided with a first hollow region, the second reflective electrode layer is provided with a second hollow region, an overlapping region between the first hollow region and the second hollow region is configured to transmit light emitted by the electroluminescent layer. The present disclosure can detect the light-emitting brightness of each sub-pixel in the organic electroluminescent layer in real time to improve light-emitting efficiency.
    Type: Grant
    Filed: March 4, 2020
    Date of Patent: November 14, 2023
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Feng Liao, Yunsik Im, Yoonsung Um, Shunhang Zhang, Liwei Liu, Hongrun Wang, Hui Zhang, Yue Jia, Kai Hou
  • Patent number: 11810845
    Abstract: Carrier with an electrically insulating base material, electrically conductive through-connections and a thermal connection element. The through-connections and the thermal connection element are each completely surrounded by the base material in the lateral direction, the thermal connection element and the through-connections completely penetrating the base material perpendicularly to the main extension plane of the carrier, and the thermal connection element being formed with a material which has a thermal conductivity of at least 200 W/(m K).
    Type: Grant
    Filed: October 30, 2018
    Date of Patent: November 7, 2023
    Assignee: OSRAM OLED GMBH
    Inventors: Jörg Erich Sorg, Konrad Wagner, Michael Förster, Josef Hirn
  • Patent number: 11798815
    Abstract: A method of manufacturing a glass article comprising: forming a first layer of a first metal on a glass substrate, the glass substrate comprising silicon dioxide and aluminum oxide; subjecting the glass substrate with the first layer of the first metal to a first thermal treatment; forming a second layer of a second metal over the first layer of the first metal; and subjecting the second layer of the second metal to a second thermal treatment, the first thermal treatment and the second thermal treatment inducing intermixing of the first metal, the second metal, and at least one of aluminum, aluminum oxide, silicon, and silicon dioxide of the glass substrate to form a metallic region comprising the first metal, the second metal, aluminum oxide, and silicon dioxide. The first metal can be silver. The second metal can be copper.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: October 24, 2023
    Assignee: Corning Incorporated
    Inventors: Philip Simon Brown, Mandakini Kanungo, Prantik Mazumder
  • Patent number: 11793037
    Abstract: A display panel and a display device are provided. The display panel includes a substrate, a driving circuit layer, a planarization layer, and a light-emitting unit layer. The driving circuit layer is provided on a side of the substrate. The planarization layer is provided on a side of the driving circuit layer facing away from the substrate. The light-emitting unit layer is provided on a side of the planarization layer facing away from the driving circuit layer. The planarization layer includes a first planarization sublayer and a second planarization sublayer. The first planarization sublayer is arranged at least in a first region of the display panel. The second planarization sublayer is arranged at least in a second region of the display panel. Materials of the first planarization sublayer and the second planarization sublayer are different in composition.
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: October 17, 2023
    Assignee: WuHan TianMa Micro-electronics CO., LTD.
    Inventors: Shuangli Zhu, Kangguan Pan, Leilei Cao
  • Patent number: 11784190
    Abstract: A display apparatus includes a substrate, a first thin-film transistor including a first semiconductor layer on the substrate, and a first gate electrode on the first semiconductor layer, the first gate electrode being insulated from the first semiconductor layer by a first gate insulating layer, an organic interlayer insulating layer covering the first gate electrode, a first conductive layer on the organic interlayer insulating layer, a first contact hole exposing a top portion of the first semiconductor layer by penetrating through the organic interlayer insulating layer and the first gate insulating layer, and a first protruding portion protruding from a top surface of the substrate between the substrate and the first semiconductor layer, the first protruding portion corresponding to the first contact hole, wherein the first conductive layer contacts the first semiconductor layer through the first contact hole.
    Type: Grant
    Filed: March 19, 2019
    Date of Patent: October 10, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Sewan Son, Moosoon Ko, Youngwoo Park, Jinsung An, Minwoo Woo, Juwon Yoon, Seongjun Lee, Wangwoo Lee, Jeongsoo Lee, Jiseon Lee, Deukmyung Ji
  • Patent number: 11751442
    Abstract: A display panel and a display device are provided. The display panel has a display area. The display panel includes: a base substrate; a driving circuit and at least one signal line on the base substrate; and at least one insulating layer between the driving circuit and the at least one signal line. The driving circuit is disposed in a periphery of the display area; and an orthogonal projection of at least one of the signal lines on the base substrate has an overlapping area with an orthogonal projection of the driving circuit on the base substrate.
    Type: Grant
    Filed: April 19, 2019
    Date of Patent: September 5, 2023
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Hongwei Tian, Yanan Niu, Zheng Liu, Liangjian Li, Dong Li, Meng Zhao, Long Han, Can Zheng
  • Patent number: 11735422
    Abstract: Methods of forming structures including a photoresist underlayer and structures including the photoresist underlayer are disclosed. Exemplary methods include forming the photoresist underlayer that includes metal. Techniques for treating a surface of the photoresist underlayer and/or depositing an additional layer overlying the photoresist underlayer are also disclosed.
    Type: Grant
    Filed: October 8, 2020
    Date of Patent: August 22, 2023
    Assignee: ASM IP Holding B.V.
    Inventors: Ivan Zyulkov, David Kurt de Roest, Yoann Tomczak, Michael Eugene Givens, Perttu Sippola, Tatiana Ivanova, Zecheng Liu, Bokheon Kim, Daniele Piumi
  • Patent number: 11653515
    Abstract: An electroluminescent display device is disclosed. The electroluminescent display device includes a substrate having thereon a first sub pixel and a second sub pixel, a first electrode in each of the first sub pixel and the second sub pixel on the substrate, an organic layer with P-type polarity or N-type polarity on the first electrode, and a second electrode on the organic layer. The organic layer provided in the first sub pixel and the organic layer provided in the second sub pixel are spaced apart from each other with a doping layer provided in the boundary area between the first sub pixel and the second sub pixel. The doping layer is doped with dopant whose polarity is opposite to that of the organic layer.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: May 16, 2023
    Assignee: LG Display Co., Ltd.
    Inventors: TaeHan Park, JongSung Kim, Howon Choi, Dongyoung Kim
  • Patent number: 11600713
    Abstract: A method includes forming a semiconductor fin extending a first height above a substrate, forming a dummy dielectric material over the semiconductor fin and over the substrate, forming a dummy gate material over the dummy dielectric material, the dummy gate material extending a second height above the substrate, etching the dummy gate material using multiple etching processes to form a dummy gate stack, wherein each etching process of the multiple etching processes is a different etching process, wherein the dummy gate stack has a first width at the first height, and wherein the dummy gate stack has a second width at the second height that is different from the first width.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: March 7, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Teng Liao, Chia-Cheng Tai, Tzu-Chan Weng, Yi-Wei Chiu, Chih Hsuan Cheng
  • Patent number: 11563048
    Abstract: A semiconductor device includes a first dielectric structure, a second dielectric structure, a first substrate between the first dielectric structure and the second dielectric structure, a passivation structure over the second dielectric structure, a first metallic structure over the first dielectric structure, a second metallic structure over the passivation structure, and a third metallic structure in the first and second dielectric structures, the first substrate, and the passivation structure. The second dielectric structure is between the passivation structure and the first substrate. The first metallic structure is electrically connected to the second metallic structure through the third metallic structure, the third metallic structure includes a first portion in the first dielectric structure and the first substrate, a second portion in the second dielectric structure and a third portion in the passivation structure.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: January 24, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventor: Yin-Chieh Huang
  • Patent number: 11469281
    Abstract: Disclosed is an organic EL display panel including: a substrate; a planarization layer being disposed on an upper surface of the substrate and containing a resin material; plural pixel electrodes being disposed in a matrix manner on the planarization layer; a light emitting layer being disposed on the pixel electrodes and containing an organic luminescent material; and a common electrode covering at least an upper side of the light emitting layer and being disposed continuously in a plane direction. A recessed part is opened to extend in a column direction in at least one gap between the pixel electrodes adjacent to each other in a row direction on the planarization layer, the common electrode is disposed continuously in the recessed part, and a power feed auxiliary interconnect extending in the column direction and formed of an applied film is disposed on an upper surface of the common electrode.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: October 11, 2022
    Assignee: JOLED INC.
    Inventors: Kenichi Nendai, Jiro Yamada
  • Patent number: 11450740
    Abstract: Some embodiments include an integrated assembly having an access transistor. The access transistor has a first source/drain region gatedly coupled with a second source/drain region. A digit line is coupled with the first source/drain region. A charge-storage device is coupled with the second source/drain region through an interconnect. The interconnect includes a length of a semiconductor material. A protective transistor gates a portion of the length of the semiconductor material.
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: September 20, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Scott J. Derner, Charles L. Ingalls
  • Patent number: 11437296
    Abstract: A semiconductor package in an aspect of the present invention includes a metal board, a first frame, a second frame, and a bond. The metal board has an upper surface including a mount on which a semiconductor device is mountable. The first frame has a side surface facing a side surface of the metal board and has a smaller thermal expansion coefficient than the metal board. The second frame is on upper surfaces of the metal board and the first frame and surrounds the mount, and has a smaller thermal expansion coefficient than the metal board. The bond is between the metal board and the first frame, between the metal board and the second frame, and between the first frame and the second frame. The semiconductor package includes an alloy layer between the metal board and the bond.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: September 6, 2022
    Assignee: KYOCERA CORPORATION
    Inventors: Hiroshi Matsumoto, Hiroki Ito, Takashi Kimura
  • Patent number: 11437527
    Abstract: An encapsulation cover for an electronic package includes a frontal wall with a through-passage extending between faces. The frontal wall includes an optical element that allows light to pass through the through-passage. A cover body and a metal insert that is embedded in the cover body, with the cover body being overmolded over the metal insert, defines at least part of the frontal wall.
    Type: Grant
    Filed: June 9, 2020
    Date of Patent: September 6, 2022
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: Karine Saxod, Veronique Ferre, Agnes Baffert, Jean-Michel Riviere
  • Patent number: 11424253
    Abstract: An illustrative device disclosed herein includes a semiconductor substrate. The substrate includes a source region, a drain region and a channel region. The channel region is arranged between the source region and the drain region. A gate insulation layer is provided over the channel region. A floating gate electrode is provided over the gate insulation layer. A layer of a ferroelectric material is provided over the floating gate electrode. A top electrode is provided over the layer of ferroelectric material. A projected area of the top electrode onto a plane that is perpendicular to a thickness direction of the semiconductor substrate is smaller than a projected area of the floating gate electrode onto the plane.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: August 23, 2022
    Assignees: NaMLab gGmbH, Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.
    Inventors: Johannes Mueller, Stefan Mueller, Stefan Flachowsky
  • Patent number: 11424275
    Abstract: The present disclosure provides a flexible display device including a substrate, a first metal layer, a first insulating layer and a second insulating layer. The substrate includes an active region and a peripheral region adjacent to the active region. The first metal layer is disposed on the substrate. The first insulating layer is disposed on the first metal layer, and the first insulating layer includes a first via hole disposed in the peripheral region. The second insulating layer is disposed on the first insulating layer, and the second insulating layer includes a second via hole. In a top view direction of the flexible display device, the first via hole is disposed within the second via hole, and the second via hole exposes a portion of a top surface of the first insulating layer.
    Type: Grant
    Filed: September 7, 2020
    Date of Patent: August 23, 2022
    Assignee: InnoLux Corporation
    Inventors: Kuo-Shun Tsai, Chu-Hong Lai, Yu-Chih Tseng
  • Patent number: 11387118
    Abstract: Integrated circuit packages and methods of forming the same are disclosed. A first die is mounted on a first side of a workpiece, the workpiece including a second die. The workpiece is mounted to a front side of a package substrate, where the first die is at least partially disposed in a through hole in the package substrate. A heat dissipation feature may be attached on a second side of the workpiece. An encapsulant may be formed on the front side of the package substrate around the workpiece.
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: July 12, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Chien-Hsun Lee, Chi-Yang Yu, Jung Wei Cheng, Chin-Liang Chen