Abstract: There is provided a method of forming a film with improved step coverage on a substrate by performing, a predetermined number of times, forming a first layer by supplying a halogen-free precursor having a first chemical bond cut by thermal energy at a first temperature and a second chemical bond cut by thermal energy at a second temperature lower than the first temperature and having a ratio of the number of first chemical bonds to the number of second chemical bonds in one molecule thereof, the ratio being equal to or more than 3, to the substrate at a temperature equal to or higher than the second temperature and lower than the first temperature.

Abstract: Methods and systems for RF pulse reflection reduction are provided herein. In some embodiments, a method includes (a) receiving a process recipe for processing the substrate that includes a plurality of pulsed RF power waveforms from a plurality of RF generators during a first duty cycle, (b) dividing the first duty cycle into a plurality of equal time intervals, (c) for each RF generator, determining a frequency command set for all intervals and send the frequency command set to the RF generator, wherein the frequency command set includes a frequency set point for each of the intervals in the plurality of equal time intervals, and (d) providing a plurality of RF power waveforms from a plurality of RF generators to a process chamber during a first duty cycle according to the frequency command set sent to each RF generator.

Abstract: A method is provided for gate contact formation on a semiconductor workpiece using an integrated sequence of processing steps executed on a common manufacturing platform (CMP) hosting one or more film-forming modules, one or more etching modules, and one or more transfer modules. A workpiece having a contact feature formed therein, and inspected throughout, the contact feature having a semiconductor contact surface exposed, is received into the CMP. A metal layer is deposited within the contact feature after the workpiece is treated to remove contamination. The integrated sequence of processing steps is executed within the CMP without leaving the controlled environment, the transfer modules used to transfer the workpiece between the modules while maintaining the workpiece within the controlled environment.

Abstract: A multi-stacked package-on-package structure includes a method. The method includes: adhering a first die and a plurality of second dies to a substrate, the first die having a different function from each of the plurality of second dies; attaching a passive device over the first die; encapsulating the first die, the plurality of second dies, and the passive device; and forming a first redistribution structure over the passive device, the first die, and the plurality of second dies, the passive device connecting the first die to the first redistribution structure.

Abstract: Embodiments of systems and methods for semiconductor back end of line (BEOL) interconnect using multiple materials in a fully self-aligned via (FSAV) process. In an embodiment, a method includes receiving a substrate with a patterned structure formed on a surface of the substrate. A method may also include depositing a first interconnect material in a first region of the patterned structure. Such methods may also include depositing a second interconnect material in a second region of the patterned structure, wherein the first interconnect material is different from the second interconnect material, and wherein the first region and the second region include a common layer of the patterned structures.

Abstract: A method includes spin-coating a first metal-free layer over the substrate, depositing a metal-containing layer over the first metal-free layer, spin-coating a second metal-free layer over the first metal-containing layer, forming a photoresist layer over the second metal-free layer, the photoresist layer including a first metallic element, exposing the photoresist layer, and subsequently developing the photoresist layer to form a pattern. The metal-containing layer includes a second metallic element selected from zirconium, tin, lanthanum, or manganese, and the first metallic element is selected from zirconium, tin, cesium, barium, lanthanum, indium, silver, or cerium.

Abstract: A method of aligning semiconductor chips in a medium includes providing an electrically insulating liquid medium; providing semiconductor chips; forming a suspension with the medium and the semiconductor chips; exposing the semiconductor chips to electromagnetic radiation that generates free charge carriers in the semiconductor chips; arranging the suspension in an electric field in which the semiconductor chips are aligned along the electric field; and curing the medium after aligning the semiconductor chips.

Abstract: Disclosed are a laser bonding apparatus and a laser bonding method capable of bonding an electronic component to a three-dimensional structure having a regular or irregular shape in a curved portion such as an automobile tail lamp or a headlamp. The laser bonding apparatus and method for a three-dimensional structure may prevent misalignment and poor bonding of the electronic component with respect to the three-dimensional structure.

Abstract: The disclosed process includes the successive stages of providing a substrate comprising a dielectric layer; forming a first layer of block copolymers on a part of the dielectric layer, so that the dielectric layer exhibits free zones with a random spatial distribution; etching the free zones, so as to structure the dielectric layer; removing the first layer of block copolymers; forming a first electrode on the structured dielectric layer; forming a memory layer, of resistive memory type, on the first electrode; forming a second electrode on the memory layer; forming a second layer of block copolymers on a part of the second electrode, so that the second electrode exhibits free zones with a random spatial distribution; etching the free zones, so as to structure the second electrode; and removing the second layer of block copolymers.

Abstract: A method of processing a substrate, having a first surface with at least one division line formed thereon and a second surface opposite the first surface, includes applying a pulsed laser beam to the substrate from the side of the first surface, at least in a plurality of positions along the at least one division line, so as to form a plurality of modified regions in the substrate, each modified region extending at least from the first surface towards the second surface. Each modified region is formed by melting substrate material by means of the pulsed laser beam and allowing the molten substrate material to resolidify. The method further comprises removing substrate material along the at least one division line where the plurality of modified regions has been formed.

Abstract: The present disclosure describes a method that includes forming a dielectric layer over a contact region on a substrate; etching the dielectric layer to form a contact opening to expose the contact region; and pre-cleaning the exposed contact region to remove a residual material formed by the etching. During the pre-cleaning, the first contact region is exposed to an inductively coupled radio frequency (RF) plasma. Also, during the pre-cleaning, a direct current power supply unit (DC PSU) provides a bias voltage to the substrate and a magnetic field is applied to the inductively coupled RF plasma to collimate ions.

Abstract: Methods and systems for a semiconductor device package with a die to interposer wafer first bond are disclosed and may include bonding a plurality of semiconductor die comprising electronic devices to an interposer wafer, and applying an underfill material between the die and the interposer wafer. Methods and systems for a semiconductor device package with a die-to-packing substrate first bond are disclosed and may include bonding a first semiconductor die to a packaging substrate, applying an underfill material between the first semiconductor die and the packaging substrate, and bonding one or more additional die to the first semiconductor die. Methods and systems for a semiconductor device package with a die-to-die first bond are disclosed and may include bonding one or more semiconductor die comprising electronic devices to an interposer die.

Abstract: Embodiments described herein relate generally to methods for forming a conductive feature in a dielectric layer in semiconductor processing and structures formed thereby. In some embodiments, a structure includes a dielectric layer over a substrate, a surface modification layer, and a conductive feature. The dielectric layer has a sidewall. The surface modification layer is along the sidewall, and the surface modification layer includes phosphorous and carbon. The conductive feature is along the surface modification layer.

Abstract: According to one embodiment, the stacked body includes a plurality of stacked units and a first intermediate layer. Each of the stacked units includes a plurality of electrode layers and a plurality of insulating layers. Each of the insulating layers is provided between the electrode layers. The first intermediate layer is provided between the stacked units. The first intermediate layer is made of a material different from the electrode layers and the insulating layers. The plurality of columnar portions includes a channel body extending in a stacking direction of the stacked body to pierce the stacked body, and a charge storage film provided between the channel body and the electrode layers.

Abstract: A method of manufacturing a patterned aluminum nitride layer includes growing an amorphous patterned layer on a seed layer, which promotes growth of a first type aluminum nitride layer that has a disordered crystallographic structure. The seed layer promotes growth of a second type aluminum nitride layer with a vertically oriented columnar crystal structure. The method also includes depositing an aluminum nitride layer over the amorphous patterned layer and the seed layer to form the first type aluminum nitride layer with the disordered crystallographic structure over the amorphous patterned layer and the second type aluminum nitride layer with the vertically oriented columnar crystal structure over the seed layer. The method also includes depositing a masking layer over the second type aluminum nitride layer and etching away the first type aluminum nitride layer.

Abstract: The invention relates to a method for creating a detachment zone (2) in a solid (1) in order to detach a solid portion (12), especially a solid layer (12), from the solid (1), said solid portion (12) that is to be detached being thinner than the solid from which the solid portion (12) has been removed.

Abstract: A manufacturing method of a light-emitting device including the following steps is provided. A test trace and a first signal trace are formed on a first substrate. A light-emitting element electrically connected to the test trace and the first signal trace is formed. A test procedure is performed on the light-emitting element via the test trace and the first signal trace. An encapsulation layer is formed on the first substrate to cover the light-emitting element. The test trace is removed, and then a driving unit electrically connected to light-emitting element is formed.

Abstract: The present invention relates to a system and a method of removing a foreign material by using an electric field adsorbing scheme, which are capable of easily adsorbing and removing a foreign material on a surface of a film by using an electric field adsorbing scheme through a micro-current (several micro ampere) voltage driving method, not a surface treatment method, such as plasma discharge processing, corona discharge processing, and air blowing processing, which causes damage to the surface of the film, in a processing process for removing the foreign material on the surface of the film, and particularly, which exclude high pressure discharge processing and the like, thereby decreasing an incurrence rate of a safety accident of an operator and preventing a surface of a film from being scratched.

Abstract: In a described example, a method includes: forming stress induced dislocations along scribe lanes between semiconductor dies on a semiconductor wafer using a laser; mounting a first side of the semiconductor wafer on the first side of a first dicing tape; removing a backgrinding tape from the semiconductor wafer; attaching a second dicing tape to a second side of the semiconductor wafer opposite the first side, the second dicing tape adhering to portions of the first dicing tape that are spaced from the semiconductor wafer, forming a dual taped wafer dicing assembly; separating the semiconductor dies by stretching the first dicing tape and stretching the second dicing tape; removing the second dicing tape from the semiconductor dies; and removing the semiconductor dies from the first dicing tape.

Abstract: A device transferring method for transferring a plurality of devices to a mounting substrate provided with a plurality of electrodes includes: a step of adhering an expandable tape to the plurality of devices formed on a front surface side of a substrate through a buffer layer; a step of applying a laser beam to the buffer layer from a back surface side of the substrate, to break the buffer layer; a step of moving the tape in a direction for spacing away from the substrate to separate the substrate and the plurality of devices from each other, thereby transferring the plurality of devices to the tape; a step of expanding the tape in such a manner that the layout of the plurality of devices corresponds to the layout of the plurality of electrodes; and a step of bonding the plurality of devices to the plurality of electrodes at once.