Patents Examined by Angela Brooks
  • Patent number: 8072720
    Abstract: An electrostatic protection circuit that affords protection without effecting transfer of an ordinary output signal includes an output terminal; a ground terminal; a first N-channel transistor having its drain and source connected between the output terminal and the ground terminal GND; a first electrostatic protection element connecting the output terminal and the ground terminal; and a second electrostatic protection element connected the drain and gate of the first N-channel transistor. The second N-channel transistor is connected to the gate of the first N-channel transistor.
    Type: Grant
    Filed: April 9, 2008
    Date of Patent: December 6, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Mototsugu Okushima
  • Patent number: 8072722
    Abstract: Electrostatic discharge (ESD) can affect the operation of and even damage an unprotected integrated circuit. Conventional ESD protection circuits may not be able to protect the integrated circuit if the voltage at the output of the integrated circuit swings with large amplitude. In some embodiments, an ESD protection circuit comprising switching circuitry that provides a low AC impedance path to ground can prevent improper triggering of the ESD protection circuit during normal operation of the integrated circuit, while ensuring that the ESD protection circuit device reliability is not compromised.
    Type: Grant
    Filed: June 16, 2009
    Date of Patent: December 6, 2011
    Assignee: Qualcomm Atheros, Inc.
    Inventor: Justin Hwang
  • Patent number: 8072727
    Abstract: A fault protection device tests a distribution for persistence of a fault using a selectable first fault testing procedure and a second fault testing procedure.
    Type: Grant
    Filed: July 4, 2010
    Date of Patent: December 6, 2011
    Assignee: S&C Electric Company
    Inventors: Raymond P. O'Leary, Christopher McCarthy
  • Patent number: 8064178
    Abstract: Systems and methods are provided for balancing current through a first conductor and a second conductor. A method comprises determining if a first current through the first conductor is greater than a second current through the second conductor by more than a threshold value. The first current and the second current are received from a ground fault current interrupt device. The method further comprises increasing the second current in response to determining that the first current is greater than the second current by more than the threshold value.
    Type: Grant
    Filed: June 26, 2008
    Date of Patent: November 22, 2011
    Assignee: GM Global Technology Operations LLC
    Inventor: Craig R. Markyvech
  • Patent number: 8054601
    Abstract: A microprocessor commonly receives at an A/D port the potentials of the power supplies output from a plurality of types of power supplies (a power supply for HDMI, a power supply for LSI, a power supply for an audio driver IC, and a power supply for a tuner). The A/D port receives the potential of the voltage on an output line of the power supply for HDMI that is divided. If that the potential of the divided voltage is lower than a set potential is detected, the output line is interrupted to interrupt power supply voltage supplied to external equipment.
    Type: Grant
    Filed: June 11, 2008
    Date of Patent: November 8, 2011
    Assignee: Funai Electric Co., Ltd.
    Inventor: Kazuhiko Udagawa
  • Patent number: 8050003
    Abstract: The present invention discloses an electrostatic discharge protection circuit. The electrostatic discharge protection circuit of the present invention includes a transfer unit that transfers electrostaticity from at least one of a plurality of input/output pads to a boost bus line, a trigger unit that responds to the electrostaticity transferred via the boost bus line to detect a trigger voltage and apply it to a trigger bus line, and a plurality of clamp units that are connected between the input/output pads and an internal circuit. The clamp units are triggered by the trigger voltage of the trigger unit to discharge electrostaticity of the input/output pads to a first or second power supply voltage line, thereby safely protecting the internal circuit from electrostatic damage and lowering the operating voltage of the clamp unit with minimum costs without increasing an area of the electrostatic discharge protective circuit within a semiconductor integrated circuit.
    Type: Grant
    Filed: April 4, 2008
    Date of Patent: November 1, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventor: Kook Whee Kwak
  • Patent number: 8035948
    Abstract: This static eliminator is used for eliminating static electricity from an object by ionizing the air to be blown to a charged object, and has a case 12 body provided with an air blow duct 15 for blowing out an ionized air, and an electric discharge module 27 being mounted detachably on the case body 12. The electric discharge module 27 has an electric discharge needle substrate 31 having a plurality of electric discharge needles 38 arranged straightly, and a surface panel 32 detachably mounted on the case body, and the electric discharge module 27 is mounted on the case body 12 by mean of a mounting screw member 36 in the portion of the surface panel 12. By dismounting the electric discharge module 27 from the case body 12, the electric discharge needles can be replaced.
    Type: Grant
    Filed: April 11, 2007
    Date of Patent: October 11, 2011
    Assignee: Koganei Corporation
    Inventors: Kazuyoshi Onezawa, Yoshinari Fukada, Yosuke Enomoto
  • Patent number: 8031448
    Abstract: A system, apparatus and a method are described that provide a voltage clamp for a single-supply system. In particular, a negative voltage clamp prevents a negative over-voltage in a system having only a positive independent voltage source. For example, certain analog-to-digital converters and other circuits allow input signals below the negative supply, or ground in single-supply systems, either by direct sampling or using input attenuation resistors. The negative clamp allows the circuit to provide accurate negative over-voltage protection and the absence of this claim would result in over-voltage protection in positive voltage directions only.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: October 4, 2011
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Lawrence Skrenes, David Maes
  • Patent number: 8027135
    Abstract: A fault current limiter (FCL) includes a series of high permeability posts (1) for collectively define a core for the FCL. A DC coil (2), for the purposes of saturating a portion of the high permeability posts (1), surrounds the complete structure outside of an enclosure in the form of a vessel (3). The vessel (3) contains a dielectric insulation medium (4). AC coils (5), for transporting AC current, are wound on insulating formers (6) and electrically interconnected to each other in a manner such that the senses of the magnetic field produced by each AC coil (5) in the corresponding high permeability core are opposing. There are insulation barriers (7) between phases to improve dielectric withstand properties of the dielectric medium.
    Type: Grant
    Filed: April 3, 2009
    Date of Patent: September 27, 2011
    Assignee: Zenergy Power Pty Ltd.
    Inventor: Francis Anthony Darmann
  • Patent number: 8027142
    Abstract: Methods and apparatus are provided for driving an ignition exciter unit. An apparatus is provided for a driver circuit for use with an ignition exciter unit, the driver circuit having an input terminal and an output terminal. A first current-protected circuit is coupled to the input terminal and the output terminal, wherein the first current-protected circuit is current-limited. A second current-protected circuit coupled to the input terminal and the output terminal. The driver circuit further comprises a controller coupled to the first current-protected circuit and the second current-protected circuit. The controller is configured to activate the first current-protected circuit for a first time interval and activate the second current-protected circuit after the first time interval and prior to when the ignition exciter unit begins operating.
    Type: Grant
    Filed: June 3, 2008
    Date of Patent: September 27, 2011
    Assignee: Honeywell International Inc.
    Inventors: Larry L. Galey, Dale A. Trumbo, Steven A. Lei
  • Patent number: 8000070
    Abstract: The invention relates to a control circuit which serves for security-critical control of a consumer with an inductive load portion, to be connected to a direct voltage source, and a method for failure control. It is in this case assumed that the control circuit has a power driving assembly, a free-wheeling assembly and a reverse-connection protected assembly. In order to increase the probability of failure recognition, this control circuit is extended by a method for failure control. For this purpose the semiconductor switches of the assemblies, each formed by a MOSFET, are individually driven. The different switching statuses are checked by a diagnostic device which processes voltage values to be read out at outputs of the control circuit. In this way failure-free functionality and also possible causes of failure in the control circuit can be diagnosed.
    Type: Grant
    Filed: December 18, 2006
    Date of Patent: August 16, 2011
    Assignee: Lucas Automotive GmbH
    Inventors: Rudolf Mühlenbein, Andreas Nestler
  • Patent number: 8000077
    Abstract: A DC noise absorbing device for preventing surges and regulating voltages includes a surge inhibitor, a fuse wire, a plurality of diodes, a plurality of Zener diodes, a plurality of diode alternate current switches (DIACs), a plurality of capacitors, and a circuit for indicating light emission, all of which are disposed on or between two wires respectively of positive voltage and negative voltage. The surge inhibitor and the fuse wire are connected in series on the wire of positive voltage; the plurality of diodes, the plurality of Zener diodes, the plurality of DIACs, the plurality of capacitors, which are identically specified, and the circuit for indicating light emission are orderly connected in parallel between the wires of positive voltage and negative voltage so as to form a staircase arrangement of cut-in switching voltages.
    Type: Grant
    Filed: December 15, 2008
    Date of Patent: August 16, 2011
    Inventors: Jye-Chau Su, Jye-Yang Su
  • Patent number: 8000071
    Abstract: An apparatus and method for reducing the die area of a PWM controller include a protection circuit triggered by a fault index signal for counting, and the counting time is provided for a delay time required by fault verification. Therefore, fault detection circuits can be eliminated and the purpose of reducing the die area can be achieved.
    Type: Grant
    Filed: May 29, 2008
    Date of Patent: August 16, 2011
    Assignee: Richtek Technology Corp.
    Inventors: Pei-Lun Huang, Cheng-Hsuan Fan
  • Patent number: 7990674
    Abstract: A load drive apparatus is provided which comprises a switching element 3 connected in series to a DC power source Vcc and an electric load 4, a drive circuit 5 for generating control signals to turn switching element 3 on and off, a thermal detection element 6 for sensing a temperature of switching element 3, an overheat protective circuit 7 for generating an overheat detection signal when thermal detection element 6 senses the temperature of switching element 3 over a predetermined temperature level, and a disconnection detection circuit 11 provided with a current mirror circuit 12 connected between one and the other terminals of thermal detection element 6 for detecting a disconnection in wiring between thermal detection element 6 and overheat protective circuit 7.
    Type: Grant
    Filed: June 21, 2007
    Date of Patent: August 2, 2011
    Assignee: Sanken Electric Co., Ltd.
    Inventors: Yuji Kato, Keiichi Sekiguchi, Kiyokatsu Satoh
  • Patent number: 7974060
    Abstract: A disclosed overcurrent protection and output short-circuit protection circuit has a proportional output current generation unit and a first current voltage conversion unit provided in series between a first power supply terminal and an output terminal. Furthermore, the overcurrent protection and output short-circuit protection circuit has a control unit that operates based on a difference between a voltage generated at the first current voltage conversion unit and that generated at a second current voltage conversion unit provided between the first power supply terminal and a second power supply terminal. A current flowing to the second current voltage conversion unit is changed by one or more switching elements in a stepwise manner based on the output voltages of the output transistor when supplying the current, thereby changing the voltages generated at both ends of the second current voltage conversion unit.
    Type: Grant
    Filed: July 23, 2008
    Date of Patent: July 5, 2011
    Assignee: Ricoh Company, Ltd.
    Inventor: Koichi Morino
  • Patent number: 7969697
    Abstract: An electrostatic discharge protection device is disposed between true-complement input pins of a differential signal pair and a ground node. A common node couples the three diode stacks together. A first and a second diode stack each connect to one of the differential signal pair input pins. The third diode stack couples to the ground node. Each of the diode stacks is fabricated by a pair of high concentration p-type contact dopant regions within a low concentration n-well region. Each of the p-type contact dopant regions is configured to form back-to-back diodes connected in series with cathodes in common. In protecting common mode receivers, current from an ESD event is channeled to ground rather than to the complementary receiver node. The diode stacks are capable of withstanding a 15 kV incident and save up to 25% in area compared to a fully parallel configuration for differential signal pairs.
    Type: Grant
    Filed: April 22, 2008
    Date of Patent: June 28, 2011
    Assignee: Exar Corporation
    Inventors: Bahman Farzan, Hung Pham Le
  • Patent number: 7965475
    Abstract: An overheat protection circuit of a semiconductor apparatus has an output current detecting circuit for detecting an output current of a constant voltage circuit; a temperature detector for detecting a temperature of the apparatus; an output current control circuit for controlling the output current in accordance with output of the temperature detector; a bias current source for providing a bias current for the temperature detector; and a switch for controlling the bias current from the bias current source to the temperature detector. The output current control circuit interrupts the output current when the temperature detector detects a temperature that is higher than a predetermined temperature. The output current detecting circuit and the output current control circuit may be used to control the switch to prevent oscillation of the output current in the vicinity of the predetermined temperature.
    Type: Grant
    Filed: April 10, 2008
    Date of Patent: June 21, 2011
    Assignee: Ricoh Company, Ltd.
    Inventor: Kohichi Morino
  • Patent number: 7965490
    Abstract: In the method for assigning a delay time to an electronic delay detonator. The detonator includes a data register (24) into which a desired delay time value, supplied by a controller, is written. Subsequently, over a predetermined time period (t) the contents of the data register (24) is repetitively added to a counter register (26) in which the contents is accumulated. After a division of the counter register contents through the calibration time, the contents of the counter register (26) is subsequently counted down using the same oscillator (18) which has controlled the accumulation process. The invention allows the delay time value supplied by the controller to be exactly adhered with, using an oscillator (18) of low accuracy and without feedback from the detonator (12) to the controller.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: June 21, 2011
    Assignee: Orica Explosives Technology Pty Ltd
    Inventor: Dirk Hummel
  • Patent number: 7965486
    Abstract: An arc flash detection system includes a sensor for determining and responding to the presence of an arc flash condition in electrical equipment by detecting a pressure rise, rate of pressure rise and/or ultraviolet radiation characteristic of an arc flash, and generating a signal in response thereto; and processing means responsive to said signal for operating a protective system to de-energize the electrical equipment within a period of time of sufficiently short duration to prevent a pressure wave from the arc flash from causing unacceptable darn age to equipment or personnel.
    Type: Grant
    Filed: October 24, 2007
    Date of Patent: June 21, 2011
    Assignee: The Johns Hopkins University
    Inventor: H. Bruce Land, III
  • Patent number: 7957112
    Abstract: A protection circuit limits operating power supplied to an electrical device from an electrical power source below a predetermined power rating. The protection circuit comprises a switching device for adjusting electrical power supplied from the power source to the electrical device; a sensor sensing a parameter relating to the operating power; and a comparator comparing the parameter sensed by the sensor and, in response to identifying an undesirable operating condition, controlling the switching device to adjust electrical power supplied to the electrical device to below a predetermined power rating.
    Type: Grant
    Filed: June 18, 2008
    Date of Patent: June 7, 2011
    Inventors: Memie Mei Mei Wong, Sam Yun Sum Wong