Patents Examined by Angela Brooks
  • Patent number: 8537513
    Abstract: For a negative-powered IC, an ESD protection circuit includes a negative voltage clamping circuit configured to provide a path for discharging ESD transient currents associated with different negative power supplies of the IC.
    Type: Grant
    Filed: December 26, 2010
    Date of Patent: September 17, 2013
    Assignee: Global Unichip Corp.
    Inventors: Wen-Tai Wang, Ming-Jing Ho
  • Patent number: 8520355
    Abstract: Protection of a motor controller from a transient voltage is described. A method for protecting a motor controller from a transient voltage includes providing an electromagnetic interference (EMI) filter having at least a first input terminal, a second input terminal, a first output terminal, and a second output terminal, the EMI filter configured to suppress electromagnetic interference. The method also includes coupling a first voltage clamping device and a second voltage clamping device in series between the first output terminal and the second output terminal. The method also includes coupling a spark gap device to a ground conductor and to a shared node between the first voltage clamping device and the second voltage clamping device.
    Type: Grant
    Filed: July 27, 2010
    Date of Patent: August 27, 2013
    Assignee: Regal Beloit America, Inc.
    Inventors: Kamron Wright, Philip W. Johnson, Donn Steffen
  • Patent number: 8502416
    Abstract: A circuit with series-connected solar modules separated into a first and second substring, wherein each substring includes a first and a second terminal, and a solar inverter configured to supply electrical energy from the solar modules to an AC power grid. The circuit includes a first switch coupled to the first terminal of the first substring to a first power cable of the inverter, and a second switch coupled to the second terminal of the first substring to a first terminal of the second substring at a center point, thereby coupling the first and second substrings to form at least one string. The circuit further includes a third switch couple to second terminal of the second substring, and a shared actuator to open the first switch, second switch, and third switch if a current between the center point and a circuit ground exceeds a threshold value.
    Type: Grant
    Filed: August 6, 2010
    Date of Patent: August 6, 2013
    Assignee: SMA Solar Technology AG
    Inventor: Andreas Falk
  • Patent number: 8498090
    Abstract: A power supply for a voltage or current-releasing switching device having at least one coil for one of a voltage and current release includes a device which activates a switch means in a pulse-width modulated manner, the device configured for setting the current flowing in the coil, wherein inductance of the coil functions as an impedor of a clocked power supply which, via a rectifier diode and a storage capacitor, provides a first supply voltage that is predefinable via a comparison value. A voltage regulation device provides at least one second supply voltage. A measurement-resistor-free regulation device is provided for setting the current through the coil.
    Type: Grant
    Filed: August 21, 2008
    Date of Patent: July 30, 2013
    Assignee: Eaton Industries GmbH
    Inventor: Wolfgang Meid
  • Patent number: 8493700
    Abstract: A high-voltage NMOS transistor for ESD protection is coupled between a high-voltage I/O pad and a low-voltage terminal, and has a parasitic component between its source and drain. A trigger has an input coupled to the high-voltage I/O pad and an output coupled to the parasitic component. When the voltage on the high-voltage I/O pad raises above a threshold value, the trigger applies a voltage to trigger the parasitic component, so as to release an ESD current from the high-voltage I/O pad to the low-voltage terminal through the high-voltage NMOS transistor.
    Type: Grant
    Filed: November 1, 2011
    Date of Patent: July 23, 2013
    Assignee: Elan Microelectronics Corporation
    Inventors: Wu-Tsung Hsihe, Ming-Chun Chou, Ming-Dou Ker
  • Patent number: 8488283
    Abstract: The load drive device of the present invention comprises a load drive unit for switching on/off output current that flows to an inductive load; and an overcurrent protection circuit for detecting whether the output current is in an overcurrent state, wherein the load drive unit has an output transistor connected to one end of the inductive load; and a pre-driver for generating a control signal of the output transistor in accordance with an input signal, and the pre-driver has a first drive unit for switching on/off the output transistor during normal operation; and a second drive unit for switching off the output transistor more slowly than the first drive unit during overcurrent protection operation.
    Type: Grant
    Filed: September 2, 2010
    Date of Patent: July 16, 2013
    Assignee: Rohm Co., Ltd.
    Inventors: Motohiro Ando, Akio Sasabe
  • Patent number: 8488285
    Abstract: Active current surge limiters and methods of use are disclosed. One exemplary system, among others, comprises a current limiter, including an interface configured to be connected between a power supply and a load; a disturbance sensor, configured to monitor the power supply for a disturbance during operation of the load; and an activator, configured to receive a control signal from the disturbance sensor and to activate the current limiter based on the control signal.
    Type: Grant
    Filed: September 12, 2011
    Date of Patent: July 16, 2013
    Assignee: Georgia Tech Research Corporation
    Inventor: Deepakraj Malhar Divan
  • Patent number: 8488291
    Abstract: A ZnO surge arrester for high-temperature operation is characterized in that a grain boundary layer between ZnO grains thereof contains a BaTiO3-based positive temperature coefficient thermistor material, which takes 10-85 mol % in the overall grain boundary layer, and when operating temperature raises, the positive temperature coefficient thermistor material in the grain boundary layer has its resistance sharply increasing with the raising temperature, so as to compensate or partially compensate decrease in resistance of components in the grain boundary layer caused by the raising temperature, thereby making the resistance of the grain boundary layer in the ZnO surge arrester more independent of temperature. The ZnO surge arrester thus is suitable for operation where a maximum operating temperature is higher than 125° C., or even higher than 150° C.
    Type: Grant
    Filed: February 9, 2011
    Date of Patent: July 16, 2013
    Assignee: SFI Electronics Technology Inc.
    Inventors: Ching-Hohn Lien, Jie-An Zhu, Zhi-Xian Xu, Xing-Xiang Huang, Ting-Yi Fang
  • Patent number: 8487788
    Abstract: In a method for determining actuation of a first capacitive button having a first set of at least three sensor electrode elements associated with at least three distinct sensor electrodes, and wherein a sensor electrode element of the first set of sensor electrode elements and a sensor electrode element of a second set of at least three sensor electrode elements of a second capacitive button share at least one sensor electrode in common, indicia is received from the at least three distinct sensor electrodes comprising the first capacitive button. At least three electrode values are generated from the indicia. The at least three electrode values are utilized to determine actuation of the capacitive button.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: July 16, 2013
    Assignee: Synaptics Incorporated
    Inventors: Joseph Kurth Reynolds, Tracy Scott Dattalo, Raymond A Trent, Jr., John M Feland, III
  • Patent number: 8462479
    Abstract: A surge protection device with an internal circuitry that protects a premise device from a surge input that arises from a transient event, e.g., a lightning strike. The internal circuitry can comprise a surge path that includes windings, e.g., inductors, and in one embodiment the surge path comprises a first winding and a second winding that is coupled in series to the first winding. The internal circuitry can also comprise a blocking element that is positioned relative to the surge path so that the blocking element receives the surge input before the premise device, wherein the blocking element can be selected so as to isolate the premise device from the surge input.
    Type: Grant
    Filed: September 25, 2009
    Date of Patent: June 11, 2013
    Assignee: PPC Broadband, Inc.
    Inventor: Erdogan Alkan
  • Patent number: 8451574
    Abstract: The present invention is directed to a method and a system for fault detection analysis in a power device which is operatively associated with a differential protection unit. The power device has one input side and one output side through which an input current and an output current flows into and out from it, respectively. Signals representative of the input and output currents are processed in order to verify if an occurring fault is external to the power device. Under a condition of an external fault, the differential protection unit is disabled for a determined interval of time.
    Type: Grant
    Filed: August 29, 2006
    Date of Patent: May 28, 2013
    Assignee: ABB Technology AG
    Inventors: Ratan Das, Sethuraman Ganesan, John M. Peterson
  • Patent number: 8446151
    Abstract: The present invention is directed to an electrical wiring device that includes at least one user accessible input mechanism and a test assembly configured to initiate a self-test in response to stimulus signal. The self test determines whether a sensor, a fault detection circuit or a circuit interrupter assembly are in an operational mode or are in a failure mode, the reset stimulus being provided in the operational mode and a reset lockout stimulus being provided in the failure mode. The device also including a reset lockout mechanism coupled to the circuit interrupter assembly and the test assembly. The reset lockout mechanism is configured to disable the reset stimulus in response to the reset lockout stimulus if any one of the at least one sensor, at least one fault detection circuit, or circuit interrupter assembly is determined to be in the failure mode after a predetermined time elapses.
    Type: Grant
    Filed: December 5, 2011
    Date of Patent: May 21, 2013
    Assignee: Pass & Seymour, Inc.
    Inventors: Dejan Radosavljevic, Thomas N. Packard, Bruce F. Macbeth, James P. Romano
  • Patent number: 8432650
    Abstract: A control system comprises a solid-state switch, a mechanical current interrupting device, and a control module. The solid-state switch is connected in series with a power source and an intake air heater. The mechanical current interrupting device is connected in series with the power source and the solid-state switch. The control module selectively closes the solid-state switch to provide power to the intake air heater. The control module also causes the mechanical current interrupting device to mechanically interrupt current flow to the intake air heater when a voltage of the intake air heater is outside of a desired range.
    Type: Grant
    Filed: November 5, 2008
    Date of Patent: April 30, 2013
    Assignee: Phillips & Temro Industries Inc.
    Inventor: Ronald N. Seger
  • Patent number: 8427800
    Abstract: A smart link in a power delivery system includes an insulator, which electrically isolates a power line, and a switchable conductance placed in parallel with the insulator. The switchable conductance includes switchgear for sourcing, sinking, and/or dispatching real and/or reactive power on the power line to dynamically in response to dynamic loading, transient voltages and/or currents, and phase conditions or other conditions on the power line.
    Type: Grant
    Filed: October 9, 2009
    Date of Patent: April 23, 2013
    Assignee: The Invention Science Fund I LLC
    Inventors: Roderick A. Hyde, William Gates, Jordin T. Kare, Nathan P. Myhrvold, Clarence T. Tegreene, David B. Tuckerman, Lowell L. Wood, Jr.
  • Patent number: 8427795
    Abstract: The pad interface circuit includes a first stack MOS transistor having a first terminal connected to a pad and a bulk connected to a first supply voltage; a second stack MOS transistor having a first terminal connected to a second terminal of the first stack MOS transistor and a second terminal, a gate terminal, and a bulk that are connected to the first supply voltage; and a voltage level sensing circuit generating a feedback voltage by using a pad voltage applied from the pad. In addition, the feedback voltage is applied to a gate terminal of the first stack MOS transistor.
    Type: Grant
    Filed: January 21, 2010
    Date of Patent: April 23, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chan-hee Jeon, Han-gu Kim, Min-sun Hong, Tae-hoon Ha, Doo-hyung Kim, Jung-soon Lee
  • Patent number: 8422194
    Abstract: A Susceptance-Mode Inductor with infinite order resonance cavity which includes an inductor section is formed by a physical inductor coil wound about a permanent magnetic materials, with both ends of the coil connecting to a electric damper and a capacitor of the infinite order resonance cavity; thereby that power is coupled into the incoming end of the infinite order resonance cavity through a radio frequency (RF) radiation electric field and the outgoing end thereof is electrically connected to a set of resonance power storage section, or alternatively the incoming end is connected to electric charge and the outgoing end is connected to the load; accordingly, the resonance of the infinite order resonance cavity, thus allowing to convert the current or electron flow at the magnetic field end into charge output by means of Lorenz force.
    Type: Grant
    Filed: December 6, 2010
    Date of Patent: April 16, 2013
    Inventor: Fu-Tzu Hsu
  • Patent number: 8416543
    Abstract: Apparatuses and methods for electronic circuit protection are disclosed. In one embodiment, an apparatus comprises an internal circuit electrically connected between a first node and a second node, and a protection circuit electrically connected between the first node and the second node and configured to protect the internal circuit from transient electrical events. The protection circuit comprises a bipolar transistor having an emitter connected to the first node, a base connected to a third node, and a collector connected to a fourth node. The protection circuit further comprises a first diode electrically connected between the third node and the fourth node, and a second diode electrically connected between the second node and the fourth node. The first diode is an avalanche breakdown diode having an avalanche breakdown voltage lower than or about equal to a breakdown voltage associated with the base and the collector of the bipolar transistor.
    Type: Grant
    Filed: July 8, 2010
    Date of Patent: April 9, 2013
    Assignee: Analog Devices, Inc.
    Inventor: Javier A Salcedo
  • Patent number: 8416549
    Abstract: A bi-directional over-voltage protection circuit and a method for blocking current flow therein. The bi-directional over-voltage protection circuit comprises a regulator coupled to a lockout circuit, wherein the regulator and the lockout circuit are coupled for receiving an input signal and are coupled to a charging control circuit. A reverse path control circuit has an input coupled for receiving a control signal and an output coupled to the charging control circuit. A multi-transistor switching circuit is coupled to the forward control circuit. Preferably, the gate of each n-channel MOSFET is coupled to the charging control circuit, the drains are coupled together, and the source of one of the n-channel MOSFETS is coupled to an input and the source of the other n-channel MOSFET is coupled to an output of the bi-directional over-voltage protection circuit.
    Type: Grant
    Filed: March 13, 2008
    Date of Patent: April 9, 2013
    Assignee: Semiconductor Components Industries, LLC
    Inventor: Paolo Migliavacca
  • Patent number: 8411407
    Abstract: Reversible flow may be provided in certain EHD device configurations that selectively energize corona discharge electrodes arranged to motivate flows in generally opposing directions. In some embodiments, a first set of one or more corona discharge electrodes is positioned, relative to a first array of collector electrode surfaces, to when energized, motivate flow in a first direction, while second set of one or more corona discharge electrodes is positioned, relative to a second array of collector electrode surfaces, to when energized, motivate flow in a second direction that opposes the first. In some embodiments, the first and second arrays of collector electrode surfaces are opposing surfaces of individual collector electrodes. In some embodiments, the first and second arrays of collector electrode surfaces are opposing surfaces of respective collector electrodes.
    Type: Grant
    Filed: November 10, 2009
    Date of Patent: April 2, 2013
    Assignee: Tessera, Inc.
    Inventors: Nels Jewell-Larsen, Kenneth A. Honer, Matt Schwiebert, Hongyu Ran, Piyush Savalia, Yan Zhang
  • Patent number: 8411401
    Abstract: A method for current conditioning, comprising transporting a primary current (1) through a primary coil (2), coupling a secondary coil (3) to the primary coil (2) via a common magnetic flux, wherein the secondary coil (3) comprises a superconductor capable of quenching, with the quenching causing a transition of the superconductor from a low resistance superconducting state to a high resistance quenched state, and in the low resistance superconducting state of the secondary coil (3), guiding a major fraction (8) of the common magnetic flux of the primary coil (2) and the secondary coil (3) within a ferromagnetic medium (5a), is characterized by upon quenching, switching the common magnetic flux such that a major fraction (17) of the common magnetic flux is guided outside the ferromagnetic medium (5a) in the high resistance quenched state of the superconductor. An economic and efficient method for current conditioning is thereby provided which reduces harmonic distortions.
    Type: Grant
    Filed: September 15, 2010
    Date of Patent: April 2, 2013
    Assignee: Bruker HTS GmbH
    Inventors: Alexander Usoskin, Hans-Udo Klein