Patents Examined by Anh Q. Tran
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Patent number: 11856672Abstract: A lighting apparatus includes a LED module, a light source plate, a heat sink, an antenna, a driver and a light housing. The light source plate is used for holding the LED module. The heat sink has a bottom plate and a lateral wall. The light source plate is placed on the bottom plate. The antenna is disposed on the lateral wall. The driver is used for generating a driving current to the LED module. The driver has a wireless circuit. The wireless circuit is electrically connected to the antenna for transmitting a wireless signal. The light housing is used for holding the heat sink so that the LED module emits light toward a light opening of the light housing.Type: GrantFiled: December 7, 2022Date of Patent: December 26, 2023Assignee: XIAMEN LEEDARSON LIGHTING CO., LTDInventors: Fanglei Zhao, Youqin Lin, Zhixian Wu, Renhua Zou, Yun Wang
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Patent number: 11855625Abstract: A semiconductor apparatus may include: a command generation circuit configured to generate a first internal command signal and a second internal command signal, which are sequentially activated on the basis of a data command signal for a data driving operation; an impedance setting circuit enabled on the basis of the first internal command signal, and configured to set impedance into which a reference resistance is reflected; and a data driving circuit enabled on the basis of the second internal command signal, and configured to perform the data driving operation on the basis of the set impedance.Type: GrantFiled: May 16, 2022Date of Patent: December 26, 2023Assignee: SK hynix Inc.Inventor: Jae Hoon Jung
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Patent number: 11846396Abstract: A linear light-emitting diode (LED) lamp comprising a normally-operated portion and an emergency-operated portion is used to replace a luminaire operated only in a normal mode with alternate-current (AC) mains. The normally-operated portion comprises a fly-back converter whereas the emergency-operated portion comprises a rechargeable battery, a bidirectional circuit, a boost converter, a self-diagnostic circuit, and a control circuit. The linear LED lamp can auto-switch from the normal mode to an emergency mode according to availability of the AC mains and whether a rechargeable battery test is initiated. The bidirectional circuit is configured to convey a forward electric current and a reverse electric current to and from the rechargeable battery, respectively. The self-diagnostic circuit is configured to provide multiple sequences and to auto-evaluate battery performance according to the multiple sequences.Type: GrantFiled: April 11, 2022Date of Patent: December 19, 2023Assignee: Aleddra Inc.Inventor: Chungho Hsia
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Patent number: 11849517Abstract: In some examples, this disclosure describes a light-emitting diode (LED) driver circuit configured to: control a set of LED channels; receive, from each LED channel of the set of LED channels, channel status information that indicates whether the respective LED channel is activated or deactivated; and determine, based on the channel status information corresponding to each LED channel of the set of LED channels, a channel status of the respective LED channel. Additionally, the LED driver circuit is configured to output, to a master computing device, the channel status corresponding to each LED channel of the set of LED channels; and output, to the master computing device, channel mapping information, wherein the master computing device is configured to determine, based on the channel status information and the channel mapping information, whether one or more error conditions are present in the set of LED channels.Type: GrantFiled: November 14, 2022Date of Patent: December 19, 2023Assignee: Infineon Technologies AGInventors: Franco Mignoli, Adolfo De Cicco, Damiano Sartori, Luca Mengani, Christopher Gabriel
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Patent number: 11848670Abstract: An apparatus includes a data processing array having a plurality of array tiles. Each array tile can include a random-access memory (RAM) having a local memory interface accessible by circuitry within the array tile and an adjacent memory interface accessible by circuitry disposed within an adjacent array tile. Each adjacent memory interface of each array tile can include isolation logic that is programmable to allow the circuitry disposed within the adjacent array tile to access the RAM or prevent the circuitry disposed within the adjacent array tile from accessing the RAM. The data processing array can be subdivided into a plurality of partitions wherein the isolation logic of the adjacent memory interfaces is programmed to prevent array tiles from accessing RAMs across a boundary between the plurality of partitions.Type: GrantFiled: April 15, 2022Date of Patent: December 19, 2023Assignee: Xilinx, Inc.Inventors: Juan J. Noguera Serra, Tim Tuan, Javier Cabezas Rodriguez, David Clarke, Peter McColgan, Zachary Blaise Dickman, Saurabh Mathur, Amarnath Kasibhatla, Francisco Barat Quesada
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Patent number: 11847084Abstract: CMOS output stages, electrostatic discharge (ESD) protection circuits and input bus-keeper functions are provided that block dc and ac leakage paths within inactive powered-down integrated circuits used in redundant high-reliability system configurations employing cold-sparing to provide backup circuitry. These circuits and methods avoid both undesirable power consumption in a cold-spared backup unit and loading of connected active units when powered down, without compromising performance or functionality of the backup unit when in its active powered state. Inputs and outputs using an analog majority voting principle to implement in-circuit redundancy for on-chip fault tolerance are also provided, incorporating the low-leakage principles of the invention for low power dissipation when powered down. Such on-chip redundancy can harden an IC against various faults, such as single-event effects in high-radiation environments, while maintaining the other advantages in a cold-sparing system.Type: GrantFiled: June 2, 2023Date of Patent: December 19, 2023Assignee: Apogee Semiconductor, Inc.Inventors: Mark Hamlyn, David A. Grant
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Patent number: 11841943Abstract: Various implementations described herein refer to a method for tracking abnormal incidents while monitoring activity of logic circuitry. The method may include detecting a tamper event related to the abnormal incidents and storing an attack signature related to the tamper event. The attack signature may be stored in non-volatile memory (NVM), such as, e.g., correlated electron random access memory (CeRAM).Type: GrantFiled: September 26, 2019Date of Patent: December 12, 2023Assignee: Arm LimitedInventors: Joshua Randall, Joel Thornton Irby, Carl Wayne Vineyard, Mudit Bhargava
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Patent number: 11843372Abstract: Described are integrated-circuit die with differential receivers, the inputs of which are coupled to external signal pads. Termination legs coupled to the signal pads support multiple termination topologies. These termination legs can support adjustable impedances, capacitances, or both, which may be controlled using an integrated memory.Type: GrantFiled: April 20, 2021Date of Patent: December 12, 2023Assignee: Rambus Inc.Inventor: Huy Nguyen
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Patent number: 11841113Abstract: An LED lamp and it power source module are provided. The LED lamp includes an LED module and a power source module. The power source module includes two rectifying circuits, a filtering capacitor, a plurality of fuses, two filament-simulating circuits, and a discharge device. Each of the filament-simulating circuits is configured to allow a current to flow from one pin to the other pin via the corresponding first and second filament-simulating circuits during a pre-heat process executed by a ballast.Type: GrantFiled: December 3, 2022Date of Patent: December 12, 2023Assignee: Jiaxing Super Lighting Electric Appliance Co., LtdInventors: Aiming Xiong, Qifeng Ye
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Patent number: 11837779Abstract: An electronic device, according to one embodiment of the present invention, comprises: an antenna; and a photo conductive device electrically connected to the antenna, wherein the photo conductive device may comprise: a first layer including a plurality of conductive elements disposed to be spaced apart at a specified interval; a second layer disposed above the first layer and including at least one light source capable of outputting light; and a third layer disposed between the first layer and the second layer and having a photo conductive member of which at least a portion is changed, by means of the light, to be conductive in order to electrically connect at least a portion of the plurality of conductive elements. Various other embodiments may be included.Type: GrantFiled: October 25, 2019Date of Patent: December 5, 2023Inventors: Dongil Yang, Jongin Lee, Hyoseok Na
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Patent number: 11831341Abstract: A compressor includes a logic circuit having transistors of a first channel type to receive a plurality of bit signals, and transistors of a second channel type, different from the first channel type, to receive the plurality of bit signals. The transistors of the first channel type are configured to generate an XOR logic output based on the plurality of bit signals, and the transistors of the second channel type are configured to generate, substantially simultaneous with the generation of the XOR logic output, an XNOR logic output based on the plurality of bit signals. The compressor includes NAND gates to receive multiplicand and multiplier bit signals.Type: GrantFiled: August 24, 2020Date of Patent: November 28, 2023Assignee: Arm LimitedInventors: Shardendu Shekhar, Andy Wangkun Chen, Yew Keong Chong
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Patent number: 11831309Abstract: A circuit includes a first transistor having first and second current terminals and a first control input, and a second transistor having third and fourth current terminals and a second control input. The third current terminal is coupled to the second current terminal at an intermediate node. In some cases, a third transistor is connected to the intermediate node to bias the intermediate rather than letting the intermediate node float. In other cases, a capacitor is connected to the intermediate node to reduce a negative voltage that might otherwise be present on the intermediate node.Type: GrantFiled: April 9, 2019Date of Patent: November 28, 2023Assignee: Texas Instruments IncorporatedInventors: Erkan Bilhan, Francisco A. Cano
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Patent number: 11825573Abstract: In an auto vibrancy mode, a vibrancy value for a lighting load may be automatically determined based on a selected color setting for the lighting load. The automatically determined vibrancy value may also be configured to emit light from the lighting load at or above a target CRI value for the selected color setting. The selected color setting may be a CCT value on the black-body curve or an x-y chromaticity value. If the selected color setting is CCT value on the black-body curve, the automatically determined vibrancy value may be a pre-defined vibrancy value that is configured to emit light from the lighting load at or above the target CRI value for the selected CCT value. If the selected color setting is an x-y chromaticity value, the automatically determined vibrancy value may be based on the distance between the selected x-y chromaticity value and the black-body curve.Type: GrantFiled: May 16, 2022Date of Patent: November 21, 2023Assignee: Lutron Technology Company LLCInventors: Prashant Chaturvedi, Bryan R. Barnes, Christopher M. Green
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Patent number: 11817858Abstract: A static ternary gate is disclosed. The static ternary gate includes a drain-ground path configured to output a drain voltage through a first transistor when a first pull-up circuit is turned on, and output a ground voltage through a second transistor when a first pull-down circuit is turned on, a half-drain path configured to output a half-drain voltage through the first transistor and the second transistor when both a second pull-up circuit and a second pull-down circuit are turned on. The first transistor is configured to connect a node between the first pull-up circuit and the second pull-down circuit to an output terminal, and the second transistor is configured to connect a node between the second pull-up circuit and the first pull-down circuit to the output terminal.Type: GrantFiled: February 12, 2021Date of Patent: November 14, 2023Assignee: POSTECH Research and Business Development FoundationInventors: Seokhyeong Kang, Sunghye Park, SungYun Lee, Sunmean Kim
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Patent number: 11815789Abstract: Introduced here are light sources for flash photography configured to produce high-fidelity white light that is tunable over a broader range of correlated color temperatures (CCTs) than conventional flash technologies. The light source can include multiple independently controllable color channels representing illuminants (e.g., light-emitting diodes) of different colors with varying degrees of saturation. Operating collectively, the multiple color channels can produce a high spectral quality white light corresponding to different CCTs (e.g., “warm” white light having a red hue, “cool” white light having a blue hue). Operating independently, these same color channels can be pre-flashed in a variety of prescribed sequences to probe the spectral characteristics of a scene, thereby allowing for an enhanced, spectrally matched white flash as well as collecting per-pixel reflectivity data that can be later used in during post processing of the captured image.Type: GrantFiled: March 28, 2022Date of Patent: November 14, 2023Assignee: RINGO AI, INC.Inventors: Matthew D. Weaver, Jay Hurley, Jeffrey Saake
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Patent number: 11811394Abstract: A programmable circuit includes a superconducting component arranged in a multi-dimensional array of alternating narrow and wide portions. The programmable circuit further includes a plurality of heat sources, each heat source configured to selectively provide heat to a respective narrow portion sufficient to transition the respective narrow portion from a superconducting state to a non-superconducting state. The programmable circuit further includes a plurality of electrical terminals, each electrical terminal coupled to a respective wide portion of the multi-dimensional array.Type: GrantFiled: June 13, 2022Date of Patent: November 7, 2023Assignee: PSIQUANTUM CORP.Inventors: Faraz Najafi, Qiaodan Jin Stone
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Patent number: 11809064Abstract: The invention describes a method of controlling a segmented flash (10) having a plurality of flash segments (S1, S2, . . . , Sn), which method comprises the steps of measuring the forward voltages (Vf1, Vf2, . . . , Vfn) of the flash segments (S1, S2, . . . , Sn); and adjusting the brightness of the flash segments (S1, S2, . . . , Sn) on the basis of the measured forward voltages (Vf1, Vf2, . . . , Vfn) to achieve a desired illumination profile (P) for the segmented flash (10). The invention further describes a segmented flash system (1) comprising a segmented flash (10) with a plurality of flash segments (S1, S2, . . . , Sn), wherein each flash segment (S1, S2, . . . , Sn) is arranged to illuminate a portion (20) of a scene (2); and a flash driver (11) adapted to perform the steps of the inventive method to adjust the brightness of the flash segments (S1, S2, . . . , Sn).Type: GrantFiled: August 30, 2022Date of Patent: November 7, 2023Assignee: Lumileds LLCInventor: Henk Derks
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Patent number: 11812531Abstract: A digital-to-analog converter (DAC) for generating an output voltage according to an input code includes a first-type and a second-type sub-DAC's connected in series. The first-type sub-DAC includes a first resistor string and plural first switches, and receives a reference current to determine a first voltage drop. The first switches are controlled by a first portion of the input code to determine a voltage division of the first voltage drop. The second-type sub-DAC includes a second resistor string and plural second switches. The second switches are controlled by a second portion of the input code to determine a portion of the second resistor string to receive the reference current, wherein the portion of the second resistor string and the reference current determines a second voltage drop. The output voltage includes a sum of the second voltage drop and the voltage division of the first voltage drop.Type: GrantFiled: October 26, 2022Date of Patent: November 7, 2023Assignee: RICHTEK TECHNOLOGY CORPORATIONInventor: Je-Kwang Cho
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Patent number: 11803105Abstract: Introduced here are multi-channel light sources able to produce a broad range of electromagnetic radiation. A multi-channel light source (also referred to as a “multi-channel emitter”) can be designed to produce visible light and/or non-visible light. For example, some embodiments of the multi-channel light source include illuminant(s) capable of emitting electromagnetic radiation within the visible range and illuminant(s) capable of emitting electromagnetic radiation in a non-visible range, such as the ultraviolet range or infrared range. By capturing images in conjunction with the visible and non-visible light, additional information on the ambient scene can be gleaned which may be useful, for example, during post-processing.Type: GrantFiled: February 28, 2022Date of Patent: October 31, 2023Assignee: RINGO AI, INC.Inventors: Matthew D. Weaver, Jay Hurley, Jeffrey Saake
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Patent number: 11804840Abstract: An integrated circuit with self-reference impedance includes an input/output pin provided for connection to an external impedance, a local impedance, a reference power circuit, a switching circuit, and a control circuit. The switching circuit is configured to conduct a connection between the input/output pin and the reference power circuit in a first state and to conduct a connection between the local impedance and the reference power circuit in a second state. The control circuit is configured to detect whether the external impedance is connected to the input/output pin or not and to generate a detection signal. The control circuit controls the switching circuit into the first state or the second state according to the detection signal. In the first state, the reference power circuit generates a reference signal according to the external impedance. In the second state, the reference power circuit generates the reference signal according to the local impedance.Type: GrantFiled: February 28, 2022Date of Patent: October 31, 2023Assignee: REALTEK SEMICONDUCTOR CORP.Inventors: Qing-Zhe Qui, Can Quan, Su-Hang Chen