Abstract: A method for protecting a doped silicate glass layer includes: forming a doped silicate glass layer on a substrate in a reaction chamber by plasma-enhanced atomic layer deposition (PEALD) using a first RF power; and forming a non-doped silicate glass layer having a thickness of less than 4 nm on the doped silicate glass layer in the reaction chamber, without breaking vacuum, by plasma-enhanced atomic layer deposition (PEALD) using a second RF power, wherein the second RF power is at least twice the first RF power.

Abstract: In an inductively coupled plasma torch unit, two coils, a first ceramic block, and a second ceramic block are arranged, and an annular chamber is provided. Plasma generated in the chamber is ejected toward a substrate through an opening in the chamber. The chamber and the substrate are caused to relatively move having an orientation perpendicular to a longitudinal direction of the opening, thereby processing the substrate. A shield cylinder is disposed around the coil inside a rotating cylindrical ceramic tube, thereby making it possible to achieve compatibility of ignitibility and shielding properties.

Abstract: Methods are disclosed including applying a layer of binder material onto an LED structure. A luminescent solution including an optical material suspended in a solution is atomized using a flow of pressurized gas, and the atomized luminescent solution is sprayed onto the LED structure including the layer of binder material using the flow of pressurized gas.

Abstract: A mask for forming an organic layer pattern, the mask including a photomask having a first substrate and a reflecting layer on the first substrate; and a donor substrate on the photomask and separated therefrom, the donor substrate including a second substrate and an absorption part on the second substrate, wherein the photomask comprises a reflecting part configured to reflect light incident to the photomask and a light concentrating part configured to concentrate the light and transmit the light to the donor substrate.

Abstract: A microelectronic device contains a high voltage component having a high voltage node and a low voltage node. The high voltage node is isolated from the low voltage node by a main dielectric between the high voltage node and low voltage elements at a surface of the substrate of the microelectronic device. A lower-bandgap dielectric layer is disposed between the high voltage node and the main dielectric. The lower-bandgap dielectric layer contains at least one sub-layer with a bandgap energy less than a bandgap energy of the main dielectric. The lower-bandgap dielectric layer extends beyond the high voltage node continuously around the high voltage node. The lower-bandgap dielectric layer has an isolation break surrounding the high voltage node at a distance of at least twice the thickness of the lower-bandgap dielectric layer from the high voltage node.

Abstract: A method of manufacture of an integrated circuit packaging system includes: providing routable traces including a first routable trace with a top plate and a second routable trace; mounting an integrated circuit partially over a second routable trace; forming an encapsulation over and around the first routable trace and the integrated circuit; forming a hole through the encapsulation to the top plate; and forming a protective coat directly on the encapsulation with the first routable trace between and in contact with the protective coat and the encapsulation.

Abstract: A lateral epitaxial growth process is employed to facilitate the fabrication of a semiconductor structure including a stack of suspended III-V or germanium semiconductor nanowires that are substantially defect free. The lateral epitaxial growth process is unidirectional due to the use of masks to prevent epitaxial growth in both directions, which would create defects when the growth fronts merge. Stacked sacrificial material nanowires are first formed, then after masking and etching process to reveal a semiconductor seed layer, the sacrificial material nanowires are removed, and III-V compound semiconductor or germanium epitaxy is performed to fill the void previously occupied by the sacrificial material nanowires.

Abstract: A display panel and a method of forming a display panel are described. The display panel may include a thin film transistor substrate including a pixel area and a non-pixel area. The pixel area includes an array of bank openings and an array of bottom electrodes within the array of bank openings. A ground line is located in the non-pixel area and an array of ground tie lines run between the bank openings in the pixel area and are electrically connected to the ground line in the non-pixel area.

Abstract: Disclosed herein are nanoscale devices comprising one or more ferroelectric nanoshells characterized as having an extreme curvature in at least one spatial dimension. Also disclosed are ferroelectric field effect transistors and metal ferroelectric metal capacitors comprising one or more ferroelectric nanoshells. Methods for controlling spontaneous ferroelectric polarization in nanoshell devices are also disclosed.

Abstract: An organic light emitting display device includes a substrate including a plurality of pixel regions and a plurality of transparent regions, thin film transistors disposed in the pixel regions, an insulation layer disposed on the thin film transistors, first electrodes electrically contacting the thin film transistors, a pixel defining layer including a black material disposed on the first electrodes, organic light emitting structures disposed on the pixel defining layer, and a second electrode disposed on the organic light emitting structures. The pixel defining layer may define an asymmetrical configuration of adjacent transparent regions disposed on opposing sides of corresponding pixel regions.

Abstract: An LED epitaxial structure includes a substrate; a GaN nucleating layer; a superlattice buffer layer comprising a plurality pairs of alternately stacked AlGaN/n-GaN structures; an n-GaN layer; a MQW light-emitting layer, a p-GaN layer and a p-type contact layer. Al(n) represents Al composition value of the nth AlGaN/n-GaN superlattice buffer layer pair; N(n) represents n-type impurity concentration value of the nth AlGaN/n-GaN superlattice buffer layer pair; variation trend of Al(n) is from gradual increase to gradual decrease, and for N(n) is from gradual increase to gradual decrease.

Abstract: The present invention provides a novel compound capable of improving light emitting efficiency, stability, and lifespan of the element, an organic element using the same, and an electric device for the same.

Abstract: An underfill device and method have been are provided. Advantages of devices and methods shown include dissipation of stresses at an interface between components such as a chip package and an adjacent circuit board. Another advantage includes faster manufacturing time and ease of manufacture using underfill devices and methods shown. An underfill assembly can be pre made with conductive structures included within the underfill assembly. Steps such as flowing epoxy and curing can be eliminated or performed concurrently with other manufacturing steps.

Abstract: Methods of fabricating conductive patterns over a solar cell structure are provided, in which a patterned resist layer is provided over an anti-reflective coating layer formed over a solar cell structure. The patterned resist layer is used to etch the exposed portion of the anti-reflective coating, and a metal seed layer is provided over the resist layer and the exposed portion of the solar cell structure's surface. The metal seed layer is selectively removed from over the patterned resist layer without removal from the exposed portion of the surface of the solar cell structure. Different thermal conductivities of the patterned resist layer and the solar cell structure's surface facilitate the selective removal of the seed layer from over the resist layer. Also provided are methods of facilitating simultaneous fabrication of conductive patterns over a plurality of solar cell structures using one or more frame structures.

Abstract: A nitrogen-containing heterocyclic compound wherein a pyrrole ring, an aromatic ring and a 7-membered ring are fused one another, a material for organic electroluminescence device including the compound, and an organic electroluminescence device including the material.

Abstract: An array substrate, a display panel and a display apparatus are provided. The array substrate includes a display region and a non-display region. The non-display region is provided with multiple gate driving circuits and multiple signal lines disposed outside the gate driving circuits. Each gate driving circuit includes at least one Thin Film Transistor and at least one capacitor. The capacitor includes a first plate and a second plate, and the capacitor is located above or below the signal lines. Since the capacitor is not arranged in a gate driving circuit region, a size of the gate driving circuit may be reduced. Accordingly, a width of a border of the display apparatus is further reduced, thereby achieving a narrow border design.

Abstract: An organic light-emitting device includes an organic layer including an emission layer between a first electrode and the second electrode, and a hole transport region including an auxiliary layer between the first electrode and the emission layer, the hole transport region. The auxiliary layer includes a first material and a second material that satisfy Equations 1-1 and 1-2: 0 eV<EL2?EL1?0.6 eV??<Equation 1-1> 0 eV<EH1?EH2?0.6 eV??<Equation 1-2> wherein in Equation 1-1 and 1-2, EH1 is a highest occupied molecular orbital energy (HOMO energy) of the first material; EL1 is a lowest unoccupied molecular orbital energy (LUMO energy) of the first material; EH2 is a HOMO energy of the second material; and EL2 is a LUMO energy of the second material.

Abstract: A method of manufacturing a stacked semiconductor device having two or more wafers may include forming a conductor on an upper wafer, the conductor configured to electrically connect input terminals together that have no input protection circuit against ESD; forming front side micro-bumps on a front side of the upper wafer, the front side micro-bumps configured to electrically connect to back side micro-bumps on the upper wafer; forming a TSV structure, the TSV structure configured to facilitate electrical connections between the front and the back side of the upper wafer; forming back side micro-bumps on the back side of the upper wafer, the back side micro-bumps configured to electrically connect with front side micro-bumps on the lower wafer; stacking the upper wafer on the lower wafer; and separating the conductor such that each of the input terminals are electrically independent from other ones of the input terminals.

Abstract: An organic compound having a high T1 level is provided. An element emitting phosphorescence in the blue and green regions is provided. An organic compound having a high glass-transition temperature is provided. A light-emitting element, a light-emitting device, an electronic appliance, or a lighting device having high heat resistance is provided. A light-emitting element includes at least a hole-transport layer, a light-emitting layer, and an electron-transport layer between an anode and a cathode. An anthracene compound represented by General Formula (G1) is contained in at least one of the hole-transport layer, the light-emitting layer, and the electron-transport layer.

Abstract: A semiconductor device having a field-effect transistor, including a trench in a semiconductor substrate, a first insulating film in the trench, an intrinsic polycrystalline silicon film over the first insulating film, and first conductivity type impurities in the intrinsic polycrystalline silicon film to form a first conductive film. The first conductive film is etched to form a first gate electrode in the trench. A second insulating film is also formed in the trench above the first insulating film and the first gate electrode, and a first conductivity type doped polycrystalline silicon film, having higher impurity concentration than the first gate electrode is formed over the second insulating film. The doped polycrystalline silicon film is provided in an upper part of the trench to form a second gate electrode.