Patents Examined by Aracelis Ruiz
  • Patent number: 11068403
    Abstract: A data processing system includes a memory device; buffer entries each including a plurality of slabs; a prefetch circuit configured to prefetch data from the memory device and store the data in the buffer entries; and processing circuits respectively corresponding to the slabs, each processing circuit being configured to sequentially demand-fetch and process data stored in corresponding slabs in the buffer entries, wherein each processing circuit checks, when demand-fetching data from a first slab among corresponding slabs, a prefetch trigger bit of a first buffer entry in which the first slab is included, determines, when it is determined that the prefetch trigger bit is set, whether all data stored in the slabs included in a second buffer entry is demand-fetched, and triggers, when it is determined that all the data is demand-fetched, the prefetch circuit to perform prefetch of subsequent data to the second buffer entry.
    Type: Grant
    Filed: October 2, 2019
    Date of Patent: July 20, 2021
    Assignees: SK hynix Inc., Purdue Research Foundation
    Inventors: Il Park, T. N. Vijaykumar, Mithuna S Thottethodi, Nitin Delhi
  • Patent number: 11061824
    Abstract: Deferring cache state updates in a non-speculative cache memory in a processor-based system in response to a speculative data request until the speculative data request becomes non-speculative is disclosed. The updating of at least one cache state in the cache memory resulting from a data request is deferred until the data request becomes non-speculative. Thus, a cache state in the cache memory is not updated for requests resulting from mispredictions. Deferring the updating of a cache state in the cache memory can include deferring the storing of received speculative requested data in the main data array of the cache memory as a result of a cache miss until the data request becomes non-speculative. The received speculative requested data can first be stored in a speculative buffer memory associated with a cache memory, and then stored in the main data array if the data request becomes non-speculative.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: July 13, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Vignyan Reddy Kothinti Naresh, Arthur Perais, Rami Mohammad Al Sheikh, Shivam Priyadarshi
  • Patent number: 11061611
    Abstract: A method and a system for creating a workload distribution plan on a storage system. The method includes, for each storage location, initializing components for at least one data type, such that the components establish a baseline distribution percentage. The method also includes writing data packages onto the storage system over a predetermined time period. The method also includes, for each data type on each storage location, creating a workload distribution plan, where the workload distribution plan distributes a workload of the storage system to the storage location. The method also includes implementing the workload distribution plan on the storage system.
    Type: Grant
    Filed: February 21, 2019
    Date of Patent: July 13, 2021
    Assignee: International Business Machines Corporation
    Inventors: Da Lei Zhang, Jia Jun Lu, Li Li Gu, Le Yi Zhou, Xiao Yu Wang, Wen Bao Yin
  • Patent number: 11048415
    Abstract: Aspects of the innovations herein are consistent with a storage system for storing variable sized objects. According to certain implementations, the storage system may be a transaction-based system that uses variable sized objects to store data, and/or may be implemented using data stores, such as arrays disks arranged in ranks. In some exemplary implementations, each rank may include multiple stripes, each stripe may be read and written as a convenient unit for maximum performance, and/or a rank manager may be provided to dynamically configure the ranks. In certain implementations, the storage system may include a stripe space table that contains entries describing the amount of space used in each stripe. Further, an object map may provide entries for each object in the storage system describing the location, the length and/or version of the object.
    Type: Grant
    Filed: October 2, 2019
    Date of Patent: June 29, 2021
    Assignee: Primos Storage Technology, LLC
    Inventor: Robert E. Cousins
  • Patent number: 11048628
    Abstract: Retrieval of files containing audiovisual information from tape may be accelerated by storing non-sequentially read information in non-tape memory, and subsequently reading the file from tape, with reads of the non-sequentially read information fulfilled from the non-tape memory. In some embodiments a random access database is created when the file is opened or written to tape, and utilized to determine locations in the file of non-sequentially read information, or to determine the non-sequentially read information.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: June 29, 2021
    Assignee: StorageDNA, Inc.
    Inventor: Tridib Chakravarty
  • Patent number: 11042302
    Abstract: Embodiments of the present disclosure generally relate to an NVMe storage device having a controller memory manager and a method of accessing an NVMe storage device having a controller memory manager. In one embodiment, a storage device comprises a non-volatile memory, a volatile memory, and a controller memory manager. The controller memory manager is operable to store one or more NVMe data structures within the non-volatile memory and the volatile memory.
    Type: Grant
    Filed: October 9, 2019
    Date of Patent: June 22, 2021
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventor: Shay Benisty
  • Patent number: 11036394
    Abstract: Methods and systems for deduplicating data by a system having a first storage device and a second storage device to store deduplicated data are described, wherein data is retrievable from the first storage faster than data is retrievable from the second storage. The first storage may be an SSD device. Data is received data for deduplication and deduplicated. It is determined whether to store the received data in the first storage or the second storage, and the data is stored in the determined location. If the first storage is full, data may be moved to the second storage to make room for data to be stored in the first storage. One or more factors may be used to determine whether to store the received data in the first storage and which data to move out of the first storage, if necessary. Retrieval methods and systems are also described.
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: June 15, 2021
    Assignee: FALCONSTOR, INC.
    Inventor: Denis Theinert
  • Patent number: 11036635
    Abstract: Provided are a computer program product, system, and method for selecting resources to make available in local queues for processors to use. Each processor of a plurality of processors maintains a queue of resources for the processor to use when needed for processor operations. One of processors is selected. The selected processor accesses at least one available resource and includes the accessed at least one resource in the queue of the selected processor.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: June 15, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin J. Ash, Matthew G. Borlick, Lokesh M. Gupta, Trung N. Nguyen
  • Patent number: 11029854
    Abstract: In a memory controller for controlling an operation of a memory device, the memory controller includes a buffer memory and a processor. The buffer memory stores first data received from a host and second data received from the memory device. The processor controls the memory controller to generate a write command for programming the first data and the second data to the memory device.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: June 8, 2021
    Assignee: SK hynix Inc.
    Inventor: Sung Kwan Hong
  • Patent number: 11023130
    Abstract: Deletion of data stored via a geographically diverse storage is disclosed. In response to determining that a first chunk and a second chunk of a first zone are to be deleted, a portion of the first and second chunks can be received at a second zone comprising a third and fourth chunk. The third chunk can comprise data represented by the first chunk and the fourth chunk can comprise data represented by the second chunk. The portion of the first and second chunks, and the third and the fourth chunks can be employed in generating a fifth chunk that comprises data from the third and fourth chunks other than data represented in the first and second chunks. In an aspect the portion of the first and second chunks can be received via a sixth chunk generated at the first zone.
    Type: Grant
    Filed: June 15, 2018
    Date of Patent: June 1, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Mikhail Danilov, Alexander Elpaev
  • Patent number: 11010060
    Abstract: A high performance logical device having low latency may be provided. I/Os to the logical device may be sent only to a primary director having sole ownership of the logical device. The primary director may perform operations locally for the logical device. Such operations may include allocating global memory for use with the logical device from only a global memory portion that is local to the primary director. The global memory may be a distributed global memory including memory from multiple directors and possibly multiple engines. Cached data for the logical device may be mirrored automatically by the data storage system. Alternatively, the cached data for the logical device may be mirrored using a host-based mirroring technique.
    Type: Grant
    Filed: June 20, 2019
    Date of Patent: May 18, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Douglas E. LeCrone, Michael J. Scharland, Steven T. McClure, Jerome Cartmell
  • Patent number: 11010072
    Abstract: Embodiments of the present application provide a method and apparatus for displaying objects. In the method, data segments of to-be-stored data are stored in storage objects. A storage object is a minimum unit for data storage. The difference between the number of data segments stored in a storage object and that of another storage object is no more than a first preset threshold. Data segments are equally stored, to the greatest extent, into storage objects. The case that data having segments lost due to failure of a storage object cannot be restored is avoided.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: May 18, 2021
    Assignee: HANGZHOU HIKVISION DIGITAL TECHNOLOGY CO., LTD.
    Inventors: Min Ye, Peng Lin, Weichun Wang, Qiqian Lin
  • Patent number: 10977171
    Abstract: A method for creating a multi-namespace includes steps of: returning information of a namespace data structure according to a query command from, wherein the information of the namespace data structure comprises a maximum number and a total capacity of supportable namespace; receiving and determining whether a create command for creating a plurality of namespaces is correct, wherein the create command comprises a number of a namespace and a capacity of the namespace; and if the determination is correct, creating a global host logical-flash physical address (H2F) mapping table according to the create command, wherein a number of the global H2F mapping tables is independent of the maximum number of the supportable namespaces and the number of namespace. A method for accessing data in a multi-namespace is also provided.
    Type: Grant
    Filed: November 4, 2019
    Date of Patent: April 13, 2021
    Assignee: Silicon Motion, Inc.
    Inventor: Po-Sheng Chou
  • Patent number: 10969975
    Abstract: The present disclosure relates to a dynamically composable computing system comprising a computing fabric with a plurality of different disaggregated computing hardware resources having respective hardware characteristics. A resource manager has access to the respective hardware characteristics of the different disaggregated computing hardware resources and is configured to assemble a composite computing node by selecting one or more disaggregated computing hardware resources with respective hardware characteristics meeting requirements of an application to be executed on the composite computing node. An orchestrator is configured to schedule the application using the assembled composite computing node.
    Type: Grant
    Filed: August 1, 2019
    Date of Patent: April 6, 2021
    Assignee: Intel Corporation
    Inventors: Francesc Guim Bernat, Karthik Kumar, John Chun Kwok Leung, Mark Schmisseur, Thomas Willhalm
  • Patent number: 10963163
    Abstract: Categorizing computing process output data streams for flash storage devices is disclosed. A first computing process characteristic of a first computing process that generates a first output data stream is determined. A structure that correlates the first computing process characteristic to a first stream identifier is accessed. A first filter driver is associated with the first computing process to configure the first filter driver to receive the first output data stream. The first filter driver is associated with a flash storage device. The first stream identifier is sent to the first filter driver.
    Type: Grant
    Filed: October 9, 2019
    Date of Patent: March 30, 2021
    Assignee: Red Hat, Inc.
    Inventors: Huamin Chen, Jay Vyas
  • Patent number: 10963164
    Abstract: The present disclosure includes apparatuses and methods related to a non-deterministic memory protocol. An example apparatus can perform operations on the memory device based on commands received from a host according to a protocol, wherein the protocol includes non-deterministic timing of the operations. The memory device can be a non-volatile dual in-line memory module (NVDIMM) device.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: March 30, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Robert M. Walker, James A. Hall, Jr., Frank F. Ross
  • Patent number: 10963179
    Abstract: A method to prevent the inadvertent removal of volumes on a storage system is disclosed. In one embodiment, such a method includes receiving a request to remove (e.g., delete, detach, unmask, etc.) a volume on a storage system. In response to receiving the request, the method initiates at least one process to monitor the volume for I/O activity over a specified period of time. In the event the at least one process does not detect I/O activity to the volume during the specified period of time, the method executes the request by removing the volume. In the event the at least one process detects I/O activity to the volume during the specified period of time, the method denies the request to remove the volume. A corresponding system and computer program product are also disclosed.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: March 30, 2021
    Assignee: International Business Machines Corporation
    Inventors: John J. Auvenshine, Dave Kodjo, Nicolas Andre Druet, Marcel Pop, Paul Cloutier
  • Patent number: 10956081
    Abstract: A data structure is maintained for performing a program operation that is allowed to be suspended to perform reads in a NAND device, where the data structure indicates a plurality of tiers, where each tier of the plurality of tiers has a number of allowed suspends of the program operation while executing in the tier, and where a sum of the number of allowed suspends for all tiers of the plurality of tiers equals a maximum allowed number of suspends of the program operation. In response to performing a resume of the program operation, after performing a read following a suspend of the program operation, a determination is made of a tier of the plurality of tiers for the program operation and a subsequent suspend of the program operation is performed only after a measure of progress of the program operation has been exceeded in the determined tier.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: March 23, 2021
    Assignee: INTEL CORPORATION
    Inventors: David J. Pelster, David B. Carlton, Mark Anthony Golez, Xin Guo, Aliasgar S. Madraswala, Sagar S. Sidhpura, Sagar Upadhyay, Neelesh Vemula, Yogesh B. Wakchaure, Ye Zhang
  • Patent number: 10957398
    Abstract: The invention relates to a method for managing an memory LNVM erasable by block. The method comprises an index management of the memory blocks wherein the index indicates if a block is erased (Erased) or to be erased (TBE). A memory manager performs a block erasing when the memory is not in use and a block is to be erased and when the number of erased blocks is lower than a predetermined number.
    Type: Grant
    Filed: November 25, 2016
    Date of Patent: March 23, 2021
    Assignee: THALES DIS FRANCE SA
    Inventors: Frederic Gallas, Rudy Yanto, Vincent Dumas, Fabrice Vergnes
  • Patent number: 10936423
    Abstract: A method, computer system, and a computer program product for enhanced application write operations is provided. The present invention may include performing a write operation by an application node. The present invention may then include committing the write operation to a local buffer cache. The present invention may then include sending the application node an indication that the write operation was successful. The present invention may then include flushing the local buffer cache to a disk based on a buffer flush trigger, and the present invention may lastly include sending a Remote Procedure Call (RPC) to at least one gateway node, wherein functionality of the gateway node is located on different physical nodes which are separated from the application node over the network.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: March 2, 2021
    Assignee: International Business Machines Corporation
    Inventors: Shankar Balasubramanian, Venkateswara R. Puvvada, Frank B. Schmuck