Patents Examined by B. James Peikari
  • Patent number: 7139881
    Abstract: A structure and associated method of transfer data on a semiconductor device, comprising: a plurality of systems within the semiconductor device. Each system comprises at least one processing device and a local memory structure. Each processing device is electrically coupled to each local memory structure within each system. Each local memory structure is electrically coupled to each of the other said local memory structures. Each local memory structure is adapted to share address space with each of the processing devices. Each processing device is adapted to transmit data and instructions to each local memory structure.
    Type: Grant
    Filed: September 25, 2003
    Date of Patent: November 21, 2006
    Assignee: International Business Machines Corporation
    Inventors: Kenneth J. Goodnow, Francis A. Kampf, Jason M. Norman, Sebastian T. Ventrone
  • Patent number: 7139810
    Abstract: Embodiments of the present invention are directed to methods and systems of storing data in storage volumes while ensuring matching data redundancy between the storage volumes. In one embodiment, a system for storing data comprises a first storage area to store data; a second storage area to store data; a first storage control unit configured to control the first storage area; and a second storage control unit configured to control the second storage area. In response to a first write request issued to write data in the first storage area, the first storage control unit is configured to write data associated with the first write request to the first storage area and to transfer the first write request to the second storage control unit, and the second storage control unit is configured to write the data associated with the first write request to the second storage area.
    Type: Grant
    Filed: July 23, 2003
    Date of Patent: November 21, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Takeshi Ido, Mitsuru Kashiwagi
  • Patent number: 7139884
    Abstract: A method, apparatus and computer program product are provided for implementing enhanced autonomic data backup using multiple backup devices. A media definition object is defined for saving predefined user selections including a default backup format to be used, an order to process the libraries, a library exception size, and a maximum number of backup devices to be used serially. A list of libraries is generated by either a user specified order of the libraries or a size order of the libraries from largest to smallest. Each library in the generated list of libraries is processed to form at least one library queue of a serial device wait queue and a parallel device wait queue. A process IO procedure is called until backup completes for each library from the at least one library queue.
    Type: Grant
    Filed: June 5, 2003
    Date of Patent: November 21, 2006
    Assignee: International Business Machines Corporation
    Inventors: Donald R. Halley, Paul Douglas Koeller
  • Patent number: 7136966
    Abstract: A solid state disk drive is provided among the storage devices controlled by a storage controller. The solid state disk drive may serve as a level 2 cache using standard multi-level cache management algorithms. The solid state disk may share a drive channel with other storage devices or may have a dedicated channel.
    Type: Grant
    Filed: March 18, 2002
    Date of Patent: November 14, 2006
    Assignee: LSI Logic Corporation
    Inventor: William A. Hetrick
  • Patent number: 7133983
    Abstract: For a technique for maintaining consistency of data, one or more blocks of data identified by a first structure are copied to form a consistent set of data. While not acknowledging completion of write requests to any blocks of data, a second structure is created, wherein the second structure indicates which blocks of data are modified while the consistent set of data is being formed.
    Type: Grant
    Filed: September 29, 2003
    Date of Patent: November 7, 2006
    Assignee: International Business Machines Corporation
    Inventors: Robert Francis Bartfai, William Frank Micka, Thomas Charles Jarvis, Olympia Gluck, Michael E. Factor, Irit Dolev, Warren K. Stanley, Martin Jacob Tross, Sam Clark Werner, Aviad Zlotnick, Gail Andrea Spear
  • Patent number: 7133986
    Abstract: Provided are a method, system, and program for forming a consistency group of data. Information is provided on a consistency group relationship indicating a plurality of slave controllers and, for each indicated slave controller, a slave storage unit managed by the slave controller. A command is transmitted to each slave controller in the consistency group relationship to cause each slave controller to transmit data in the slave storage unit to a remote storage in a manner that forms the consistency group. A determination is made as to whether all the slave controllers successfully transmitted the data in the slave storage units that is part of the consistency group to the remote storage.
    Type: Grant
    Filed: September 29, 2003
    Date of Patent: November 7, 2006
    Assignee: International Business Machines Corporation
    Inventors: Gail Andrea Spear, Robert Francis Bartfai, Edward Hsiu-Wei Lin, William Frank Micka, Olympia Gluck, Aviad Zlotnick, Michael E. Factor, Thomas Charles Jarvis, Sam Clark Werner
  • Patent number: 7130973
    Abstract: Methods and apparatuses to restore data redundancy in a storage system with a storage virtualization engine. In one aspect of the invention, a method to restore data redundancy includes: receiving input indicating loss of redundancy for first data on a first storage unit; copying the first data from the first storage unit to a second storage unit so that the first data stored on the second storage unit has redundancy; and mapping (or configuring a storage virtualization engine to map) logical addresses for accessing the first data to physical addresses for the second storage unit in which the first data is stored. In one example according to this aspect, a portion of the second storage unit is determined and the first data is copied onto the portion of the second storage unit. The first and second storage units can be in a same storage subsystem under control of a storage controller or in different storage subsystems under control of separated storage controllers (e.g., disk controllers).
    Type: Grant
    Filed: August 8, 2003
    Date of Patent: October 31, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Fay Chong, Jr., Whay S. Lee
  • Patent number: 7130931
    Abstract: Provided are a method, system, and article of manufacture for copying storage. A request is received from a host application to copy a plurality of source storage units. A list of potential target storage units is determined based on a policy. Potential target storage units that are eligible for fast replication are selected from the determined list, wherein the selection of the potential target storage units for fast replication includes determining whether a storage unit in the list of potential target storage units is eligible for fast replication by processing an attribute associated with the storage unit.
    Type: Grant
    Filed: June 18, 2003
    Date of Patent: October 31, 2006
    Assignee: International Business Machines Corporation
    Inventors: John Glenn Thompson, David Michael Shackelford
  • Patent number: 7127580
    Abstract: An access restriction apparatus, an access restriction method, a computer readable program storage medium having a recorded access restriction program, and the access restriction program, all capable of making a terminal refer only to management information existing at a position designated by link position information. An access restriction apparatus for limiting the access of terminals desiring access to managed management information is provided with a supply section for supplying the terminals with partially or totally encrypted link position information indicating a linking destination of the management information, and an access management section for managing the access of the terminals to the management information based on the link position information decoded by the terminals.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: October 24, 2006
    Assignee: Sony Corporation
    Inventors: Masayuki Takeuchi, Shinichi Kitoh, Nobutoshi Furuya, Takeshi Yoshino
  • Patent number: 7124179
    Abstract: There is disclosed a system, method, apparatus and computer program product for managing a storage system including a SAN within a computer network. The storage system can be managed in object-oriented computer language. Object trees of each component in the storage system or SAN are obtained and combined on each storage processor in the storage system. The user interface (UI) can therefore select one storage processor within the storage system, and request such combined object tree information for the entire storage system or SAN from only that singular storage processor on which such combined information is stored. This eliminates a severe computational drain on the UI, which otherwise would be required to make these object tree combinations, and further allows a single point of storage management contact between UI and storage system or SAN by way of that singular storage or portal processor.
    Type: Grant
    Filed: October 13, 2004
    Date of Patent: October 17, 2006
    Assignee: EMC Corporation
    Inventors: Andreas L. Bauer, Russell R. Laporte, Richard J. Nordin, Brian G. Campbell
  • Patent number: 7117339
    Abstract: A data processing system includes at least one system processor, chipset core logic, main memory to store computer software and data including operating system software, and a graphics address remapping table (GART). The chipset logic operates on first-sized real memory pages, while the operating system operates on larger, second-sized virtual memory pages. In an embodiment GART driver software maps each virtual page to Z continuous or non-contiguous real pages by filling up the GART with Z entries per virtual page, where Z is the rounded integer number of first-sized pages per second-sized page. In another embodiment, an address translation function converts a target address, corresponding to an address within a virtual page, issuing from a processor into a second address, corresponding to a base address of a real page in main memory. Also described are an integrated circuit and a computer-readable medium to map memory pages of disparate sizes.
    Type: Grant
    Filed: June 23, 2005
    Date of Patent: October 3, 2006
    Assignee: Intel Corporation
    Inventors: Nagasubramanian Gurumoorthy, Shivaprasad Sadashivaiah
  • Patent number: 7117315
    Abstract: Data shared by plural processes of a program are identified and identification information is affixed to the shared data. When the program is linked by a linker, only the shared data to which identification information is affixed are extracted and a shared data area is created for the shared data. During program execution, this shared data area is prevented from being and the main memory is referred to or updated or the cache is invalidated prior to access of the shared data area by the linker. An address of data in a processor is computed from an address of the data in another processor based on a specific expression.
    Type: Grant
    Filed: June 25, 2003
    Date of Patent: October 3, 2006
    Assignee: Fujitsu Limited
    Inventors: Hideo Miyake, Teruhiko Kamigata, Akiko Azegami
  • Patent number: 7116584
    Abstract: A plurality of memory devices can be erase block tagged in parallel by issuing an erase pulse to memory devices that do not have memory blocks with erase block latches that indicate the block is erased. The status of the memory block is read after the erase pulse. If there are blocks remaining to be erased, erase block tag patterns are generated. Each memory block at a particular sector address has a unique erase block tag pattern to set the erase block latch for that particular memory block. The patterns are transmitted in parallel to the memory devices in a data burst.
    Type: Grant
    Filed: August 7, 2003
    Date of Patent: October 3, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Scott N. Gatzemeier, Mitch Liu
  • Patent number: 7117387
    Abstract: Writing in each sector of a series of sectors of a recording medium in which data is to be written caused by a single data write request location information which is information indicating a location of the sector in the series of sectors and common information which varies every time data writing to the series of sectors occurs and is information set relating to the series of sectors.
    Type: Grant
    Filed: August 28, 2003
    Date of Patent: October 3, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Eiju Katsuragi, Takao Sato, Mikio Fukuoka, Hisaharu Takeuchi
  • Patent number: 7117338
    Abstract: In a computer system, an architecture is disclosed for optimizing aspects of data movement operations by performing functions such as memory allocation and notification on hardware rather than software. In this environment, the claimed invention is a method and apparatus for ensuring the integrity of data movement operations from virtual memory. The invention monitors and detects Translation Lookaside Buffer (“TLB”) purges, a hardware-based operation whose occurrence signals that virtual-to-physical mapping has changed. Responsive to detection of a TLB purge during the set up or execution of a data movement operation, the claimed invention aborts the operation, and then enqueues corresponding completion status information to notify processors of the event.
    Type: Grant
    Filed: August 25, 2003
    Date of Patent: October 3, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Tony M. Brewer
  • Patent number: 7114012
    Abstract: The present invention provides a method for migrating from a source storage system to a target storage system. The method comprises the steps of: defining a volume defined on a drive to be migrated in the source storage system as an external volume of the target storage system; causing the host to access the volume on the drive to be migrated through an input/output port of the drive to be migrated as the external volume of the target storage system; blocking the other input/output port of the drive to be migrated while maintaining the access to the external volume of the target storage system; reconnecting the blocked input/output port with an interface in the target storage system; blocking the input/output port through which the external volume is being accessed, and connecting it with the interface in the target storage system; and implementing the drive to be migrated in the target storage system.
    Type: Grant
    Filed: September 8, 2004
    Date of Patent: September 26, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Noboru Morishita, Yasutomo Yamamoto
  • Patent number: 7111119
    Abstract: The present invention makes it possible to transfer information between processors by a method that places little burden on the reception side processors. The information processing device is a device that processes information using a plurality of processors, comprising one or more first processors that have one or a plurality of local memories, and one or more second processors that write write information directly into the local memory that the target first processor has. The second processors store address maps in which local memory addresses for the first processors are recorded; these second processors acquire local memory addresses from these address maps, and write write information into the acquired local memory addresses.
    Type: Grant
    Filed: January 30, 2004
    Date of Patent: September 19, 2006
    Assignee: Hitachi, Ltd.
    Inventor: Nobuyuki Minowa
  • Patent number: 7111124
    Abstract: A method, apparatus, and signal-bearing medium for improving the performance of a cache when request streams with different spatial and/or temporal properties access the cache. A set in the cache is partitioned into subsets with different request streams using different subsets within the cache. In this way, interference between the different request streams is reduced.
    Type: Grant
    Filed: March 12, 2002
    Date of Patent: September 19, 2006
    Assignee: Intel Corporation
    Inventors: Ravishankar R. Iyer, Pete D. Vogt
  • Patent number: 7107485
    Abstract: Method and system for reflecting a change of a copy VOL caused by VOL replica means upon a standby party. In a living and standby party computer system for operating original volumes and copy volumes by using volume replica, after having executed a volume replica, the living party informs the standby party that a copy volume is changed and the standby party reflects changed copy volume information upon the self-party. Through this, even after a fault occurs in the living party and party switchover is done, the standby party can access the copy volume on the basis of the information reflected upon the standby party to continue a process.
    Type: Grant
    Filed: January 30, 2004
    Date of Patent: September 12, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Tsunehiko Baba, Takayuki Nakano
  • Patent number: 7107418
    Abstract: A method and system for mirroring and archiving mass storage. A primary mass storage and a secondary mass storage are synchronized to contain the same data. Thereafter, a primary system tracks changes made to the primary mass storage. These changes are consolidated periodically into update files, the consolidations representing changes made to the primary mass storage during a time interval that ends when the primary mass storage is in a logically consistent state. These update files contain only those changes necessary to represent the modified state of the primary mass storage at the time of the update. The primary system then transfers the update files to a secondary system to bring the secondary mass storage current with the primary mass storage. The consolidation minimizes the amount of information that must be transferred and therefore allows for a relatively low band width communication channel.
    Type: Grant
    Filed: August 14, 2003
    Date of Patent: September 12, 2006
    Assignee: EMC Corporation
    Inventor: Richard S. Ohran