Patents Examined by Brian H. Shaw
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Patent number: 6076167Abstract: A method of enhancing network security is provided for a communication session initiated between a first computer and a second other computer. From the first computer to the second computer in communications therewith a process for securing communications therebetween is transmitted. One such process is a biometric characterisation process for characterising fingerprints. The process is for execution on the second computer and is selected to be compatible therewith. Communications from the second computer to the first computer are secured using the transmitted process on the second computer and using, on the first computer, a compatible process to the transmitted process. The host computer can modify or replace the process or data particular to the process before each session, during a session, or at intervals.Type: GrantFiled: August 11, 1997Date of Patent: June 13, 2000Assignee: DEW Engineering and Development LimitedInventor: Stephen J. Borza
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Patent number: 6038684Abstract: A fault-tolerant computer architecture is described wherein the effect of hardware faults is diminished. The architecture employs a main data bus having a plurality of interface slots for interconnecting conventional computer sub-systems. The number and type of sub-systems may vary considerably, however, a central processor sub-system which encompasses the inventive elements of the invention is always included. The central processor sub-system employs a plurality of central processing modules operating in parallel in a substantially synchronized manner. One of the central processing modules operates as a master central processing module, and is the only module capable of reading data from and writing data to the main data bus. The master central processing module is initially chosen arbitrarily from among the central processing modules.Type: GrantFiled: March 22, 1999Date of Patent: March 14, 2000Assignee: Sun Microsystems, Inc.Inventors: David C. Liddell, Emrys J. Williams
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Patent number: 6029247Abstract: A system for transmitting secured data is disclosed. A plurality of interconnected nodes access a distributed directory having a plurality of objects and attributes. An access control mechanism controls access to the distributed directory. An encryption system and a decryption system are used to encrypt and decrypt secret data. The resulting encrypted data is associated with an attribute of an object, whereby access to the secret data is permitted if (i) the access control mechanism permits access to the attribute, and (ii) decryption information is presented to the decryption system to decrypt the secret data.Type: GrantFiled: December 9, 1996Date of Patent: February 22, 2000Assignee: Novell, Inc.Inventor: Daniel T. Ferguson
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Patent number: 6029257Abstract: A method, apparatus, and computer program product for testing a computer system having a set of computer components and a testing program stored in memory provides both a test header file associated with a selected component, and a component file listing the set of components of the computer system. The test header file and component header file are compared to determine if the selected computer component is one of the set of components of the computer system. If it is determined that the selected component is one of the set of components of the computer system, then the testing program is executed.Type: GrantFiled: December 5, 1997Date of Patent: February 22, 2000Assignee: Intergraph CorporationInventor: Christopher M. Palmer
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Patent number: 6023763Abstract: A software protection method and apparatus uses a removable hardlock to prevent the unauthorized installation and/or use of a licensed software program. The removable hardlock, when supplied to a user, stores an access variable indicating the number of licenses available for the software program. During installation of the software program on a computer, the removable hardlock is inserted into an external port of the computer and the access variable is read to determine if any licenses for the software program are still available. If so, the software program is installed on the computer in a manner that allows the software program to be run on the computer when the removable hardlock is removed from the external port of the computer. The access variable on the removable hardlock is then decremented to indicate that one of the previously available licenses has now been used.Type: GrantFiled: April 23, 1997Date of Patent: February 8, 2000Assignee: Fisher Controls International, Inc.Inventors: Bruce F. Grumstrup, Patrick O. Ryan
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Patent number: 6021509Abstract: A method for rebuilding contents of a malfunctioned direct access storage device within a log-structured array is disclosed. In accordance with the method and system of the present invention, each direct access storage device within a log-structured array is divided into multiple segment-columns, and each corresponding segment-column from each direct access storage device within the log-structured array forms a segment. A segment is first located within the direct access storage devices. A determination is made as to whether or not the segment is empty. In response to a determination that the segment is empty, a pointer is moved within a segment-column mapping table from pointing to a segment-column in the malfunctioned direct access storage device to point to a segment-column in a spare direct access storage device of the segment.Type: GrantFiled: May 11, 1998Date of Patent: February 1, 2000Assignee: International Business Machines CorporationInventors: Steven Gerdt, M. Jaishankar Menon, Dung Kim Nguyen
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Patent number: 6021413Abstract: A system and method for application-directed variable-granularity consistency management, in one embodiment, carries out the steps of: predefining a template specifying a structure of a file; imposing the template on the file including registering fields/records within the file for consistency; creating an index table for the file; detecting a write to the file, at one of a file system server and a file system client; and queuing, upon detecting the write to the file and in the event a portion of the file to which the write occurs is registered for consistency, the write for propagation to another of the file system server and the file system client.Type: GrantFiled: April 1, 1997Date of Patent: February 1, 2000Assignee: The University of Illinois Board of TrusteesInventors: Bharghavan Vaduvur, Dane Dwyer
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Patent number: 6016563Abstract: An apparatus and method are provided for the development, testing and verification of a logic design of a programmable logic device in a real-time user environment to simplify the development of the programmable logic device and associated systems. The apparatus comprises an emulation programmable logic device based on the same family and package of the target programmable logic device. The adapter further comprises a plurality of individually programmable switches for selectively coupling the emulation device to the target device or to a logic device substituting for the target device. The apparatus further comprises a controller, which configures the switches based on control signals received from a host computer system, such that a stimulus applied to the input pins of the target or substitute device are also applied concurrently to the corresponding input pins of the emulation device.Type: GrantFiled: December 30, 1997Date of Patent: January 18, 2000Inventor: Evgeny G. Fleisher
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Patent number: 6006329Abstract: A computer system (100) and method detect computer viruses spanning multiple data streams. A virus signature is written in the form of a Boolean expression, where the operands of the Boolean expression are signatures of components of the virus. A processor (110) identifies data streams to be scanned and scans the identified data streams for components of viruses. Using the scan results, the processor (110) then evaluates the virus signatures, and, for any Boolean expression satisfied, the processor (110) determines that the virus corresponding to the expression exists in the scanned data streams.Type: GrantFiled: August 11, 1997Date of Patent: December 21, 1999Assignee: Symantec CorporationInventor: Darren Chi
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Patent number: 6006334Abstract: No more than one user at any one time is allowed to access a distributed service for each User ID and password. A user is allowed initial access to the distributed service with a password. The use of the distributed service is then restricted to the user upon entering the password plus a random factor created by the user. A user record is created as a unique recorded registration.Type: GrantFiled: May 1, 1997Date of Patent: December 21, 1999Assignee: International Business Machines Corp.Inventors: Binh Q. Nguyen, Richard J. Redpath, Sandeep Kishan Singhal
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Patent number: 6006331Abstract: The recovery of online sessions for directory services is disclosed. A server maintains a directory service of a plurality of clients. In one embodiment, a unique token for each client, known to the client and to the server, permits the client to relog onto the server, for example, after the client has crashed. In another embodiment, a client caches the information sent to the server during the log-on process, so that if the server in response to a later refresh request from the client cannot locate the client--as a result, for example, of a network or server crash--the client can automatically relog onto the server using the cached information, without user intervention. The message sent by the server to the client in response to a refresh request, after the client's entry in the directory no longer exists after a server or network crash, is desirably a dedicated error message instructing the client that it is not logged onto the server, and therefore that it should relog onto the server.Type: GrantFiled: July 29, 1997Date of Patent: December 21, 1999Assignee: Microsoft CorporationInventors: Lon-Chan Chu, Yoram Yaacovi, Kent F. Settle
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Patent number: 5991194Abstract: A memory device (100) includes a user device information sector (122) in addition to normal sectors (124) of a memory array. The user device information sector includes a product identification field (240) and a restricted address list field (250), and optionally includes a customer identification number field (220) and a serial number field (230). The product identification field includes such information as the manufacturer ID, a part number ID, package/speed identification, temperature/voltage identification, and byte locations for special options. The device identification field is factory programmed using a high voltage enabling signal applied to a write control logic circuit (102) in the memory device in conjunction with a "Device Information Sector Program" instruction is applied to the SPI command and control logic (110). The device information sector is read from the application using a "Read Device Information" instruction.Type: GrantFiled: October 24, 1997Date of Patent: November 23, 1999Inventors: Robin J. Jigour, Asim A. Bajwa
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Patent number: 5987609Abstract: A system for remotely securing or locking a wireless information device is provided by sending an Email message with an attached password to the device. The owner of an information device specifies a password and a security level beforehand. The specified information is stored in a memory. When an electronic mail is received from another information device through a wireless telephone facility of the information device, a password attached to the electronic mail is checked with the password stored in the memory. When the password match occurs, a security process corresponding to the security level stored in the memory is executed. Security processes include processes of display screen lock, owner indication, and data erase. Thus, in the case where the information device should be lost or stolen, the leakage of data to others can be prevented.Type: GrantFiled: October 3, 1997Date of Patent: November 16, 1999Assignee: Kabushiki Kaisha ToshibaInventor: Mikio Hasebe
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Patent number: 5987632Abstract: A test method for a memory device wherein failures that may only occur under specified worst-case conditions are converted to hard functional failures. These locations are subsequently detected and remapped by built-in self test (BIST) and built-in self-repair (BISR) circuitry. First, a test suite is performed on a memory array which includes redundant row and column locations. Typically, this test suite is performed under conditions which are most likely to induce failure. Row and column locations that are determined to be malfunctioning are scanned out of the memory device, along with the number of available redundant rows and columns. If there are sufficient redundant locations, the failing rows and columns are permanently disabled by blowing each of the corresponding fuse links. When power is subsequently applied to the memory device, BIST will detect rows and columns, including those permanently disabled, with hard functional failures. Accesses to these locations may then be redirected by BISR circuitry.Type: GrantFiled: May 7, 1997Date of Patent: November 16, 1999Assignee: LSI Logic CorporationInventors: V. Swamy Irrinki, Thomas R. Wik
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Patent number: 5983367Abstract: A CPU can selectively execute a normal processing mode and a debugging mode on the basis of a control signal sent from a control unit. A first memory cell array is accessed in the normal processing mode, and a second memory cell array is accessed in the debugging mode. A sense amplifier and a bit line are shared by the first and second memory cell arrays. Consequently, it is possible to relieve an increase in the area of the semiconductor chip caused by existence of the two memory cell arrays. That is, an area of a semiconductor chip is reduced. A spare memory cell array may be provided for compensating for a defective cell of the first memory cell array. A refresh circuit may be provided for refreshing the first and second memory cell arrays.Type: GrantFiled: April 29, 1997Date of Patent: November 9, 1999Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Takashi Higuchi, Naoto Okumura, Hideo Tsubota
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Patent number: 5974569Abstract: Generally, the present invention is a method for identifying whether time-based operations of a computer system operate properly for time intervals over which the computer system operates. Specifically, the present invention is operative to identify the type of failure that occurs. The present invention utilizes test programs and test procedures to determine whether the hardware, BIOS, operating system, and computer language handle time and date calculations correctly. The present invention may identify a time period to be evaluated and divide the time period into a plurality of time intervals. This process accepts a first frequency value that specifies the frequency at which time test modules are to execute the time-based operations of the computer system. A first set of time-based test modules are executed at the frequency specified by the first frequency value in a first time interval.Type: GrantFiled: January 5, 1998Date of Patent: October 26, 1999Inventor: Alfred E. Nickles
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Patent number: 5964886Abstract: A cluster implements a virtual disk system that provides each node of the cluster access to each storage device of the cluster. The virtual disk system provides high availability such that a storage device may be accessed and data access requests are reliably completed even in the presence of a failure. To ensure consistent mapping and file permission data among the nodes, data are stored in a highly available cluster database. Because the cluster database provides consistent data to the nodes even in the presence of a failure, each node will have consistent mapping and file permission data. A cluster transport interface is provided that establishes links between the nodes and manages the links. Messages received by the cluster transports interface are conveyed to the destination node via one or more links. The configuration of a cluster may be modified during operation.Type: GrantFiled: May 12, 1998Date of Patent: October 12, 1999Assignee: Sun Microsystems, Inc.Inventors: Gregory L. Slaughter, Bernard A. Traversat, Robert Herndon, Xiaoyan Zheng
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Patent number: 5964888Abstract: A circuit arrangement for executing a reset, in which controlled resetting of a functional computer and a safety module takes place. A reset stage is able to coerce both the functional computer and the safety module into a reset state, while all output stages are switched off for all reset states. The functional computer and the safety module are connected by a serial interface to continually monitor each other and can mutually reset one another in the case of a fault.Type: GrantFiled: November 7, 1996Date of Patent: October 12, 1999Assignee: Robert Bosch GmbHInventors: Wolfgang Kosak, Reinhard Pfeufer, Guenter Braun, Klaus Mueller
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Patent number: 5958050Abstract: A trust manager examines each new class before it is allowed to execute by examining a policy file which includes data structures defining security policies of the user system, a certificate repository for storing a plurality of certificates, a certificate being a data record which is digitally signed and which certifies claims relevant to a security evaluation, a code examiner adapted to analyze the portion of code to determine potential resource use of the portion of code and a trust evaluator adapted to evaluate certificate requirements of the portion of code based on policy rules extracted from the policy file and the potential resource use specified by the code examiner. The trust evaluator also determines, from certificates from the certificate repository and a code identifier identifying the portion of code, whether execution of the portion of code is allowed by the policy rules given the potential resource use, the code supplier and applicable certificates.Type: GrantFiled: December 26, 1996Date of Patent: September 28, 1999Assignee: Electric CommunitiesInventors: Claire Griffin, Douglas Barnes
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Patent number: 5958063Abstract: A method and system for pre-patching spare capacity into a communications network. The pre-patching system analyzes an original network configuration along with restoration plans that define restoral routes to bypass a network failure. The pre-patching system identifies existing spare connections in the original network configuration that can advantageously be destroyed from the original configuration so that their destroying can be avoided when implementing the restoration plans. The pre-patching system also identifies connections that do not exist in the original configuration and that can advantageously be created in the original network configuration to avoid the overhead of their creation when implementing the restoration plans.Type: GrantFiled: June 30, 1997Date of Patent: September 28, 1999Assignee: MCI Communications CorporationInventors: William D. Croslin, Steven M. Sellers