Patents Examined by Brian J Stevens
  • Patent number: 8432995
    Abstract: In one embodiment, a method includes receiving input data bits over data channels; receiving deskew channel bits constituting frames that each comprise ones of the input data bits; determining frame boundaries; mapping each of the input data bits in each of the frames to one of the data channels; for each set of the frames, comparing the input data bits in the set with the input data bits in the corresponding input data words; determining relative delays among the data channels and the deskew channel; when non-zero delays are determined, rearranging the input data bits to reduce the delays; and when it is determined that one or more of the data channels have a delay of greater than a predetermined number of data-channel clock periods relative to a particular data channel, delaying input data bits in the particular data channel by an additional number of input data bits.
    Type: Grant
    Filed: July 21, 2010
    Date of Patent: April 30, 2013
    Assignee: Fujitsu Limited
    Inventors: Samir Parikh, Nikola Nedovic, William W. Walker
  • Patent number: 8432978
    Abstract: An apparatus and method are provided for arranging tones to isolate signals between base stations (BSs) in a high rate packet data (HRPD) system. Packet data is received from a higher layer and the received packet data is channel-coded and modulated. Guard tones are inserted into symbols of the modulated packet data. Pilot tones are inserted using pilot tone arrangements based on preset pilot tone offsets. The packet data symbols to which the pilot tone arrangements have been applied are spread such that BSs for transmitting different broadcast contents are distinguished from each other. A cyclic prefix (CP) is inserted after performing an inverse Fourier transform on the spread packet data symbols, and the symbols are transmitted.
    Type: Grant
    Filed: November 14, 2005
    Date of Patent: April 30, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Kyu Han, Hwan-Joon Kwon, Dong-Hee Kim, Youn-Sun Kim
  • Patent number: 8432987
    Abstract: An embodiment of an arrangement detects sequences of digitally modulated symbols from multiple sources. The arrangement identifies a suitable set of candidate values for at least one transmitted sequence of symbols and determines for each candidate value a set of sequences of transmitted symbols. The arrangement estimates at least one further set of sequences of transmitted symbols, calculates a metric for each sequence of transmitted symbols, and selects the sequence that maximizes the metric. At the end, a-posteriori bit soft output information for the selected sequence is calculated from the metrics for said sequences. Generally, these calculations are based on the information coming from a channel-state-information matrix and a-priori information on the modulated symbols from a second module, such as a forward error-correction-code (ECC) decoder.
    Type: Grant
    Filed: March 14, 2008
    Date of Patent: April 30, 2013
    Assignee: STMicroelectronics S.R.L.
    Inventors: Massimiliano Siti, Alessandro Tomasoni, Marco Pietro Ferrari, Sandro Bellini, Oscar Volpatti
  • Patent number: 8428100
    Abstract: A method of communicating over a network for wireless communications is disclosed. The method transmits encoded data from a source device to a destination device via a single path up through a plurality of wireless paths using a random frequency hopping tuning pattern for wireless communications, and pseudo-randomly varies dwell times of the frequency hopping tuning pattern over which the data is transmitted. The network uses forward-error correction coding redundancy within a data burst to allow recovery of corrupted data in any partially jammed hop of the transmitted data.
    Type: Grant
    Filed: October 6, 2008
    Date of Patent: April 23, 2013
    Assignee: Honeywell International Inc.
    Inventors: Michael R. Franceschini, Yunjung Yi, Kelly P. Muldoon
  • Patent number: 8428199
    Abstract: A transmitter and/or receiver for performing frequency domain equalization is provided. A transmitter includes a pilot position determination unit for determining positions for inserting pilots in a frequency domain based on frequency spectrums of data, and a pilot insertion unit for inserting the pilots between the frequency spectrums of the data according to the determined positions for inserting the pilots.
    Type: Grant
    Filed: October 6, 2008
    Date of Patent: April 23, 2013
    Assignees: Samsung Electronics Co., Ltd., Postech Academy-Industry Foundation
    Inventors: Dong Sik Kim, Ui Kun Kwon, Gi Hong Im, Chang Yong Shin
  • Patent number: 8428172
    Abstract: A method of transmitting a midamble for channel estimation of multiple antennas performed by a base station in a system having segregated uplink and downlink frequency bands is provided. The method includes transmitting midamble information indicating presence of the midamble within a downlink frame to a user equipment (UE), and transmitting the midamble on a single downlink subframe among at least one downlink subframe included in the downlink frame or on a common zone to the UE by using the multiple antennas. A scheduling overhead of a base station and other overheads can be reduced by decreasing the number of transmissions of a midamble on one downlink frame, and thus limited radio resources can be effectively used.
    Type: Grant
    Filed: April 3, 2009
    Date of Patent: April 23, 2013
    Assignee: LG Electronics Inc.
    Inventors: Jin Young Chun, Hyun Soo Ko, Moon Il Lee, Bin Chul Ihm, Wook Bong Lee
  • Patent number: 8422586
    Abstract: Methods and apparatus for serial channel operation are disclosed. An N+1-level signaling scheme is used to transmit N staggered but overlapping NRZ sub-sequences concurrently on a serial channel. Each sequence has a bit rate R and an essential bandwidth of R Hz. The combined bit rate of the channel is N×R, but due to a lack of correlation between the sub-sequences, the essential bandwidth remains approximately R Hz. The signaling scheme also contains redundancy that allows some errors to be detected and/or corrected. Other embodiments are also described and claimed.
    Type: Grant
    Filed: February 20, 2012
    Date of Patent: April 16, 2013
    Assignee: Force10 Networks, Inc.
    Inventors: Yi Zheng, Joel R. Goergen
  • Patent number: 8416874
    Abstract: A block of information is processed before transmission thereof in a block transmission based communication. This comprises inserting a cyclic prefix and a cyclic suffix into the block of information before applying a time reversal based prefilter prior to transmission to the data after cyclic prefix and cyclic suffix insertion, the prefilter being configured on the basis of knowledge of the condition of the channel over which communication is to be effected. Then, at the receiver, a removal operation is operable to remove the effect of cyclic prefix and suffix insertion, leaving a circulant shifted version of the original block. This can be decoded using a diagonal matrix containing frequency domain channel coefficients on its diagonal entries after FFT. For systems with more than two transmit antennas, this facilities the use of full rate OSTBC, regardless of whether real or complex signaling is transmitted.
    Type: Grant
    Filed: September 14, 2009
    Date of Patent: April 9, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yue Wang, Justin Coon
  • Patent number: 8416897
    Abstract: An apparatus for reducing power consumption of a receiver in a high-speed wireless communication system and a control method thereof are provided. The apparatus for processing a signal in a receiver of a wireless communication system includes a carrier sensor configured to sense a carrier used in the wireless communication system, a decoder configured to decode the detected carrier signal to a signal and data, and a controller configured to control supplying power and a clock only to the carrier sensor during carrier sensing, and supplying power and a clock to an overall receiver when a carrier is sensed.
    Type: Grant
    Filed: September 16, 2009
    Date of Patent: April 9, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Il-Gu Lee, Hyun-Gu Park, Je-Hun Lee, Sok-Kyu Lee
  • Patent number: 8411782
    Abstract: In one embodiment, a method includes receiving input data bits at a collective data rate, the input data bits being grouped into a plurality of input data words, the input data bits of each of the input data words being received from n parallel input-data-bit streams, each of the n parallel input-data-bit streams having a stream data rate that is 1/n of the collective data rate, each of the input data words comprising n consecutive ones of the input data bits; selecting particular input data bits; and generating a k-bit deskew channel with the selected input data bits, the deskew channel comprising a number of frames, each of the frames comprising x input data bits from one or more input data words and one or more framing bits. In another embodiment, a method includes using such a deskew channel to determine relative delays between data channels and the deskew channel.
    Type: Grant
    Filed: July 29, 2009
    Date of Patent: April 2, 2013
    Assignee: Fujitsu Limited
    Inventors: Samir Parikh, William W. Walker, Nestor Tzartzanis
  • Patent number: 8401132
    Abstract: A communications receiver includes a noise analyzer to characterize the composition of the interference and/or distortion impressed onto a transmitted communications signal in the presence of one or more time-varying conditions. The noise analyzer may provide a selection signal indicating the composition of the interference and/or distortion impressed onto a transmitted communications signal in the presence of one or more time-varying conditions to be used by the communications receiver. In an exemplary embodiment, the communications receiver selects at least one set of filter coefficients to compensate for the interference and/or distortion impressed onto a transmitted communications signal in the presence of a particular time-varying interference and/or distortion condition.
    Type: Grant
    Filed: October 7, 2010
    Date of Patent: March 19, 2013
    Assignee: Broadcom Corporation
    Inventors: Thomas Joseph Kolze, Bruce J. Currivan
  • Patent number: 8396156
    Abstract: A method for transmitting a control channel information to perform an adaptive coding and modulation comprising performing error correction coding at a predetermined coding rate for the control channel information; modulating according to a predetermined modulation scheme and transmitting the error correction coded control channel information; and further, prior to the modulation, performing code decimation or code repetition of the error correction coded signal, according to whether or not Multi Input Multi Output is applied.
    Type: Grant
    Filed: May 10, 2010
    Date of Patent: March 12, 2013
    Assignee: Fujitsu Limited
    Inventors: Kazuhisa Obuchi, Hideto Furukawa, Kazuo Kawabata, Yoshiharu Tajima, Yoshihiro Kawasaki
  • Patent number: 8391417
    Abstract: Apparatus and methods are provided for calibrating and operating a receiver circuit. An exemplary method comprises the steps of applying a first voltage offset to a first input of an amplifier circuit, generating an output signal at an output of the amplifier circuit based on the first voltage offset and a second voltage offset at a second input of the amplifier circuit, adjusting the second voltage offset based on the output signal, and maintaining the second voltage offset at a constant voltage when the output signal is indicative of the second voltage offset cancelling the first voltage offset.
    Type: Grant
    Filed: October 6, 2010
    Date of Patent: March 5, 2013
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Gladney Asada, Jeffrey Cooper
  • Patent number: 8391412
    Abstract: A method and system is disclosed for shifting the phase of a PN long code for access attempts by an access terminal in a wireless communication network. An access terminal may seek to acquire access from a base station that is detected by the access terminal above a threshold power level, even if the access terminal is further away from the base station than a threshold distance beyond which access is not normally granted. According to one embodiment, the access terminal will, upon determining that it is beyond the threshold distance, embed in an access request message an apparent distance that is smaller than the threshold distance, by phase-shifting a timing signal and encoding the access request message with the phase-shifted timing signal. The access terminal will then transmit the access request message on an air interface communication link to the base station.
    Type: Grant
    Filed: July 17, 2009
    Date of Patent: March 5, 2013
    Assignee: Sprint Spectrum L.P.
    Inventors: Siddharth S. Oroskar, Sachin R. Vargantwar, Deveshkumar Rai, Bhagwan Khanka, Manoj Shetty
  • Patent number: 8391342
    Abstract: A mobile wireless communications device may include an antenna, and a transceiver coupled to the antenna. The transceiver may use a modulation having memory for a message in a frame structure including a data portion and a termination portion based upon the data portion. The termination portion may drive the modulation to a desired known ending state. The modulation may include a spread spectrum modulation or a non-spread modulation.
    Type: Grant
    Filed: October 7, 2008
    Date of Patent: March 5, 2013
    Assignee: Harris Corporation
    Inventors: John W. Nieto, James A. Norris
  • Patent number: 8391415
    Abstract: An electronic device comprises a number of sub-systems coupled via an interface. One of the number of sub-systems comprises logic for receiving a frame of input data having a plurality of phases on respective data paths. The electronic device further comprises logic for performing cross correlation on the received input data with a pre-determined bit pattern, operably coupled to selection logic, for selecting a single phase from the plurality of phases sent to the interface to sample the received input data in a middle region of a data bit period in response to the cross correlation.
    Type: Grant
    Filed: January 9, 2007
    Date of Patent: March 5, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Paul Kelleher, Diarmuid McSwiney, Conor O'Keeffe
  • Patent number: 8391419
    Abstract: An output clock recovery circuit (10) for recovering an output clock (14) from a source clock (12) and time stamp information (18A, 18B) includes a time stamp translator (22) and a phase-locked loop circuit (17) including a fraction processor (34). The time stamp translator (22) receives the time stamp information (18A, 18B) and uses an algorithm that translates the time stamp information (18A, 18B) into a time stamp decimal component (48) and a time stamp integer component (50). The time stamp decimal component (48) is less than one and is processed by the fraction processor (34). The time stamp integer component (50) is maintained within a predetermined range of integers that are greater than zero. The output of the fraction processor (34) and the time stamp integer component (50) can be input into a feedback divider (36) of a feedback loop of the phase-locked loop circuit (17) to recover the output clock (14).
    Type: Grant
    Filed: March 17, 2008
    Date of Patent: March 5, 2013
    Assignee: Synaptics, Inc.
    Inventors: Jonathan Ku, Sen-Jung Wei
  • Patent number: 8391343
    Abstract: A high data rate transceiver for processing high data rate serial data includes circuitry for recovering a clock based on the high data rate input data stream. The transceiver includes a coarse loop of a phase-locked loop that selectively provides a clock having accuracy that is within a specified amount. In a sample mode of operation, only the coarse loop PLL is coupled to provide an error signal from which an oscillation signal and clock may be derived. In a second mode (lock) of operation, the transceiver may lock to the received serial data stream by coupling the fine loop PLL to provide an adjusted error signal. In a third mode of operation, (automatic) the transceiver initially performs coarse loop calibration by de-coupling the fine loop PLL and coupling the coarse loop PLL until a steady state has been reached.
    Type: Grant
    Filed: October 7, 2008
    Date of Patent: March 5, 2013
    Assignee: Xilinx, Inc.
    Inventors: Jerry Chuang, William C. Black, Scott A. Irwin
  • Patent number: 8391409
    Abstract: Methods and apparatus are disclosed for applying successive multi-rank beamforming strategies (e.g., successive precoding strategies) for the design of precoders over a set of parallel channels. Successive beamforming is applied to a narrow band channel model and is also applied for finer quantization of a single beamforming vector (e.g., recursive beamforming). A first embodiment provides the optimal approach with high complexity. An alternative embodiment provides successive beamforming for near optimal precoding selection with medium complexity. A low complexity method for precoder selection is also provided wherein a channel representative matrix for the set of parallel channels is determined and successive beamforming on the calculated channel representative is applied.
    Type: Grant
    Filed: November 16, 2011
    Date of Patent: March 5, 2013
    Assignee: NEC Laboratories America, Inc.
    Inventor: Mohammad Ali Khojastepour
  • Patent number: 8385472
    Abstract: An overhead processor for data transmission in digital communications, where a state machine, including a logic element and a flip-flop, is able to process a “previous” data state and a “next” data state simultaneously by storing the previous state in an external elastic storage element until the next state arrives along the datapath. By employing flip-flops on the path from the logic element to the elastic store and on the path from the elastic store to the logic element, data is transmitted faster, resulting in the ability for both the previous data state and the next data state to be transmitted simultaneously, in one clock cycle, requiring half of the transmission time required by prior art.
    Type: Grant
    Filed: April 11, 2011
    Date of Patent: February 26, 2013
    Assignee: Altera Canada Co.
    Inventor: Wally Haas