Patents Examined by Bryan R Junge
  • Patent number: 11678474
    Abstract: A semiconductor device includes first, second, third, fourth, and fifth active regions each extending lengthwise along a first direction, wherein the first, second, third, and fourth active regions comprise channel regions and source/drain (S/D) regions of first, second, third, and fourth transistors respectively, and the fifth active region comprises channel regions and S/D regions of fifth and sixth transistors; and first, second, third, fourth, fifth, and sixth gates each extending lengthwise along a second direction perpendicular to the first direction, wherein the first through sixth gates are configured to engage the channel regions of the first through sixth transistors respectively, wherein the first, second, and fifth gates are electrically connected, and wherein one of the S/D regions of the first transistor, one of the S/D regions of the second transistor, the third gate, and the fourth gate are electrically connected.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: June 13, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Kuo-Hsiu Hsu, Yu-Kuan Lin, Feng-Ming Chang, Lien Jung Hung, Ping-Wei Wang
  • Patent number: 11672137
    Abstract: An electroluminescent display device includes a substrate having a first sub pixel and a second sub pixel, an auxiliary layer provided on the substrate, wherein the auxiliary layer includes a first auxiliary layer configured to surround the periphery of the first sub pixel, and a second auxiliary layer configured to surround the periphery of the second sub pixel, a first electrode provided in each of the first sub pixel and the second sub pixel, an emission layer provided on the first electrode, and a second electrode provided on the emission layer, wherein the first electrode provided in the first sub pixel is connected with the first auxiliary layer, and the first electrode provided in the second sub pixel is connected with the second auxiliary layer.
    Type: Grant
    Filed: December 24, 2020
    Date of Patent: June 6, 2023
    Assignee: LG Display Co., Ltd.
    Inventors: Sungbin Shim, Suhyeon Kim
  • Patent number: 11659741
    Abstract: A display panel and a display device are provided. A display area of the display panel includes an optical component area and a regular display area, and the optical component area and the regular display area both include light-emitting devices, so that the area of the display area becomes larger to meet the trend of full screen display. In the optical component area, a transparent conductive layer includes paired first and second etching slots, a connection wire arranged between the paired first and second etching slots, and an auxiliary layer arranged outside the paired first and second etching slots.
    Type: Grant
    Filed: November 25, 2020
    Date of Patent: May 23, 2023
    Assignee: WUHAN TIANMA MICRO-ELECTRONICS CO., LTD.
    Inventors: Yangzhao Ma, Zhiqiang Xia
  • Patent number: 11652186
    Abstract: Methods and devices for an avalanche photo-transistor. In one aspect, an avalanche photo-transistor includes a detection region configured to absorb light incident on a first surface of the detection region and generate one or more charge carriers in response, a first terminal in electrical contact with the detection region and configured to bias the detection region, an interim doping region, a second terminal in electrical contact with the interim doping region and configured to bias the interim doping region, a multiplication region configured to receive the one or more charge carriers flowing from the interim doping region and generate one or more additional charge carriers in response, a third terminal in electrical contact with the multiplication region and configured to bias the multiplication region, wherein the interim doping region is located in between the detection region and the multiplication region.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: May 16, 2023
    Assignee: Artilux, Inc.
    Inventor: Yun-Chung Na
  • Patent number: 11647653
    Abstract: An OLED display panel comprises a plurality of concave-convex structures in each sub-pixel, and a light-emitting layer conformal to the concave-convex structure. The number of the concave-convex structures in each pixel varies depending upon the distance from center to peripheral of the OLED display panel, to compensate brightness variations caused by voltage drops and improve white balance of display image.
    Type: Grant
    Filed: January 4, 2021
    Date of Patent: May 9, 2023
    Assignee: SeeYA Optronics Co., Ltd.
    Inventor: Zhongshou Huang
  • Patent number: 11640963
    Abstract: The present application provides a display panel and a display device. The display panel comprises: a base substrate; an insulating layer arranged on the base substrate, the insulating layer being provided with recesses spaced from each other; metal lines arranged on one side of the insulating layer away from the base substrate, portions of the metal lines corresponding to the recesses being located in the recesses, the metal lines having a corrugated longitudinal cross-section in an extending direction of the metal lines to reduce a risk of the metal lines breaking during bending and improve flexibility of the display panel.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: May 2, 2023
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Youshan Chen, Feng Zhang
  • Patent number: 11637169
    Abstract: A light emitting display apparatus includes a substrate including a display portion, a plurality of pixels disposed in the display portion, a common electrode disposed in the display portion and electrically connected to each of the plurality of pixels, a pixel common voltage line disposed in the display portion and electrically connected to the common electrode, a pad part disposed at one edge portion of the substrate, the pad part including a pixel common voltage pad connected to the pixel common voltage line, and at least one closed loop line disposed at an edge portion of the substrate to surround the display portion, wherein the at least one closed loop line is electrically connected to the pixel common voltage pad.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: April 25, 2023
    Assignee: LG DISPLAY CO., LTD.
    Inventors: YoungIn Jang, KyungMin Kim, HyunDong Kim
  • Patent number: 11616054
    Abstract: A semiconductor structure is disclosed, including a first gate and a second gate aligned with the first gate, a first gate via, a second gate via, multiple conductive segments, and a first conductive line. The first gate via is disposed on the first gate and the second gate via is disposed on the second gate. The first and second gates are configured to be a terminal of a first logic circuit, which is coupled to a terminal of a second logic circuit. The first conductive line is coupled to the first gate through a first connection via and the first gate via and is electrically coupled to the second gate through a second connection via and the second gate via.
    Type: Grant
    Filed: May 8, 2020
    Date of Patent: March 28, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kam-Tou Sio, Sang-Chi Huang
  • Patent number: 11600538
    Abstract: A SiC epitaxial wafer according to an embodiment includes: a SiC substrate; and a SiC epitaxial layer formed on a first surface of the SiC substrate. The in-plane uniformity of a density of Z1/2 centers of the SiC epitaxial layer is 5% or less.
    Type: Grant
    Filed: November 24, 2021
    Date of Patent: March 7, 2023
    Assignee: SHOWA DENKO K.K.
    Inventors: Naoto Ishibashi, Koichi Murata, Hidekazu Tsuchida
  • Patent number: 11588122
    Abstract: A flexible display device including: a display substrate having a display area and a peripheral area surrounding the display area; a plurality of pixels formed in the display area; a passivation layer covering the pixels from the top to protect the pixels; a polarization film layer provided at the top of the passivation layer and of which an edge is extended outside an edge of the passivation layer; and a film wiring made of a flexible material of which one end is connected to the peripheral area.
    Type: Grant
    Filed: August 6, 2020
    Date of Patent: February 21, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jong-Ryuk Park, Hyun-Been Hwang, Sang Hun Oh, Keun Soo Lee, Sun Youl Lee, Gyoo Chui Jo
  • Patent number: 11569287
    Abstract: The present technique relates to a semiconductor device and an electronic appliance in which the reliability of the fine transistor can be maintained while the signal output characteristic is improved in a device formed by stacking semiconductor substrates.
    Type: Grant
    Filed: September 9, 2019
    Date of Patent: January 31, 2023
    Assignee: SONY CORPORATION
    Inventors: Koichi Baba, Takashi Kubodera, Toshihiko Miyazaki, Hiroaki Ammo
  • Patent number: 11527710
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a magnetic tunneling junction (MTJ) on a substrate and a top electrode on the MTJ; forming a first inter-metal dielectric (IMD) layer around the MTJ and the top electrode; forming a stop layer on the first IMD layer; forming a second IMD layer on the stop layer; performing a first etching process to remove the second IMD layer and the stop layer; performing a second etching process to remove part of the top electrode; and forming a metal interconnection to connect to the top electrode.
    Type: Grant
    Filed: August 1, 2019
    Date of Patent: December 13, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Pei-Jou Lee, Kun-Chen Ho, Hsuan-Hsu Chen, Chun-Lung Chen
  • Patent number: 11508760
    Abstract: An active matrix substrate includes a plurality of first contact holes extending through an inorganic insulating film, a first protection layer that is a silicon nitride film, and a second protection layer, a plurality of second contact holes extending through the inorganic insulating film and the second protection layer, a first transistor, and a second transistor. A channel region of the second transistor does not overlap the first protection layer.
    Type: Grant
    Filed: March 15, 2018
    Date of Patent: November 22, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Masahiko Miwa, Yohsuke Kanzaki, Takao Saitoh, Masaki Yamanaka, Yi Sun, Seiji Kaneko
  • Patent number: 11488987
    Abstract: The disclosure relates to the technical field of display devices and discloses a display substrate, a splicing screen and a manufacturing method thereof. The display substrate includes a flexible substrate; a plurality of signal lines located at one side of the flexible substrate; a plurality of plating electrodes located at one side of the signal lines toward the flexible substrate and electrically connected to the signal lines in one-to-one correspondence; a plurality of first through holes in one-to-one correspondence to the plating electrodes and penetrating the flexible substrate and exposing the plating electrodes, the first through roles being filled with a conductive material inside; and a plurality of binding electrodes located at one side of the flexible substrate away from the signal lines and in one-to-one correspondence to the first through holes, the binding electrodes being electrically connected to corresponding plating electrode through conductive material in corresponding first through hole.
    Type: Grant
    Filed: October 8, 2019
    Date of Patent: November 1, 2022
    Assignee: Beijing BOE Technology Development Co., Ltd.
    Inventors: Yingwei Liu, Shuang Liang, Zhiwei Liang, Muxin Di, Ke Wang, Zhanfeng Cao
  • Patent number: 11469283
    Abstract: A display device is provided. The display device includes a substrate, a first active layer of a first transistor and a second active layer of a second transistor which are disposed on the substrate, a first gate insulating layer disposed on the first active layer, an oxide layer disposed on the first gate insulating layer and including an oxide semiconductor, a first gate electrode disposed on the oxide layer, a second gate insulating layer disposed on the first gate electrode and the second active layer, and a second gate electrode which overlaps the second active layer in a thickness direction of the substrate and is disposed on the second gate insulating layer, where the oxide layer overlaps the first active layer and does not overlap the second active layer in the thickness direction.
    Type: Grant
    Filed: November 19, 2020
    Date of Patent: October 11, 2022
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Myoung Hwa Kim, Joon Seok Park, Tae Sang Kim, Yeon Keon Moon, Geun Chul Park, Sang Woo Sohn, Jun Hyung Lim, Hye Lim Choi
  • Patent number: 11417686
    Abstract: The present disclosure relates to a display substrate. The display substrate may include a substrate, a first lower gate electrode, an insulation pattern, a first insulation layer, and a first active pattern. The first lower gate electrode may be disposed on the substrate. The insulation pattern may be disposed on and patterned to correspond to the first lower gate electrode and may include a silicon nitride. The first insulation layer may be disposed on the insulation pattern and may include a silicon oxide. The first active pattern may be on the first insulation layer and formed of oxide semiconductor and may include a first channel region overlapping the first lower gate electrode and a first wiring region disposed on a side of the first channel region.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: August 16, 2022
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Se Myung Kwon, Duk Young Kim, Young Kuk Kim, Cheol Su Kim, Yu Ri Oh
  • Patent number: 11409172
    Abstract: A display device includes a base layer, a display element disposed on the base layer, and a signal line disposed on the base layer and electrically connected to the display element. The signal line includes a conductive layer and a capping layer. The capping layer is disposed on the conductive layer and includes vanadium nitride (VN) and zinc oxide (ZnO). The display device may reduce the reflection of an external light source, thereby having improved visibility.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: August 9, 2022
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Gyungmin Baek, Sangwon Shin, Hyuneok Shin, Juhyun Lee, Hongsick Park
  • Patent number: 11404414
    Abstract: An integrated device that includes a substrate, a first transistor located over the substrate, where the first transistor includes a gate. The integrated device includes a first gate contact coupled to the gate of the first transistor, where the first gate contact is configured to be electrically coupled to an interconnect of the integrated device. The integrated device includes a second gate contact coupled to the gate, where the second gate contact is directly electrically coupled to only the gate.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: August 2, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Haining Yang, Xia Li, Bin Yang
  • Patent number: 11387303
    Abstract: A display panel and a display device are provided. The display panel includes: a substrate, the substrate includes a plurality of pixel areas; a functional device layer, the functional device layer is disposed on the substrate; a plurality of via holes, the via holes are positioned on the functional device layer, and each of the via holes corresponds to one said first area; an organic layer, the organic layer is disposed on the functional device layer, and a portion of the organic layer extends into the via holes; a plurality of light emitting units; wherein, the via holes are positioned along an edge of a second area.
    Type: Grant
    Filed: June 12, 2020
    Date of Patent: July 12, 2022
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventor: Jinrong Zhao
  • Patent number: 11380717
    Abstract: An array substrate includes a base substrate, at least one inorganic film layer, and at least one organic soft film layer. The organic soft film layer is disposed on a side of the inorganic film layer adjacent to the base substrate, and a side surface of the organic soft film layer adjacent to the inorganic film layer has a wavy shape. By using the inorganic film layer to generate a compressive stress on the organic soft film layer, the organic soft film layer is wavy, and the inorganic film layer is also wavy, which reduces the stress concentration of the panel when bending, and improves the bending performance of the flexible display panel.
    Type: Grant
    Filed: October 14, 2019
    Date of Patent: July 5, 2022
    Assignee: Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventors: Rui Lu, Yijia Wang