Patents Examined by Carl J. Arbes
  • Patent number: 7302757
    Abstract: An improved Land Grid Array interconnect structure is provided with the use of small metal bumps on the substrate electrical contact pad. The bumps interlock with segments of the fuzz button connection and increase the physical contact surface area between the contact pad and fuss button. The improved contact reduces displacement of electrical contact points due to thermo-mechanical stress and lowers the required actuation force during assembly.
    Type: Grant
    Filed: August 16, 2005
    Date of Patent: December 4, 2007
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey A. Brody, Hsichang Liu, Hai Pham Longworth, James C. Monaco, Gerard J. Nuzback, Wei Zou
  • Patent number: 7299543
    Abstract: A multiple connector compression tool for use with multiple sized connectors and a cable is disclosed. The tool is designed to receive at least two different connector configurations. The tool does not require using adaptors which may be lost or misplaced. The tool has a long life because there are very few wear items while maintaining the ability to produce different connectors.
    Type: Grant
    Filed: December 13, 2005
    Date of Patent: November 27, 2007
    Assignee: John Mezzalingua Associates, Inc.
    Inventor: Noah P. Montena
  • Patent number: 7299550
    Abstract: In addition to the single molded part incorporating features of the conventional nut, sealing member and body, the connector includes a post and a hollow compression sealing ring. The post includes an integrally formed stem and flange portions, with the compression ring axially movable upon the body and including a tapered surface which applies a radially inward force to the body, compressing the cable and providing tight frictional engagement of the connector and cable. When in its fully installed position, the axial length of the ring is sufficient to entirely enclose the unitary body and nut, preferably having an interference fit with the outer surface of the nut portion, thus locking and sealing the connector threads to the equipment port. The compression ring is preferably of metal to shield the internal plastic parts of the connector from UV rays.
    Type: Grant
    Filed: September 2, 2005
    Date of Patent: November 27, 2007
    Assignee: John Mezzalingua Associates, Inc.
    Inventor: Noah Montena
  • Patent number: 7299542
    Abstract: A multiple connector compression tool for use with multiple sized connectors and a cable is disclosed. The tool is designed to receive at least two different connector configurations. The tool does not require using adaptors which may be lost or misplaced. The tool has a long life because there are very few wear items while maintaining the ability to produce different connectors.
    Type: Grant
    Filed: December 13, 2005
    Date of Patent: November 27, 2007
    Assignee: John Mezzalingua Associates, Inc.
    Inventor: Noah P. Montena
  • Patent number: 7299546
    Abstract: An electronic module and a method for manufacturing an electronic module, in which an installation base is used, which includes an insulating-material layer (1) and a conductive layer on the surface of the insulating-material layer. The conductive layer also covers the installation cavity of a component (6). The component (6) is set in the installation cavity, in such a way that the contact zones face towards the conductive layer and electrical contacts are formed between the contact zones of the component (6) and the conductive layer. After this, conductive patterns (14) are formed from the conductive layer, to which the to which the component (6) is attached.
    Type: Grant
    Filed: February 25, 2004
    Date of Patent: November 27, 2007
    Assignee: Imbera Electronics OY
    Inventors: Risto Tuominen, Petteri Palm
  • Patent number: 7296344
    Abstract: Apparatus for mounting components, even if the components have narrow inter-component distances, without producing any interference between already mounted components and suction nozzles or components being suction-held by the suction nozzles. The component mounting apparatus for picking up electronic components supplied from a component supply section by suction nozzles attached to a mounting head and mounting electronic components on a printed circuit board, includes a control section containing information relating to components to be mounted and controlling, based on this information, the positions of the suction nozzle, the mounting head and the printed circuit board so that components to be mounted are mounted in ascending order of height.
    Type: Grant
    Filed: March 10, 2004
    Date of Patent: November 20, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Ken Takano, Muneyoshi Fujiwara, Seiichi Mogi, Kurayasu Hamasaki
  • Patent number: 7296346
    Abstract: The present invention relates generally to a plating buss design and method for minimizing short circuit problems in PCB panel singulation. More particularly, the invention encompasses a serpentine plating buss which increases the PCB singulation process window thereby minimizing short circuit problems due to indexing errors caused by occasional manufacturing and equipment alignment problems. The serpentine plating buss design therefore increases board yield.
    Type: Grant
    Filed: July 25, 2006
    Date of Patent: November 20, 2007
    Assignee: Micron Technology, Inc.
    Inventor: Mark S. Johnson
  • Patent number: 7293355
    Abstract: Apparatus and method for making circuitized substrates using a continuous roll format in which layers of conductor and dielectric are fed into the apparatus, bonded, and passed on to other nearby work stations in which various processes such as hole formation, circuitization and, finally, segmentation occur. The resulting substrates can then be individually bonded to other, like substrates to form a larger multi-layered substrate with a plurality of conductive thru-holes, conductive and dielectric layers as part thereof.
    Type: Grant
    Filed: April 21, 2005
    Date of Patent: November 13, 2007
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: John M. Lauffer, Voya R. Markovich, James W. Orband, William E. Wilson
  • Patent number: 7293343
    Abstract: A method of manufacturing a superconducting wire is provided. The method is provided with the steps of filling a raw material powder in a metal pipe, the raw material powder being composed of an oxide superconductor or a precursor to become an oxide superconductor through heat treatment; heating the metal pipe filled with the above-described raw material powder to 400° C. or more and 800° C. or less; depressurizing the inside of the above-described heated metal pipe to 100 Pa or less; sealing an opening at an end portion of the metal pipe under the above-described depressurized condition; and subjecting the sealed metal pipe containing the above-described raw material powder to wire drawing, wherein the packing density of the above-described raw material powder is controlled at 10 percent or more and 40 percent or less and, thereby, the degasification of the inside of the metal pipe is adequately performed, so that the critical current density can be increased.
    Type: Grant
    Filed: July 30, 2003
    Date of Patent: November 13, 2007
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Naoki Ayai
  • Patent number: 7293356
    Abstract: The present invention relates to a method of fabricating a printed circuit board having embedded multi-layer passive devices, and particularly, to a method of fabricating a printed circuit board having an embedded multi-layer capacitor, in which a capacitor is formed to have multiple layers in the PCB to increase capacitance.
    Type: Grant
    Filed: January 3, 2006
    Date of Patent: November 13, 2007
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Seung Hyun Sohn, Yul Kyo Chung, Hyun Ju Jin, Eun Tae Park
  • Patent number: 7290332
    Abstract: According to one aspect of the present invention, a method of constructing an interposer is provided. A conductive layer is formed on a nonconductive layer. The conductive layer has via portions, non-via portions, and first and second opposing surfaces. The first surface of the conductive layer is adjacent to the nonconductive layer. Portions of the nonconductive layer are removed to expose portions of the first surface of the conductive layer. Conductive pads are formed on the exposed portions of the first surface and the second surface of the conductive layer. The non-via portions of the conductive layer are removed to form a plurality of electrically separated conductors. Each conductor includes at least two conductive pads and a via portion of the conductive layer.
    Type: Grant
    Filed: August 31, 2004
    Date of Patent: November 6, 2007
    Assignee: Exatron, Inc.
    Inventor: Robert P. Howell
  • Patent number: 7290336
    Abstract: A circuit provides energy to a plurality of piezoelectric diaphragm structures formed in a two-dimensional array. Each piezoelectric diaphragm structure includes a piezoelectric element in operational contact with at least a first side electrode and a second side electrode. A switching system includes a first connection for a first power source, for application of power to the first side electrode and a second connection for a second power source, for application of power to the second side electrode. In a first state, power appropriate for performing a poling operation of the piezoelectric material is available for application to the first electrode, and the second electrode, and in a second state, power appropriate to activate the piezoelectric material to cause operational movement of the poled piezoelectric diaphragm structure is available for application to the first electrode and the second electrode.
    Type: Grant
    Filed: April 13, 2005
    Date of Patent: November 6, 2007
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Steven A. Buhler, John S. Fitch, Meng H. Lean, Karl A. Littau
  • Patent number: 7290331
    Abstract: In a component mounting apparatus in which integrated components having a chip-on-chip structure are formed by mounting upper chips on lower chips. The lower chips picked up from a component carrying-in unit by a component carrying-in head are placed on a mounting stage, and the upper chips picked up from a second component tray by a component transporting head are vertically flipped around a rotation axis and transferred to a mounting head at a component transferring position, then the upper chips held by the mounting head are descended and mounted by solder bonding on the lower chips held by the mounting stage at a component mounting position. Integrated components formed by mounting are carried out of the mounting stage by the component transporting head and stored in a first component tray in a component storing unit.
    Type: Grant
    Filed: June 27, 2006
    Date of Patent: November 6, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shunji Onobori, Shozo Minamitani, Shuichi Hirata, Tomoaki Nakanishi
  • Patent number: 7290326
    Abstract: A method and apparatus for producing high layer count, multi-layer circuits which includes fabricating a fixture having an opening therein for placement within a press. A material stack, particularly a material stack having multiple layers of liquid crystalline polymer, is placed within the opening of the fixture before activating the press to laminate the material stack positioned within the fixture.
    Type: Grant
    Filed: July 22, 2005
    Date of Patent: November 6, 2007
    Assignee: Dynaco Corp.
    Inventor: Steven Lee Dutton
  • Patent number: 7290329
    Abstract: A cable includes a conductor having an insulation layer wrapped substantially about the conductor. A foamable polymer layer is applied substantially about the insulation layer. A cross-section of the foamable polymer layer has a substantially uneven outer surface. An armor shell is applied exterior to the foamable polymer layer. The armor shell is substantially concentric to the conductor.
    Type: Grant
    Filed: November 29, 2006
    Date of Patent: November 6, 2007
    Assignee: Rockbestos Surprenent Cable Corp.
    Inventor: Scott Magner
  • Patent number: 7287319
    Abstract: An electrotransport reservoir housing which contains, integrally formed therein, at least one region of conductive material which allows for a liquid and moisture tight barrier, while at the same time providing a means for conducting an electric current therethrough.
    Type: Grant
    Filed: April 7, 2005
    Date of Patent: October 30, 2007
    Assignee: ALZA Corporation
    Inventors: Wendy A. Young, Lothar W. Kleiner
  • Patent number: 7287322
    Abstract: A method of forming an interconnection, including a spring contact element, by lithographic techniques. In one embodiment, the method includes applying a masking material over a first portion of a substrate, the masking material having an opening which will define a first portion of a spring structure, depositing a structure material (e.g., conductive material) in the opening, and overfilling the opening with the structure material, removing a portion of the structure material, and removing a first portion of the masking material. In this embodiment, at least a portion of the first portion of the spring structure is freed of masking material. In one aspect of the invention, the method includes planarizing the masking material layer and structure material to remove a portion of the structure material. In another aspect, the spring structure formed includes one of a post portion, a beam portion, and a tip structure portion.
    Type: Grant
    Filed: September 2, 2004
    Date of Patent: October 30, 2007
    Assignee: FormFactor, Inc.
    Inventors: Gaetan L. Mathieu, Benjamin N. Eldridge, Gary W. Grube
  • Patent number: 7287318
    Abstract: A biosensor is provided that comprises a plate element with a pre-determined reaction zone and a recess positioned adjacent to the reaction zone. The biosensor also comprises a reagent that is positioned on the reaction zone. In preferred embodiments, the recess circumscribes at least a portion of the reaction zone.
    Type: Grant
    Filed: November 7, 2003
    Date of Patent: October 30, 2007
    Assignee: Roche Diagnostics Operations, Inc.
    Inventors: Raghbir S. Bhullar, Christopher D. Wilsey, Brian S. Hill
  • Patent number: 7287324
    Abstract: Disclosed is a method, system, and article of manufacture for a one-pass approach for implementing metal-fill for an integrated circuit. Also disclosed is a method, system, and article of manufacture for implementing metal-fill that is coupled to a tie-off connection. An approach that is disclosed comprises a method, system, and article of manufacture for implementing metal-fill having an elongated shape that corresponds to the length of whitespace. Also disclosed is the aspect of implementing metal-fill that matches the routing direction. Yet another disclosure is an implementation of a place & route tool incorporating an integrated metal-fill mechanism.
    Type: Grant
    Filed: November 19, 2002
    Date of Patent: October 30, 2007
    Assignee: Cadence Design Systems, Inc.
    Inventors: Thanh Vuong, William H. Kao, David C. Noice
  • Patent number: 7284320
    Abstract: A multilayer printed wiring board having a wiring lead-out port has a signal circuit conductor perfectly covered by an earth circuit in its inside and a wiring lead-out port. A signal circuit conductor having a branch pattern is preferable. A large number of products can be easily manufactured with good size reproducibility. The multilayer printed wiring board is manufactured by selectively etching the copper of a cladding sheet manufactured by bonding a copper foil to a nickel foil with 0.1-3% reduction and forming a signal circuit conductor covered by an earth circuit and the wiring lead-out port.
    Type: Grant
    Filed: May 3, 2005
    Date of Patent: October 23, 2007
    Assignee: Toyo Kohan Co., Ltd.
    Inventors: Kinji Saijo, Kazuo Yoshida, Hiroaki Okamoto, Shinji Ohsawa