Patents Examined by Chameli Das
  • Patent number: 10691430
    Abstract: An apparatus to facilitate instruction scheduling is disclosed. The apparatus includes one or more processors to receive a block of instructions, divide the block of instructions into a plurality of sub-blocks based on a register pressure bounded by a predetermined threshold and instructions in each of the plurality of sub-blocks for processing.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: June 23, 2020
    Assignee: Intel Corporation
    Inventors: Wei Pan, Wei-Yu Chen, Guei-Yuan Lueh
  • Patent number: 10678518
    Abstract: A solution providing for the dynamic design, use, and modification of models using a declarative software application meta-model that provides for self-modification of a collection of the models is provided. The solution can enable continuous real-time testing, simulation, deployment, and modification of the collection of the models. A model in the collection of the models can represent an entity or a function and can be included in a set of related models. Additionally, a set of related models can include a plurality of sets of related models. The collection of the models can represent, for example, one or more software applications, processes, and/or the like.
    Type: Grant
    Filed: January 8, 2019
    Date of Patent: June 9, 2020
    Assignee: ENTERPRISEWEB LLC
    Inventors: Dave M. Duggal, William J. Malyk
  • Patent number: 10678523
    Abstract: Processor hardware detects when memory aliasing occurs, and assures proper operation of the code even in the presence of memory aliasing. Because the hardware can detect and correct for memory aliasing, this allows a compiler to make optimizations such as register promotion even in regions of the code where memory aliasing can occur. The result is code that is more optimized and therefore runs faster.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: June 9, 2020
    Assignee: International Business Machines Corporation
    Inventors: Srinivasan Ramani, Rohit Taneja
  • Patent number: 10678617
    Abstract: The method includes identifying, by one or more computer processors, a first container with first software stack and a valid multipath configuration, wherein the first software stack is a first path of the valid multipath configuration. The method further includes creating, by one or more computer processors, a second container, wherein the second container has the same rules as the first container. The method further includes creating, by one or more computer processes, a second software stack in the second container, wherein the software stack is a redundant software stack of the first software stack. The method further includes creating, by one or more computer processors, a second path from the first container to the second software stack, wherein the second path bypasses the first software stack.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: June 9, 2020
    Assignee: International Business Machines Corporation
    Inventors: Rafael C. S. Folco, Breno H. Leitao, Desnes A. Nunes do Rosario, Jose F. Santiago Filho
  • Patent number: 10678864
    Abstract: An analysis model execution unit executing a part of an analysis model, an analysis model partial execution unit partially executing the analysis model based on intermediate data generated during execution of the analysis model, external storage storing the intermediate data and mapping information which is corresponding relationship between the intermediate data and the analysis model, and an analysis model general processing unit generating the mapping information by associating the intermediate data with the analysis model and reading the intermediate data associated with the analysis model from the external storage based on the mapping information are provided.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: June 9, 2020
    Assignee: HITACHI, LTD.
    Inventors: Takaya Ide, Hiroshi Nasu, Yuki Naganuma, Toshio Nishida, Hideki Nakamura
  • Patent number: 10671512
    Abstract: Storing memory reordering hints into a processor trace includes, while a system executes a plurality of machine code instructions, the system initiating execution of a particular machine code instruction that performs a load to a memory address. Based on initiation of this instruction, a system initiates storing, into the processor trace, a particular cache line in a processor cache that stores a first value corresponding to the memory address. After initiating storing of the particular cache line, and prior to committing the particular machine code instruction, the system detects an event affecting the particular cache line. Based on this detection, the system initiates storing of a memory reordering hint into the processor trace.
    Type: Grant
    Filed: October 23, 2018
    Date of Patent: June 2, 2020
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventor: Jordi Mola
  • Patent number: 10671352
    Abstract: A device may predict, based on historical data relating to a plurality of past projects, a trigger to perform a project health check for a project. The device may process project data relating to the project to determine a health check status of the project based on predicting the trigger to perform the project health check for the project. The device may generate a recommendation relating to altering completion of the project based on the health check status of the project. The device may communicate with one or more devices to provide information identifying the recommendation. The device may receive, from the one or more devices, response information relating to the recommendation. The device may perform a response action relating to the recommendation based on receiving the response information.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: June 2, 2020
    Assignee: Accenture Global Solutions Limited
    Inventors: Niju Prabha, Sarvesh Madhusudan Damle, Rajendra T. Prasad, Shankaranand Mallapur, Vijayaraghavan Koushik
  • Patent number: 10664251
    Abstract: Utilizing problem insights based on the entire environment as inputs to drive a static compiler. A decision engine receives inputs associated with applications to be compiled. The decision engine also receives optimization constraints based on available resources. A decision learning model is applied to the inputs to predict compiler performance and the results are provided to the decision engine. The decision engine determines a profile that comprises an order of execution and an optimization level for use during compilation of the plurality of applications. The profile is then used to schedule compiling and optimization of the applications.
    Type: Grant
    Filed: October 5, 2018
    Date of Patent: May 26, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Christopher Barton, Al Chakra, Sumit Patel
  • Patent number: 10656918
    Abstract: An approach is provided in which an information handling system receives a set of discovery results that correspond to source application services executing in source environments. The information handling system then maps the set of discovery results to a target pattern includes at least one declarative description describing one or more components included in at least one of the one or more source environments. In turn, the information handling system creates a target application service based, at least in part, on the target pattern.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: May 19, 2020
    Assignee: International Business Machines Corporation
    Inventors: John V. Delaney, Florian D. Graf, Maeve M. O'Reilly, Ruediger Schulze, Thomas Spatzier, Clea A. Zolotow
  • Patent number: 10642599
    Abstract: Techniques are disclosed for reducing the time needed to deploy updated versions of an application using a deployment pipeline. To do so, a deployment manager may collect statistics reflecting how often any given stage of the deployment pipeline is completed successfully in deploying updates to the application. In cases where a current stage has a sufficient approval percentage, the deployment pipeline may begin deploying an updated version of the application into an environment specified for a subsequent stage of the deployment pipeline, before the current stage of the pipeline is complete. Provided the current stage completes successfully, the subsequent stage can be initiated by activating the pre-deployed versions of the application.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: May 5, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: David Killmon, Felix Jodoin, Nathaniel Gaertner
  • Patent number: 10642602
    Abstract: A software update architecture, system, apparatus, and methodology are provided for performing block-based swapping of OTA software stored as a plurality of compressed blocks in a first, smaller NVM with the system software stored as a plurality of decompressed blocks in a second, larger NVM by using a first decompressor circuit and first scratch memory to sequentially decompress each compressed code block of OTA software for storage in decompressed form as updated system software in the second, larger NVM while using a first compressor circuit and second scratch memory to sequentially compress each decompressed code block of system software for storage in compressed form as backup system software in the first, smaller NVM.
    Type: Grant
    Filed: December 12, 2017
    Date of Patent: May 5, 2020
    Assignee: NXP USA, Inc.
    Inventors: Anirban Roy, Anis M. Jarrar, Frank K. Baker, Jr.
  • Patent number: 10642581
    Abstract: Systems and methods relate to creating applications using building blocks linked together with metadata. A user interface can enable a user to create an application. Creating the application can include defining a new building block configured to generate output data. The new building block can include one or more existing building blocks and the metadata associated with the existing building blocks. For example, a building block can include at least one input/output (I/O) feature configured to receive inputs and/or generate outputs. Further, the existing building block can correspond to a data structure including external I/O features. The new building block can be linked to an existing building block by mapping an external I/O feature of the existing building block to an open I/O feature of the new building block. The mapping can be stored in metadata associated with the new building block.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: May 5, 2020
    Assignee: Oracle International Corporation
    Inventor: Keith Collins
  • Patent number: 10635577
    Abstract: A computer-implemented method may include: receiving a request to integrate a commit; obtaining analytics data of an author that developed the commit; executing a simulation using the analytics data of the author as inputs to the simulation; obtaining results from the simulation, wherein the results indicate error rates when one or more testing stages are omitted from a testing procedure of the commit; comparing the results of the simulation with a threshold; determining, by the computing the device, the testing procedure based on the comparing, wherein the testing procedure identifies the one or more testing stages that are omitted and one or more testing stages that are included in the testing procedure; and outputting information regarding the determined testing procedure, wherein the outputting causes an integration server to test the commit in accordance with the testing procedure as part of an integration process for integrating the commit to a project.
    Type: Grant
    Filed: April 7, 2017
    Date of Patent: April 28, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Aaron K. Baughman, Cameron McAvoy, Brian M. O'Connell
  • Patent number: 10635406
    Abstract: One or more processors scan a first software container template for one or more identities of software present on a first software container associated with the first software container template. One or more processors generate a map of the one or more identities of software present on the first software container. The one or more identities of software present on the first software container are mapped with one or both of: an identifier of the first software container template and an identifier of the first software container associated with the first software container template.
    Type: Grant
    Filed: January 18, 2019
    Date of Patent: April 28, 2020
    Assignee: International Business Machines Corporation
    Inventors: Szymon M. Brandys, Piotr P. Godowski, Piotr Kania, Michal S. Paluch, Tomasz A. Stopa
  • Patent number: 10635570
    Abstract: Techniques for profiling memory leaks are described. In one or more embodiments, a memory profiling system identifies a set of one or more objects on the heap during application runtime. For each respective object in the subset of objects, the memory profiling system stores a set of sample information including timestamp that identifies a time associated with an allocation on the heap memory was performed for the respective object and a stack trace identifying at least one subroutine that triggered the allocation on the heap memory. Responsive to detecting a memory leak, the memory profiling system generates a memory leak profile for at least one object in the subset of objects that is causing the memory leak. The memory leak profile identifies when the allocation on the memory store for the at least one object was performed and information about object that remained live after the potential memory leak.
    Type: Grant
    Filed: June 14, 2018
    Date of Patent: April 28, 2020
    Assignee: Oracle International Corporation
    Inventors: Erik Kristofer Gahlin, Marcus Mattias Hirt
  • Patent number: 10606570
    Abstract: According to an aspect of an embodiment, a method may include generating an abstract code graph (ACG). The method may include obtaining an abstract syntax tree (AST). The AST may include a first AST node that may represent a first construct at a first level of abstraction and a second AST node that may represent a second construct. The method may further include generating an ACG, based on the AST. The generating of ACG may include generating a first ACG node based on the first AST node and a second ACG node based on the second AST node. The generating of ACG may also include generating, based on the first ACG node, a third ACG node that represents the first construct at a second level of abstraction. The third ACG node may be connected between the first ACG node and the second ACG node based on the AST.
    Type: Grant
    Filed: March 8, 2018
    Date of Patent: March 31, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Hiroaki Yoshida, Mukul R. Prasad
  • Patent number: 10606563
    Abstract: A method facilitates development of instructions in a precise syntax, such as built-in functions of a computational system such as a spreadsheet application, using natural language (NL) input. A user may enter NL input in a workspace. An NL processing system may process the NL input to generate instruction(s) in a precise syntax that corresponds to the NL input. The instruction(s) in the precise syntax then may be included in the workspace.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: March 31, 2020
    Assignee: Wolfram Alpha LLC
    Inventors: Stephen Wolfram, Theodore W. Gray
  • Patent number: 10579399
    Abstract: A data-serialization system initially uses a recursive serialization algorithm to serialize a hierarchy of nested data objects by translating those objects into a serial stream of data. The system determines that a stack-overflow error is likely to occur whenever the number of objects serialized by the system exceeds a threshold value, or whenever the stack has reached an unacceptable level of utilization. When the system determines that a stack-overflow error is likely or if the system detects that a stack-overflow error will definitely occur if another object is serialized, the system either transfers control to a nonrecursive algorithm that does not require a stack data structure or reduces stack utilization by transferring contents of the stack to a variable-size queue-like data structure.
    Type: Grant
    Filed: July 17, 2018
    Date of Patent: March 3, 2020
    Assignee: International Business Machines Corporation
    Inventors: Timothy P. Ellison, Amit S. Mane, Sathiskumar Palaniappan, Vijay Sundaresan
  • Patent number: 10574790
    Abstract: A process performed on a server includes configuring the server to enable script for a Web service to be defined dynamically, where the Web service includes an application program interface (API) for enabling access by, and interaction with, a computer program executing on a device other than the server. The process also includes compiling the script to produce machine-executable code for the Web service, receiving a call from the computer program to the Web service, executing the machine-executable code in response to the call to produce an output, and sending the output to the device.
    Type: Grant
    Filed: July 14, 2017
    Date of Patent: February 25, 2020
    Assignee: PTC Inc.
    Inventor: Joseph L. Biron, III
  • Patent number: 10552534
    Abstract: Aspects of the present invention disclose a method, computer program product, and system for parsing a domain-specific language (DSL) statement. The method includes one or more processors accessing a DSL statement that includes contracted phrases. The method further includes one or more processors identifying one or more contracted phrases in the DSL statement utilizing an annotated domain vocabulary for a DSL associated with the DSL statement and grammar rules for the DSL. The method further includes one or more processors determining expanded phrases corresponding to the identified one or more contracted phrases based on the annotated domain vocabulary and the grammar rules. The method further includes one or more processors creating an expanded abstract syntax tree (AST) that is representative of the DSL statement with the determined expanded phrases replacing the identified one or more contracted phrases.
    Type: Grant
    Filed: January 19, 2017
    Date of Patent: February 4, 2020
    Assignee: International Business Machines Corporation
    Inventors: Jean-Michel G. B. Bernelas, Ulrich M. Junker, Stephane Mery