Abstract: An apparatus, method, and computer-readable storage medium for allowing a block-addressable storage device to provide a sparse address space to a host computer. The storage device exports an address space to a host computing device which is larger than the storage capacity of the storage device. The storage device translates received file system object addresses in the larger address space to physical locations in the smaller address space of the storage device. This allows the host computing device more flexibility in selecting addresses for file system objects which are stored on the storage device.

Abstract: A storage array uses paged metadata. Each storage director has access to a plurality of object storage systems which describe locations of paged metadata in backing storage. Each object storage system includes different types of inodes which describe objects in backing storage. The object storage systems are used to locate and relocate metadata for loading into global memory, and creation and deletion of objects. An object storage system may be selected based on factors including ratio of different inode types, locality of object usage and anticipated object activity level.

Abstract: A method is used in managing data relocation in storage systems. Data access activity information is gathered for a set of slices of a storage tier in a data storage system for migrating the set of slices from the storage tier to another storage tier. The data storage system includes a first storage tier and a second storage tier configured such that performance characteristics associated with the first storage tier is superior to the second storage tier. Based on a pattern indicated by the data access activity information, a temperature for the set of slices is determined by applying a predictive analysis technique. Based on the determination, relocation of data is effected in the storage system.

Abstract: Techniques for determining an age category for an object and identifying objects for memory leak analysis based on age categories are described. An age category classifier generates a set of age categories, each corresponding to a respective time interval. The age category classifier monitors garbage collection processes on the heap. The age category classifier determines a current age category based on a duration of time that has elapsed between (a) an initiation of a current garbage collection cycle and (b) a reference event. The age category classifier identifies objects transferred from one object group to another object group during the current garbage collection cycle. The age category classifier stores the current age category as the transfer age category in the headers of the transferred objects. The transfer age categories of the objects may be used for reducing the number of objects that are analyzed in a memory leak analysis.

Abstract: A flexible, scalable server is described. The server includes plural server nodes each server node including processor cores and switching circuitry configured to couple the processor to a network among the cores with the plurality of cores implementing networking functions within the compute nodes wherein the plurality of cores networking capabilities allow the cores to connect to each other, and to offer a single interface to a network coupled to the server.

Abstract: A block-level data storage system receives a request to delete a data storage volume. As a result, the data storage volume is deleted and the areas comprising the volume are released and reaped. The areas may contain non-zero data within a plurality of data storage chunks that comprise the areas. An area cleaner is configured to zero out the areas for allocation to a newly created data storage volume.

Abstract: A method of controlling one or more data services in a computing environment includes the following steps. A request to one of read data from and write data to one or more storage devices in a computing environment is obtained from an application executing on a host device in the computing environment. One or more application-aware parameters associated with the data of the request are obtained. Operation of the one or more data services is controlled based on the one or more application-aware parameters.

Abstract: A peripheral component interconnect express (PCIe) solid state drive (SSD) accelerator, having a PCIe card and separate a flash daughter-card, is provided. By including flash memory devices on a separate daughter-card, the flash memory devices are thermally decoupled from the hotter devices on the main PCIe providing additional thermal operating margins for the entire design. Furthermore, as flash memory devices are the most likely part of the subsystem to wear out over time due, including flash memory devices on a separate daughter-card allows the flash memory devices to become a field replaceable unit that can be easily replaced. EEPROMs may be included on the flash daughter-card to record the current wear state of the NAND flash devices. Knowing the wear history of the flash memory device allows the seller to replace the flash daughter-card of a customer with a daughter-card having a similar wear state.

Abstract: A method for coordinating cache and memory reservation in a computerized system includes identifying at least one running application, recognizing the at least one application as a latency-critical application, monitoring information associated with a current cache access rate and a required memory bandwidth of the at least one application, allocating a cache partition, a size of the cache partition corresponds to the cache access rate and the required memory bandwidth of the at least one application, defining a threshold value including a number of cache misses per time unit, determining a reduction of cache misses per time unit, in response to the reduction of cache misses per time unit being above the threshold value, retaining the cache partition, assigning a priority of scheduling memory request including a medium priority level, and assigning a memory channel to the at least one application to avoid memory channel contention.

Abstract: An apparatus includes a memory and a controller. The memory may be configured to store data. The controller may be configured to process a plurality of input/output requests to read/write to/from the memory. The controller generally includes a processor, a cache and a hardware assist circuit. The processor may be configured to initiate a recycle operation by generation of a start index. The cache may be configured to buffer a first level of a map and less than all of a second level of the map. The hardware assist circuit may be configured to search through the first level or any portions of the second level of the map in the cache in response to the start index, and notify the processor in response to the search detecting one or more blocks in the memory that contain valid data to be recycled.

Abstract: Embodiments are directed to maintaining cache status information for a flash-based cache after a system restart following a shutdown by periodically gathering the cache status information from one or more data structures in volatile memory, compiling the gathered cache status information into a checkpoint data structure stored in non-volatile memory, and upon the system restart, loading the checkpoint data element into the one or more data structures in volatile memory to restore the cache status information to a state just prior to the shutdown to maintain warmness of the cache across the restart. The restored cache status information is used by the system to make informed write eviction decisions to maintain correctness of the system after the restart relative to the state just prior to the shutdown.

Abstract: An electronic memory arrangement having at least three memory areas, a memory control unit, and a writing memory-accessing unit configured to carry out write access. A reading memory-accessing unit is configured to carry out read accesses. The memory control unit determines read and write access to the at least three memory areas, and the memory control unit is configured such that after the writing of a first data packet to one of the three memory areas, a following second data packet to be written is written to one on the three memory area to which read access does not place simultaneously during the write access of the second data packet.

Abstract: Techniques are described for performing data storage optimization. A first I/O workload for a first data portion of a first snapshot of a first logical device is tracked. First processing is performed by a data storage optimizer to determine a set of one or more data movement optimizations. The first processing uses the first I/O workload for the first snapshot. The set of one or more data movement optimizations include a first data movement that is any of a promotion to move data included in the first data portion from a first storage tier to a higher performance storage tier and a demotion to move data included in the first data portion from the first storage tier to a lower performance storage tier. The first data movement is performed.

Abstract: In a memory, multiple pieces of entry data sorted in ascending or descending order are stored associated with addresses. With whole addresses for storing the multiple pieces of entry data as an initial search area, the search circuit repeatedly performs a search operation for comparing entry data stored in a central address of the search area with the search data, outputting the address as a search result in the case of a match, and narrowing the search area for the next search based on a magnitude comparison result in the case of a mismatch.

Abstract: An elastic filesystem for temporary data provides storage space for virtual machines (VMs) in a distributed computing system. The filesystem redirects accesses to virtual disks in VMs to a common pool file. The system provides performance and storage efficiency at least on par with local, direct attached virtual disks, while providing a single pool of shared storage that is provisioned and managed independently of the VMs. The system provides storage isolation between VMs storing temporary data in that shared pool. Also, storage space for temporary data may be allocated on demand and reclaimed when no longer needed, thereby supporting a wide variety of temporary space requirements for different Hadoop jobs.

Abstract: When a volume that was once associated with a consistency group and is to be deleted from the storage system, the to be deleted volume is designated as a ghost volume within the storage system, and the deletion of the ghost volume from the storage system is delayed until there are no snapshots that include a pointer to the ghost volume. The storage system may include a counter that counts the number of instances all volumes within a consistency group are pointed to or that counts the number of instances that only ghost volumes are pointed to. The storage system may reference this count to determine whether to immediately delete or delay the deletion of the volume from the storage system.

Abstract: In various embodiments, the present disclosure provides a system comprising a first plurality of processing cores, ones of the first plurality of processing cores coupled to a respective core interface module among a first plurality of core interface modules, the first plurality of core interface modules configured to be coupled to form in a first ring network of processing cores; a second plurality of processing cores, ones of the second plurality of processing cores coupled to a respective core interface module among a second plurality of core interface modules, the second plurality of core interface modules configured to be coupled to form a second ring network of processing cores; a first global interface module to form an interface between the first ring network and a third ring network; and a second global interface module to form an interface between the second ring network and the third ring network.

Abstract: An information processing device, includes: a reconfigurable integrated circuit that, by being loaded with code expressing a configuration of a circuit, functions as the circuit; a memory that stores information indicating that the code is loaded into the reconfigurable integrated circuit, and resource information indicating an unused region in which circuit generation is available inside the reconfigurable integrated circuit; and a processor that searches a translation lookaside buffer (TLB) in which a virtual address associated with the code is associated with a physical address of the memory, determines, when the virtual address hits in the TLB, that the code is loaded, and generates, when the virtual address does not hit in the TLB, the circuit expressed by the code in the unused region indicated by the resource information.

Abstract: According to one embodiment, a memory device includes a nonvolatile first memory, a second memory, a controller, and an interface unit. When receiving a first packet from the interface unit, the controller transmits a second packet to an initiator via the interface unit. In the case where a header of a third packet does not match the second packet, the controller does not store the third packet to a second memory, the third packet being discarded.

Abstract: An optimized segment cleaning technique is configured to efficiently clean one or more selected portions or segments of a storage array coupled to one or more nodes of a cluster. A bottom-up approach of the segment cleaning technique is configured to read all blocks of a segment to be cleaned (i.e., an “old” segment) to locate extents stored on the SSDs of the old segment and examine extent metadata to determine whether the extents are valid and, if so, relocate the valid extents to a segment being written (i.e., a “new” segment). A top-down approach of the segment cleaning technique obviates reading of the blocks of the old segment to locate the extents and, instead, examines the extent metadata to determine the valid extents of the old segment.