Abstract: The disclosed embodiments provide a system that facilitates the development and execution of a software program. During operation, the system obtains, from the software program, a method call associated with one or more interfaces containing a virtual extension method. Next, the system resolves the method call by obtaining a method implementation corresponding to the method call from at least one of an inheritance hierarchy associated with the method call and the virtual extension method.

Abstract: Embodiments of systems, apparatuses, and methods for performing BIDSplit instructions in a computer processor are described. In some embodiments, the execution of a BIDSplit instruction tests the encoding of a binary-integer decimal source value and extracts a sign, exponent, and/or significand into a destination.

Abstract: A sparse matrix used in the least-squares method is divided into small matrices in accordance with the number of elements of observation. An observation ID is assigned to each element of observation, a parameter ID is assigned to each parameter, and the IDs are associated with parameters of elements as ID mapping. A system determines positions of nonzero elements in accordance with whether or not ID mapping exists, the correspondence between observation IDs and parameter IDs, and the positions of the small matrices, and selects a storage scheme for each small matrix based thereon. The system selects a storage scheme in accordance with conditions, such as whether or not a target element is a diagonal element, whether or not a term decided without ID mapping exists, and whether or not the same ID mapping is referred to.

Abstract: Simplified handling of dynamic collections having a variable number of elements at run time is achieved by providing for specification of collective properties of dynamic collections by a programmer. Such collective properties are distinct from type-member properties of the collection that follow from the types and type qualifiers of its members. Preferably, such dynamic collections are attributes (i.e., members) of an application defined type.

Abstract: A data processing device which includes a conversion circuit and a pseudo random number generator including a series connection of plural shift registers. The conversion circuit receives a pseudo random number sequence from an output of one of the plural shift registers excluding a last shift register of the series connection, and converts first data to second data using the received pseudo random number sequence.

Abstract: Some embodiments of the present invention provide a system that implements a safepoint for a thread, which includes a compiler and a runtime environment. During compilation of an application to be executed by the thread, the compiler obtains a register to be associated with the thread and inserts safepoint code into the application, wherein the safepoint code includes an indirect load from a memory location stored in the register to the register. During execution of the application by the thread, the runtime environment writes a thread-specific value for the thread to the register, wherein the thread-specific value corresponds to an enabled value, a triggered value, or a disabled value. In these embodiments, executing the indirect load by the thread causes the thread to trap if the thread-specific value corresponds to the triggered value.

Abstract: A method for bridging between virtual applications and an operating system of a host computer. The method comprises retrieving virtual applications and settings of the virtual applications assigned to a user logged onto the host computer; downloading shadow files of the virtual applications assigned to the user; integrating each of the virtual applications with an operating system shell of the host computer; and causing a virtual application to be executed over the host computer when the virtual application is launched by the user.

Abstract: Disclosed are a method and a system for facilitating verification of program code implementing Sleep Wakeup protocol for a microcontroller. An input handling module is configured to receive metadata from user required for verification of the program code. Identification module is configured to identify abstract syntax tree (AST) nodes corresponding to each program point in the program code. A computation module is configured to compute an actual interrupt protection status (IPS), task lock status (TLS), path entities and shared variables for each program point in the program code. A path analysis module is configured to determine transition paths between program points specified in the metadata, and are computed in terms of the path entities. Also, review information is computed for each of the path entities comprised in the transition paths. Further, a report generation module is configured to generate a report comprising the review information facilitating the user to verify the program code.

Abstract: A mechanism for performing single-path floating-point rounding in a floating point unit is disclosed. A system of the disclosure includes a memory and a processing device communicably coupled to the memory. In one embodiment, the processing device comprises a floating point unit (FPU) to generate a plurality of status flags for a rounded value of a finite nonzero number. The plurality of status flags are generated based on the finite nonzero number without calculating the rounded value of the finite nonzero number. The plurality of status flags comprises an overflow flag and an underflow flag. The FPU determines whether a rounded value should be calculated for the finite nonzero number based on the plurality of status flags and whether the overflow flag is asserted.

Abstract: The configuration of a system is programmatically determined. More particularly, these determinations are made using architecture artifacts that describe requirements of the system (which may be comprised of software, hardware, services, or some combination thereof), where these requirements are iteratively compared to characteristics of available components. A percentage of match is preferably computed, thus allowing for complete matches as well as partial matches. A weighting factor may be applied to attributes, effectively prioritizing attributes in view of their relative importance in the assembled system. When more than one component is a candidate for meeting a particular requirement, user input may be obtained to select one of the candidates. One or more attributes (such as cost information) of each candidate, including how well that candidate matched requirements, may be included for each candidate presented for user selection. The model may be updated and re-evaluated iteratively.

Abstract: In response to a test case error generated by execution of a test case against a code build, a source code segment that caused the test case error is identified by a defect monitor. The identified source code segment is linked to the test case that generated the test case error. The linked source code segment is monitored for code changes. A determination is made as to whether a test case re-execution criterion associated with the test case has been satisfied based upon a detected code change of the linked source code segment. An indication to re-execute the test case is generated in response to determining that the test case re-execution criterion associated with the test case has been satisfied.

Abstract: Embodiments of the disclosure are directed to systems and methods to process a declaratively-specified computer application by interpreting a structure and a behavior specification. Application data items are interpreted using a processing concrete model based on the structure specification. Application functionality is provided by processing the application data items in accordance to the behavior specification. The application information may further be used in an embodiment of the disclosure to perform additional processing and provide an added functionality. Various embodiments of the disclosure allow additional functions for declarative application such as performing domain activities, accessing data items, transferring application data, storing data and milestones and rendering data items.

Abstract: Techniques are provided for automatic verification and inference of memory fences in concurrent programs that can bound the store buffers that are used to model relaxed memory models. A method is provided for determining whether a program employing a relaxed memory model satisfies a safety specification. An abstract memory model is obtained of the relaxed memory model. The abstract memory model represents concrete program states of the program as a finite number of abstract states. The safety specification is evaluated for the program on the abstract memory model having the finite number of abstract states. Fence positions at one or more locations can be determined to ensure that the safety specification is satisfied.

Abstract: A program can be instrumented to test the program. The test instruments are classified, and concurrency constraints applied based on the classifications. A testing tool determines classifications of a plurality of test instruments in the instrumented program. The testing tool prevents concurrent instantiation of multiple of the plurality of test instruments in a first classification of the classifications. Multiple of the plurality of test instruments in a second classification of the classifications are concurrently instantiated.

Abstract: In response to a test case error generated by execution of a test case against a code build, a source code segment that caused the test case error is identified by a defect monitor. The identified source code segment is linked to the test case that generated the test case error. The linked source code segment is monitored for code changes. A determination is made as to whether a test case re-execution criterion associated with the test case has been satisfied based upon a detected code change of the linked source code segment. An indication to re-execute the test case is generated in response to determining that the test case re-execution criterion associated with the test case has been satisfied.

Abstract: A program can be instrumented to test the program. The test instruments are classified, and concurrency constraints applied based on the classifications. A testing tool determines classifications of a plurality of test instruments in the instrumented program. The testing tool prevents concurrent instantiation of multiple of the plurality of test instruments in a first classification of the classifications. Multiple of the plurality of test instruments in a second classification of the classifications are concurrently instantiated.

Abstract: An apparatus is disclosed. This apparatus includes a digital signal processing (“DSP”) block having a preadder-register block coupled to receive first through fourth input operands. A multiplier is coupled to the preadder-register block to receive a multiplicand operand and a multiplier operand. A first register block is coupled to the multiplier to receive sets of partial products from the multiplier. A second register block coupled to receive the third operand input. An arithmetic logic unit (“ALU”) block is coupled to the pre-adder-register block, the first register block and the second register block. The ALU block includes four input multiplexers and an ALU, where the ALU is coupled to receive outputs from each of the four input multiplexers.

Abstract: Disclosed are new approaches to Multi-dimensional filtering with a reduced number of memory reads and writes. In one embodiment, a filter includes first and second coefficients. A block of a data having width and height each equal to the number of one of the first or second coefficients is read from a memory device. Arrays of values from the block are filtering using the first filter coefficients and the results filtered using the second coefficients. The final result may be optionally blended with another data value and written to a memory device. Registers store results of filtering with the first coefficients. The block of data may be read from a location including a source coordinate. The final result of filtering may be written to a destination coordinate obtained by rotating and/or mirroring the source coordinate. The orientation of arrays filtered using the first coefficients varies according to a rotation mode.

Abstract: Embodiments of the present invention provide a method, a device and a system for activating an on-line patch. The method comprises: positioning an address of a patch function and an entry address of a to-be-patched function; writing, in a middle segment, a long-jump instruction for jumping to the patch function based on the address of the patch function and the entry address of the to-be-patched function, where the middle segment is a storage space, which is located before or after the entry position of the to-be-patched function and can at least store one long-jump instruction; and modifying an instruction at the entry position of the to-be-patched function to a short-jump instruction for jumping to the middle segment, so as to jump to the middle segment after the short jump instruction is executed, and then to jump to and execute the patch function through that instructions in the middle segment are executed.

Abstract: A user proxy setting is managed by a computer system that frequently performs package updates. A session starts when a user logs onto the computer system. The session registers the proxy setting of the user with a daemon that quits after a period of inactivity and restarts upon request. The daemon stores the proxy setting in a database using a user identifier (UID) and a session identifier as a key. The daemon then performs package updates multiple times during the session via a network, each time using the proxy setting stored in the database.