Abstract: A thin film transistor (TFT) substrate comprises a substrate, a plurality of pixel electrodes, a gate layer, an active layer, a first source layer and a second source layer, and a drain layer. The pixel electrodes are disposed on the substrate. The gate layer is disposed on the substrate. The active layer is disposed corresponding to the gate layer. The first source layer and the second source layer contact the active layer respectively. The drain layer contacts the active layer and is electrically coupled to one of the pixel electrodes. The gate layer, the active layer, the first source layer and the drain layer constitute a first transistor. The gate layer, the active layer, the second source layer and the drain layer constitute a second transistor. When the first and second transistors are disabled, the first and second source layers are electrically isolated from each other.

Abstract: A solid-state imaging apparatus having a plurality of pixels, comprising: a substrate; a wiring layer formed on the substrate and including an insulating film and a plurality of wires; a plurality of lower electrodes formed on the wiring layer in one-to-one correspondence with the plurality of pixels; a photoelectric conversion film formed covering the plurality of lower electrodes; a light-transmissive upper electrode formed on the photoelectric conversion film; and a shield electrode extending through a gap between each pair of adjacent lower electrodes among the plurality of lower electrodes, the shield electrode having a fixed potential and being electrically insulated from the plurality of lower electrodes.

Abstract: A method of manufacturing a semiconductor device having a doped layer may be provided. The method includes providing a substrate having a first region and a second region, forming a gate dielectric layer on the substrate, forming a first gate electrode layer on the gate dielectric layer, forming a first doped layer on the first gate electrode layer, forming a first capping layer on the first doped layer, forming a mask pattern on the first capping layer in the first region, the mask pattern exposing the first capping layer in the second region, removing the first capping layer and the first doped layer in the second region, removing the mask pattern, and forming a second doped layer on the first capping layer in the first region and the first gate electrode layer in the second region.

Abstract: A composite substrate 10 includes a sapphire body 1A, a seed crystal film 4 composed of gallium nitride crystal and provided on a surface of the sapphire body, and a gallium nitride crystal layer 7 grown on the seed crystal film 4 and having a thickness of 200 ?m or smaller. Voids 5 are provided along an interface between the sapphire body 1A and the seed crystal film 4 in a void ratio of 4.5 to 12.5 percent.

Abstract: Methods of fabricating a semiconductor structure include providing a semiconductor-on-insulator (SOI) substrate including a base substrate, a strained stressor layer above the base substrate, a surface semiconductor layer, and a dielectric layer between the stressor layer and the surface semiconductor layer. Ions are implanted into or through a first region of the stressor layer, and additional semiconductor material is formed on the surface semiconductor layer above the first region of the stressor layer. The strain state in the first region of the surface semiconductor layer above the first region of the stressor layer is altered, and a trench structure is formed at least partially into the base substrate. The strain state is altered in a second region of the surface semiconductor layer above the second region of the stressor layer. Semiconductor structures are fabricated using such methods.

Abstract: Methods and devices associated with a phase change memory include Schottky diodes operating as selectors having a low turn-on voltage, low sneak current and high switching speed. A method of forming a semiconductor device includes providing a semiconductor substrate having a diode array region and a peripheral device region, forming an N+ buried layer in the diode array region, forming a semiconductor epitaxial layer on the N+ buried layer, and forming deep trench isolations through the epitaxial layer and the N+ buried layer along a first direction. The method also includes forming shallow trench isolations in the diode array region and in the peripheral region along a second line direction. The method also includes forming an N? doped region between the deep and shallow trench isolations and forming a metal silicide on a surface of the N? doped region.

Abstract: A method of manufacturing an electronic device includes forming a structure including a member, and a first film arranged on at least a surface of the member, the member including an insulating film, a passivation film arranged on the insulating film and having an upper surface, and a trench positioned from the passivation film to the insulating film; forming a second film to cover the first film; and patterning the second film by a photolithography process using a photomask. In the forming the second film, an alignment mark including a concave portion corresponding to the trench is formed in a region above the trench in the second film. In the patterning the second film, the photomask is aligned with the structure by using the alignment mark.

Abstract: A sensor and its fabrication method are provided. The sensor comprises: a base substrate, a group of gate lines and a group of data lines arranged as crossing each other, and a plurality of sensing elements arranged in an array and defined by the group of gate lines and the group of data lines, each sensing element comprising a Thin Film Transistor (TFT) device and a photodiode sensing device, wherein the photodiode sensor device comprises: a bias line disposed on the base substrate; a transparent electrode disposed on the bias line and being electrically contacted with the bias line; a photodiode disposed on the transparent electrode; and a receiving electrode disposed on the photodiode; the TFT device is located above the photodiode. When the sensor is functioning, light is directly transmitted onto the photodiode sensor device through the base substrate. In comparison with conventional technologies, the light loss is largely reduced and the light absorption usage ratio is improved.

Abstract: In a TDI-type linear image sensor in which pixels are constituted of CCDs (Charge Coupled Devices) of n phases (n being an integer not smaller than 3), a gate opening portion and a gate non-opening portion functioning as a TDI transfer channel (15) are formed in all of transfer gates of the CCDs of n phases constituting the pixels. Within one pixel pitch in a TDI transfer direction, n microlenses (18) are formed such that light is concentrated at the gate non-opening portion formed at the transfer gate of each phase.

Abstract: An insulating layer is layered above a substrate, and a plurality of pixel electrodes are formed above the insulating layer in a matrix with intervals therebetween. A photoelectric conversion layer and an opposing electrode are formed in respective order above the pixel electrodes. A dummy layer is formed above the insulating layer in a region that in plan-view is more peripheral than a pixel region in which the pixel electrodes are formed. The dummy layer is formed from the same material as the pixel electrodes. The dummy layer is composed of a plurality of dummy layer portions that are each equal to each of the pixel electrodes in terms of size in plan-view. The dummy layer functions as a support layer for planarization during polishing by chemical mechanical polishing.

Abstract: A manufacturing method of a semiconductor device includes: a semiconductor substrate including a drain, a drift making contact with a front face of the drain, a body contacting with a front face of the drift, a source provided in part of a front face of the body, and a floating surrounded by the drift; and a gate including an insulator formed on an inner wall of a trench and a electrode disposed inside the insulator and which has a bottom portion contacting with the floating, the manufacturing method includes: forming the trench in a semiconductor wafer so as to have a bottom portion in which an end portion in a short direction perpendicular to a longitudinal direction thereof is deeper than a central portion; injecting an impurity ions into the bottom portion of the trench; and forming the central portion of the trench in the short direction to be deepened.

Abstract: Techniques for fabricating fine-pitch micro-bumps are disclosed. According to one embodiment, a fabrication process may comprise the following steps: depositing a dielectric layer on a wafer; forming a pattern of through holes in the dielectric layer; depositing a seed metal layer on top of the dielectric layer and inside the through holes; depositing a layer of UBM metal on top of the seed metal layer (including inside the holes), and further filling the holes with a low melting point metal; performing chemical mechanical polishing (CMP) to remove conductive material(s) outside the holes and/or on the surface of the dielectric layer, such that the metal stacks of adjacent holes are insulated by the dielectric material between them; and etching the dielectric material surrounding the holes to cause the tip of the metal stacks to extend slightly higher than the surrounding dielectric surface, thereby forming fine-pitch micro-bumps.

Abstract: An organic light emitting diode (OLED) package includes a substrate, an OLED die mounted on the substrate and an encapsulation layer encapsulating the OLED die. The OLED package further includes a protecting layer formed on the OLED die. The encapsulation layer has a multi-layered structure and is deposited on the protecting layer. Refractive indexes of a cathode of the OLED die, the protecting layer and the encapsulation layer are gradually decreased in the sequence. A barrier layer for blocking moisture from entering the OLED package is formed on a bottom surface of the substrate by atomic layer deposition (ALD) method. The present disclosure also provides a method for manufacturing the OLED package.

Abstract: The present disclosure provides a method for patterning materials that are or are on top of chemically sensitive organic semiconductors. The method employs imprint lithography and a bilayer resist structure that simultaneously protects lower layers from harmful solvents and allows for cleaner liftoff by producing an undercut geometry to the resist pattern.

Abstract: A method of fabricating a semiconductor device is provided. An etch-target layer is formed on a substrate. A photoresist layer is formed on the etch-target layer. A first exposure process is performed using a first photo mask to form a plurality of first-irradiated patterns in the photoresist layer. The first photo mask includes a plurality of first transmission regions. Each first transmission region has different optical transmittance. A second exposure process is performed using a second photo mask to form a plurality of second-irradiated patterns in the photoresist layer. The second photo mask includes a plurality of second transmission regions. Each second transmission region has different optical transmittance. A photoresist pattern is formed from the photoresist layer by removing the plurality of first-irradiated and second-irradiated patterns from the photoresist layer. A lower structure is formed from the etch-target layer by etching the etch-target layer using the photoresist pattern.

Abstract: A donor substrate includes: a support layer; a first light absorption layer disposed on the support layer; a buffer layer disposed on the first absorption layer; a second light absorption layer disposed on the buffer layer; and a transfer layer disposed on the second absorption layer, wherein the buffer layer includes a transparent oxide film.

Abstract: A method of manufacturing a nitride semiconductor device, the nitride semiconductor device having an input terminal, a drain terminal, a gate terminal, and an output terminal, includes a burn-in step in which the nitride semiconductor device is heated while inputting an RF signal to the input terminal, applying a drain voltage to the drain terminal, and applying a gate voltage to the gate terminal. The burn-in step is continued until the nitride semiconductor device exhibits a decrease in gate current.

Abstract: The light-emitting device has a plurality of light-emitting elements that is mounted on one or more wiring patterns on a substrate. A new light-emitting element that replaces a defective element is mounted on the same wiring pattern on which the defective element is mounted. The defective element or a trace that remains after removal of the defective element is sealed by a same sealing member by which the new light-emitting element is sealed.

Abstract: The present invention provides a method for evaluating silicon single crystal wherein an amount ?[C] of carriers generated due to oxygen donors produced when a heat treatment is performed to the silicon single crystal is calculated and evaluated, the amount ?[C] being calculated from oxygen concentration [Oi] in the silicon single crystal, a temperature T of the heat treatment, a time t of the heat treatment, and an oxygen diffusion coefficient D(T) at the temperature T by using the following relational expression: ?[C]=?[Oi]5×exp(??·D(T)·[Oi]·t) (where ? and ? are constants). As a result, there is provided a method that enables evaluating an amount of carriers generated due to oxygen donors in silicon single crystal in a further versatile manner.

Abstract: An organic electronic light emitting device includes a substrate; a first gate electrode formed on a top surface of the substrate; a first insulating layer formed on the top surface of the substrate and covering the first gate electrode; an organic layer formed on a top surface of the first insulating layer and comprising at least two organic layers with different conductivity type; a second insulating layer formed on a top surface of the organic layer; a second gate electrode formed on a top surface of the second insulating layer; and a source electrode and a drain electrode formed between the first and second insulating layers, and the source and drain electrodes located on both sides of the organic layer respectively.