Abstract: A system and method for an overcurrent detector includes a device. The device includes a threshold generation circuit, and an overpower determination circuit. The threshold generation circuit is configured to produce a threshold value based on an output of a temperature sensor proximate to a power transistor, and a maximum power dissipation in the power transistor. The overpower determination circuit is configured to determine an overpower state of the power transistor based on the threshold value and a switch voltage. The switch voltage is detected between a source and a drain or a collector and an emitter of the power transistor.

Abstract: In certain configurations, an input/output (IO) interface of a semiconductor chip includes a pin, an interface switch connected to the pin, and an overstress detection and active control circuit that controls a resistance of the interface switch with active feedback. The overstress detection and active control circuit increases a resistance of the interface switch in response to detection of a transient overstress event between a first node and a second node. Accordingly, the overstress detection and active control circuit provides separate detection and logic control to selectively modify the resistance of the interface switch such that the interface switch operates with low resistance during normal operating conditions and with high resistance during overstress conditions.

Abstract: Semiconductor devices including a diode and a resistor are disclosed herein. An example of a semiconductor device includes a substrate having a surface. A first doped semiconductive region is disposed in the substrate below the surface. A second doped semiconductive region is disposed in the substrate and extends between the surface and the first doped semiconductive region. The second doped semiconductive region is at least partially in contact with the first doped semiconductive region. The first doped semiconductive region and the second doped semiconductive region together define an isolation tank. A third doped semiconductive region is disposed in the isolation tank and is in contact with the surface. The second doped semiconductive region and the third doped semiconductive region form a diode. At least one opening in the isolation tank forms a resistive path for current to flow between the substrate and the third doped semiconductive region.

Abstract: A thermal protection switch device may include: a power circuit that includes a phase line and a neutral line; a current sensor electrically connected to the phase line to detect the current flow in the phase line; a temperature sensor thermally coupled to the phase line to detect the temperature of the phase line; and another temperature sensor thermally coupled to the neutral line to detect the temperature of the neutral line. The device also includes a trip circuit configured to interrupt the phase line when activated and a controller configured to receive output signals from the above current and temperature sensors. The controller may activate the trip circuit to interrupt the phase line in response to determining that certain conditions have occurred.

Abstract: A system for controlling inrush current between a power source and a load includes an output capacitor configured to be coupled in parallel with the load. The system also includes a transistor having a gate, a collector configured to be coupled to the power source, and an emitter configured to be coupled to the load. The system also includes a collector resistor coupled between the collector of the transistor and the gate of the transistor. The system also includes an emitter capacitor coupled between the gate of the transistor and the emitter of the transistor to facilitate current flow from the power source through the collector resistor and the emitter capacitor to charge the output capacitor.

Abstract: An embodiment electronic circuit includes an electronic switch comprising a load path, and a control circuit configured to drive the electronic switch. The control circuit is configured to operate in one of a first operation mode and a second operation mode based at least on a level of a load current of the electronic switch. In the first operation mode the control circuit is configured to generate a first protection signal based on a current-time-characteristic of the load current and drive the electronic switch based on the first protection signal. The control circuit is configured to generate a status signal such that the status signal has a wakeup pulse when the operation mode changes from the second operation mode to the first operation mode and, after the wakeup pulse, a signal level representing a level of the load current.

Abstract: A system for controlling inrush current between a power source and a load includes an output capacitor coupled in parallel with the load, and a transistor having a gate, a collector configured to be coupled to the power source, and an emitter configured to be coupled to the load. The system also includes a supply resistor configured to be electrically coupled between the power source and the load and to provide a resistor charging current from the power source to the output capacitor to charge the output capacitor in response to initial power being provided by the power source. The system also includes a gate resistor having a first terminal coupled to the gate of the transistor to cause the transistor to operate in a linear mode in response to the initial power being provided by the power source to increase a speed of charging the output capacitor.

Abstract: An over-current protection apparatus constituted of: a transistor disposed on a substrate; a first thermal sense device arranged to sense a temperature reflective of a junction temperature of the transistor; a second thermal sense device arranged to sense a temperature reflective of a temperature of a casing surrounding the substrate; and a control circuitry, arranged to alternately: responsive to the sensed temperature by the first thermal sense device and the sensed temperature of the second thermal sense device being indicative that the temperature difference between the transistor junction and the substrate casing is greater than a predetermined value, switch off the transistor; and responsive to the sensed temperature by the first thermal sense device and the sensed temperature by the second thermal sense device being indicative that the temperature difference between the transistor junction and the substrate casing is not greater than the predetermined value, switch on the transistor.

Abstract: A power control system for use with an electric lock mechanism having an actuator comprises a power supply to output an output voltage to the actuator. A credential device signals the power supply to output the voltage upon receiving an authorized code. A microcontroller controls the power supply, the credential device, and the actuator and may operate in an Access Mode or a Dog Mode. When in Access Mode, the actuator is unpowered and the credential device is powered until an authorized code is received and the power supply powers the actuator. The Dog Mode has an awake mode where the actuator is powered and the credential device is unpowered after the actuator remains in the powered state for a length of time. A sleep mode has the actuator unpowered and the credential device powered until an authorized code is received and the power supply powers the actuator.

Abstract: A first circuit and a second circuit, which have different operating voltages, are connected through a level shifter, and a combination circuit below is provided in the level shifter. An enable signal, which is switched between active and inactive states according to whether or not a potential is supplied to a second high potential power line, is applied to the combination circuit. The combination circuit outputs a first signal and a second signal, which is acquired by logically inverting the first signal, to a level shift circuit according to an output signal of the first circuit, in a case where the enable signal is active, and causes both the first signal and the second signal to be at a low level in a case where the enable signal is inactive.

Abstract: An object of the present invention is to diagnose an abnormality detecting circuit that detects an abnormality, such as an overcurrent of a power semiconductor, with the number of insulating elements to be additionally provided, inhibited from increasing. There are provided: a drive circuit configured to output a gate signal to a power semiconductor; an abnormality detecting circuit configured to detect an abnormality of the power semiconductor; and a diagnosis signal applying circuit configured to apply a diagnosis signal to the abnormality detecting circuit. The diagnosis signal applying circuit applies the diagnosis signal, on the basis of the gate signal output by the drive circuit.

Abstract: An electrostatic protection circuit, a display panel, and a display apparatus are disclosed. The electrostatic protection circuit comprises a switch control unit, a first electrostatic storage unit configured to store charges, and a second electrostatic storage unit configured to store charges, wherein the first electrostatic storage unit has a first terminal connected to a driving line and a second terminal connected to the switch control unit, and the second electrostatic storage unit has a first terminal connected to the switch control unit and a second terminal connected to a common electrode trace.

Abstract: A semiconductor device includes a plurality of semiconductor switching elements disposed on a single semiconductor substrate comprising a semiconductor having a bandgap that is wider than that of silicon; and a plurality of electrode pads that are disposed in a predetermined planar layout on a front surface of the semiconductor substrate, the plurality of electrode pads each being electrically connected to the plurality of semiconductor switching elements. A plurality of terminal pins to externally carry out voltage of the electrode pads is bonded through a plated film to all of the plurality of electrode pads by solder.

Abstract: An arrangement of stack spark gaps, whereby a stack spark gap has multiple electrodes and insulating elements that are arranged between the electrodes, with a first electrically conductive clamping element and a second electrically conductive clamping element, whereby the two clamping elements are arranged opposite to the front ends of the stack spark gaps, with at least one connecting element, by which the two clamping elements are connected to one another, and with connection elements for electrical connection to the stack spark gaps. A device is provided for holding the stack spark gaps together and having them make contact. Three stack spark gaps are arranged beside one another between the two clamping elements, at least one of which is electrically conductive, and the two clamping elements are connected to one another electrically via the connecting element and are arranged with the spark gaps so as to form a star circuit.

Abstract: Systems and methods for protecting a device from an electrostatic discharge (ESD) event are provided. A resistor-capacitor (RC) trigger circuit and a driver circuit are provided. The RC trigger circuit is configured to provide an ESD protection signal to the driver circuit. A discharge circuit includes a first metal oxide semiconductor (MOS) transistor and a second MOS transistor connected in series between a first voltage potential and a second voltage potential. The driver circuit provides one or more signals for turning the first and second MOS transistors on and off.

Abstract: A device includes a chip and integrated circuit. Devices and integrated circuits are provided where a resistor is coupled to a terminal of a chip or integrated circuit.

Abstract: A power supply control apparatus that includes a switching circuit that turns ON or OFF a switch provided at a point along a wire, wherein power supply via the wire is controlled by switching with the switching circuit; a current output circuit configured to output a current whose current value increases as a current value of a current flowing through the wire increases; a resistance circuit through which the current that the current output circuit outputs flows, wherein the resistance circuit includes: a first resistor; and a series circuit of a second resistor and a capacitor that is connected in parallel to the first resistor; and a voltage applying circuit configured to, if an end-to-end voltage value across the resistance circuit becomes higher than or equal to a predetermined voltage value, apply a voltage whose value is higher than the predetermined voltage value.

Abstract: To provide a semiconductor circuit capable of slightly generating inductance in two facing bus bars. Provided with a semiconductor circuit in which a collector-side bus bar 46 and an emitter-side bus bar 41 are arranged in parallel in a state of being isolated from each other and are fitted in a fixed manner to each other, and a inductance generation portion 411 is provided in one or both of the collector-side bus bar 46 and the emitter-side bus bar 41, the inductance generation portion 411 generating a difference in inductance between the collector-side bus bar 46 and the emitter-side bus bar 41.

Abstract: When a short-circuit failure has occurred in a power semiconductor device provided in a power module, a radical and rapid temperature increase is prevented by instantly interrupting a short-circuit current. A power module 10 has a package 10a. Provided in the package 10a are: a MOSFET 21 serving as the power semiconductor device; a resistor 23 serving as a detecting means for detecting an operation state of the MOSFET 21 and outputting a detection signal; and a MOSFET 22 serving as a current-interrupting purpose switch connected in series to the MOSFET 21. In response to a control signal Si2 generated on the basis of the detection signal, the MOSFET 22 goes into a conduction state during a normal operation of the MOSFET 21 and goes into an interruption state so as to interrupt a current flowing in the MOSFET 21 when a short-circuit failure has occurred in the MOSFET 21.

Abstract: Implementations of conductive energy weapons (CEWs) may include a shock generating circuit configured to couple to a power source, two electrodes operatively coupled to the shock generating circuit, and a safety circuit operatively coupled to the shock generating circuit. The shock generating circuit may be configured to generate a first pulse train and deliver the first pulse train to a target, and may be configured to generate at least a second pulse train and deliver the at least second pulse train to a target. The safety circuit may be configured to prevent the CEW from applying pulse trains to the target after a predetermined number of pulse trains. The first pulse train may include two or more pulses having waveforms substantially identical with each other, each of the waveforms of the two or more pulses having both a positive voltage segment and a negative voltage segment.