Patents Examined by Christopher Shin
-
Patent number: 8539453Abstract: In an embodiment, a kernel performs autonomic input/output tracing and performance tuning. A first table is provided in a device driver framework and a second table in a kernel of a computer. An input/output device monitoring tool is provided in the device driver framework. A plurality of instructions in the kernel compares each value in the first table with each value in the second table. Responsive to a match of a value in the first table and a value in the second table, the kernel automatically runs a command line to perform a system trace, a component trace, or a tuning task. The first table is populated with a plurality of values calculated from a plurality of data in a plurality of device memories and in the controller memory and the second table is populated in accordance with a second plurality of inputs to the command line interface.Type: GrantFiled: June 30, 2010Date of Patent: September 17, 2013Assignee: International Business Machines CorporationInventors: Diane G. Flemming, Greg R. Mewhinney, Brian C. Twichell, David B. Whitworth
-
Patent number: 8533380Abstract: An apparatus for peer-to-peer communication over a Universal Serial Bus (USB) link, the apparatus comprising a USB 3.0 compliant switch to be coupled between a first peer unit and a second peer unit to form a first path, wherein each of the first peer unit and the second peer unit supports a USB type of communication a USB 2.0 compliant bridge to be coupled between the first peer unit and the second peer unit to form a second path a detector to detect the USB type of each of the first peer unit and the second peer unit and a controller to establish the USB type of communication between the first peer unit and the second peer unit over a USB link via the first path or the second path, wherein the controller is configure to selectively switch the USB link to the first path or the second path based on the USB types of the first peer unit and the second peer unit.Type: GrantFiled: July 13, 2011Date of Patent: September 10, 2013Assignee: Ours Technology Inc.Inventor: Ming-Te Chang
-
Patent number: 8533373Abstract: A dynamic A-MSDU enabling method is disclosed. The method enables the recipient of an aggregate MAC service data unit (A-MSDU) under a block ACK agreement to reject the A-MSDU. The method thus distinguishes between A-MSDU outside of the block ACK agreement, which is mandatory, from A-MSDU under the block ACK agreement, which is optional. The method thus complies with the IEEE 802.11n specification while enabling the recipient to intelligently allocate memory during block ACK operations.Type: GrantFiled: January 7, 2013Date of Patent: September 10, 2013Assignee: Intel CorporationInventor: Solomon Trainin
-
Patent number: 8522063Abstract: A computing system is described that includes a main system bus that remains active while said computing system operates within a non main CPU/OS based operational state. The computing system also includes a controller that operates functional tasks while the computing system is within the non main CPU/OS based operational state. The computing system also includes an I/O unit coupled to the main system bus that remains active while the computing system operates within the non main CPU/OS based operational state.Type: GrantFiled: April 24, 2012Date of Patent: August 27, 2013Assignee: Intel CorporationInventors: James P. Kardach, Brian V. Belmont, Muthu K. Kumar, Riley W. Jackson, Gunner Danneels, Richard A. Forand, Vivek Gupta, Jeffrey L. Huckins, Kristoffer D. Flemming, Uma M. Gadamsetty
-
Patent number: 8516461Abstract: A method provides efficient dispatch/completion of an N Dimensional (ND) Range command in a data processing system (DPS). The method comprises: a compiler generating one or more commands from received program instructions; ND Range work processing (WP) logic determining when a command generated by the compiler will be implemented over an ND configuration of operands, where N is greater than one (1); automatically decomposing the ND configuration of operands into a one (1) dimension (1D) work element comprising P sequentially ordered work items that each represent one of the operands; placing the 1D work element within a command queue of the DPS; enabling sequential dispatching of 1D work items in ordered sequence from to one or more processing units; and generating an ND Range output by mapping the 1D work output result to an ND position corresponding to an original location of the operand represented by the 1D work item.Type: GrantFiled: September 15, 2012Date of Patent: August 20, 2013Assignee: International Business Machines CorporationInventors: Gregory Howard Bellows, Brian H. Horton, Joaquin Madruga, Barry L. Minor
-
Patent number: 8510483Abstract: There is provided a transmitter device including an interface unit that is an interface for connection to a receiver device via a transmission path, a pre-emphasis unit configured to generate a pre-emphasis signal, the pre-emphasis signal being obtained by adding to an input signal another signal for compensating for a high-frequency component of the input signal, and a transmission control unit configured to acquire identification information indicating whether the receiver device is capable of performing a process of receiving the pre-emphasis signal, switch the receiver device to a state in which the receiver device is capable of performing the process of receiving the pre-emphasis signal in accordance with the identification information, and control the pre-emphasis unit to generate the pre-emphasis signal.Type: GrantFiled: May 18, 2011Date of Patent: August 13, 2013Assignee: Sony CorporationInventor: Shigehiro Kawai
-
Patent number: 8510494Abstract: Memory associated with a mobile communication device, such as memory removably inserted into a memory card slot, may be accessed, in the alternative, by a mobile communication platform or by a remote USB host. A memory access module connected to the memory card slots is operative in one of two modes: a pass-through mode and a USB mode. In the pass-through mode, the memory card slots are directly connected, via switching circuits, to memory interfaces on the mobile communication platform. A USB interface on the mobile communication platform may additionally be connected, in pass-through mode, via a USB hub to a remote USB host. In the USB mode, the memory card slots are connected, via switching circuits, second memory interfaces, and a controller, to a USB hub supporting USB 3.0 transfer protocols, and accessible by a remote host.Type: GrantFiled: August 23, 2010Date of Patent: August 13, 2013Assignee: ST-Ericsson SAInventors: Pierre-Jean Pietri, Peter Thomsen, Morten Christiansen
-
Patent number: 8495604Abstract: A system provides efficient dispatch/completion of an N Dimensional (ND) Range command in a data processing system (DPS). The system comprises: a compiler generating one or more commands from received program instructions; ND Range work processing (WP) logic determining when a command generated by the compiler will be implemented over an ND configuration of operands, where N is greater than one (1); automatically decomposing the ND configuration of operands into a one (1) dimension (1D) work element comprising P sequentially ordered work items that each represent one of the operands; placing the 1D work element within a command queue of the DPS; enabling sequential dispatching of 1D work items in ordered sequence from to one or more processing units; and generating an ND Range output by mapping the 1D work output result to an ND position corresponding to an original location of the operand represented by the 1D work item.Type: GrantFiled: December 30, 2009Date of Patent: July 23, 2013Assignee: International Business Machines CorporationInventors: Gregory H. Bellows, Brian H. Horton, Joaquin Madruga, Barry L. Minor
-
Patent number: 8495264Abstract: Parallel data generated by demultiplexing received serial data such as in a Serial RapidIO (SRIO) data stream can become misaligned as a result of, e.g., clock tolerance compensation (CTC) processing at the receiver. In one embodiment of the invention, the misaligned parallel data is properly aligned based on a mapping from each of a finite number of possible previous alignment conditions (e.g., words A-D) to a corresponding finite number of possible subsequent alignment conditions (e.g., words B-G). The change from a previous alignment condition to a different subsequent alignment condition is recognized by determining the location of start-of-packet (SOP) or start-of-control-symbol (SOC) data in the parallel data stream.Type: GrantFiled: July 8, 2011Date of Patent: July 23, 2013Assignee: Lattice Semiconductor CorporationInventors: Michael Hammer, Jin Zhang
-
Patent number: 8495268Abstract: In a set device having a card host LSI, high-speed data transmission to a removable card or the like is realized without hindering a reduction in size and weight. The card host LSI and the removable card are connected to a card bus complying with predetermined card bus specifications. A microcomputer module and the card host LSI are connected also by a card bus complying with the predetermined card bus specifications.Type: GrantFiled: August 23, 2010Date of Patent: July 23, 2013Assignee: Panasonic CorporationInventors: Takehisa Hirano, Makoto Fujiwara, Koichiro Fue, Rie Itou, Kentaro Shiomi
-
Patent number: 8484402Abstract: A data transmission interface, for coupling to an external apparatus, including a first signal transmission line and a second signal transmission line, for transmitting a differential signal, a first resistor and a voltage-variable component, selectively connected to the first signal transmission line, and a second resistor, connected to the second signal transmission line, wherein, when the data transmission interface is coupled to the external apparatus, the voltage-variable component is connected to the first signal transmission line, and the first signal transmission line presents a first voltage in response to the external apparatus.Type: GrantFiled: February 11, 2011Date of Patent: July 9, 2013Assignee: MStar Semiconductor, Inc.Inventors: Chuan-Wen Chen, Chia-Jung Chang
-
Patent number: 8484392Abstract: A method for allocating resources of a host channel adapter includes the host channel adapter identifying an underlying function referenced in the first resource allocation request received from a virtual machine manager, determining that the first resource allocation request specifies a number of physical collect buffers (PCBs) allocated to the underlying function, allocating the number of PCBs to the underlying function, determining that the first resource allocation request specifies a number of virtual collect buffers (VCBs) allocated to the underlying function, and allocating the number of VCBs to the underlying function. The host channel adapter further receives command data for a command from the single virtual machine, determines that the underlying function has in use at least the number of PCBs when the command data is received, and drops the command data in the first command based on the underlying function having in use at least the number of PCBs.Type: GrantFiled: May 31, 2011Date of Patent: July 9, 2013Assignee: Oracle International CorporationInventors: Brian Edward Manula, Magne Vigulf Sandven, Haakon Ording Bugge, Ola Torudbakken
-
Patent number: 8484400Abstract: Embodiments of the invention relate to a (e.g., hybrid) redundant array of independent disks (RAID)-based storage control board. Specifically, the present invention relates to a storage control board having a RAID controller with a peripheral component interconnect express (PCI-e) interface. In one embodiment, the RAID controller is coupled to an input/output (I/O) hub and a set (at least one) of PCI-e slots, which themselves can receive cards such as a fiber channel (FC) add-on card, a serial attached small component system interface (SAS) add-on card, or a PCI-e bridge add-on card. The I/O hub can be coupled to a set (at least one) of processors, each of which can be coupled to a main memory module or the like.Type: GrantFiled: February 1, 2011Date of Patent: July 9, 2013Assignee: Taejin Info Tech Co., Ltd.Inventor: Byungcheol Cho
-
Patent number: 8473666Abstract: Systems and methods of re-enumerating peripheral devices operatively connected to a computer system are provided. In one example, a system is configured to disable an existing connection between an operating system and a peripheral device established through a device driver by re-describing the peripheral device to the OS. In another example, the system can be further configured to execute operation(s) on the peripheral device without new driver installation using communication channels native to the OS. Once the operation(s) are complete, the system can be configured to restore the existing connection.Type: GrantFiled: June 27, 2011Date of Patent: June 25, 2013Assignee: Schneider Electric IT CorporationInventors: Daniel C. Cohen, Noah L. Pendleton, Maarten Janson, James S. Spitaels
-
Patent number: 8473664Abstract: In some embodiments a computing device includes a coupler that is able to be coupled to an external device, and an eject button to signal the computing device that a user wishes to safely uncouple the external device from the computing device. Other embodiments are described and claimed.Type: GrantFiled: December 11, 2006Date of Patent: June 25, 2013Assignee: Intel CorporationInventor: Avener Stemmer
-
Patent number: 8473691Abstract: A memory management device, an image forming apparatus, and an image forming method include an OS-management-memory-region managing unit configured to divide a physical memory space into a management region managed by an OS and a non-management region that is not managed by the OS, assign the management region to the virtual memory space, and acquire and/or free a memory space of the management region. The image forming apparatus includes an OS-non-management-memory-region managing unit assigning the non-management region to the virtual memory space so that an application program acquires and/or frees a memory space of the non-management region. The OS-management-memory-region managing unit includes a window region provided so that the OS refers to the non-management region. Data is read and/or written from and/or into the OS-non-management region via the window region.Type: GrantFiled: January 19, 2010Date of Patent: June 25, 2013Inventor: Ryosuke Ohgishi
-
Patent number: 8463963Abstract: Channels, which are assigned to each individual lower-level device that are the input/output destinations for HART communications signals that are produced through superimposing, onto a 4 to 20 mA DC signal, digital signals that have been converted into 1200 Hz and 2200 Hz frequency signals; a first controlling portion for controlling communications with a higher-level device; and HART communications portions, provided for each individual channel, for extracting frequency signals from the HART communications signals received through the channels, and for sending to the controlling portion digital signals corresponding to the frequency signals, are provided; where the first controlling portion sends, to the higher-level device, the digital signals received from the individual HART communications portions.Type: GrantFiled: June 28, 2011Date of Patent: June 11, 2013Assignee: Azbil CorporationInventors: Takashi Komiyama, Kentaro Kitahori, Yoshinori Monaka
-
Patent number: 8443130Abstract: A Universal Series Bus USB port detection and testing circuit, configured to detect the voltage output of a USB port of an electronic device, includes a voltage comparing circuit and an indicating circuit. The indicating circuit is connected to an output terminal of the voltage comparing circuit. The voltage comparing circuit compares the voltage output from the USB port against a reference voltage and output a signal whereby the indicating circuit indicates whether the voltage is within, or above, or below, the standard range.Type: GrantFiled: June 27, 2011Date of Patent: May 14, 2013Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.Inventors: Ling-Yu Xie, Xing-Ping Xie
-
Patent number: 8433830Abstract: Disclosed herein are techniques to execute tasks with a computing device. A first task is initiated to perform an operation of the first task. A buffer construct that represents a region of memory accessible to the operation of the first task is created. A second task is initiated to perform of an operation of the second task that is configured to be timed to initiate in response to the buffer construct being communicated to the second task from the first task.Type: GrantFiled: June 10, 2012Date of Patent: April 30, 2013Assignee: Calos Fund Limited Liability CompanyInventors: Peter Mattson, David Goodwin
-
Patent number: 8417857Abstract: An apparatus and method of scheduling signals. In one embodiment, the method includes a first circuit receiving a first plurality of reference values. The first circuit selects a reference value from the first plurality according to a first reference identifier (ID) that is stored in memory. The first circuit compares the selected reference value to a first match value.Type: GrantFiled: March 13, 2012Date of Patent: April 9, 2013Assignee: Renesas Electronics America Inc.Inventors: Samuel J. Guido, Jeremy W. Brodt, Jeffrey T. Sieber