Abstract: A phase-locked loop circuit, which obtains a signal synchronized with a phase of an input signal, including a synchronizing portion, and a data portion having a voltage controlled oscillator, a frequency phase comparator, a phase comparator, and a control circuit. The frequency phase comparator detects the phase difference and the frequency difference between the input signal and the output of the voltage controlled oscillator and the phase comparator detects the phase difference between the input signal and the output of the voltage controlled oscillator. The control circuit controls the voltage controlled oscillator, at least during a portion of the synchronizing signal portion, in accordance with the output of the frequency phase comparator, and, during the data signal portion, in accordance with the output of the phase comparator.

Abstract: A modulated elongate cavity oscillator with minimized modulation nonlinearities includes a first cavity having dimensions which determine the fundamental resonant frequency of the oscillator, a gain element disposed in said first cavity that provides amplification to sustain oscillation, and a varactor diode disposed in said first cavity for modulating the fundamental frequency. A first waveguide is coupled to the first cavity for absorbing modes higher than the mode of the fundamental frequency which have an electric field maxima concurrent with the longitudinal center line of the first cavity. A second waveguide is coupled to the first cavity for absorbing modes higher than the mode of fundamental frequency which have an electric field minima concurrent with the longitudinal center line of the first cavity, whereby the first and second waveguides provide effective attenuation of higher order modes such that modulation nonlinearities due to the existence of higher order modes are substantially eliminated.

Abstract: A system and method for amplitude modulating a carrier signal with an audio or other information input signal relies on multivibrators and comparators initiating a logic controlled processing technique for providing two sinusoids, each a fundamental frequency waveform, the two having a mutual phase relationship defined by intermediate processing steps such that they differ in phase from 0 to 180 electrical degrees. The comparators output first resultant pulses when the carrier signal is greater than the amplitude of the audio or other information input signal. The first resultant pulses are input to a logic processing network to trigger multivibrators which output overlapping 180.degree. wide pulses, respective phase shifted resultant signal waveforms being formed from the respective comparator outputs.

Abstract: The oscillator includes a two-terminal device (1) as an active element and an impedance-matching network (4) for matching the two-terminal device to a load (A). The impedance-matching network is formed by a coupler (4) having four terminals (2, 3, 7, 8) two of which (7, 8) are terminated with impedances (5, 6) whose values are chosen depending on the output power or frequency to be adjusted or are varied as desired. Another of the terminals is connected to the active two-terminal device (1), and the fourth terminal (3) is the oscillator output.

Abstract: A high frequency generator including a frequency generator and a multiplier, the multiplier including a diode, which multiplies the output frequency of the frequency generator, and shuts off or reduces an output by suspending or suppressing the multiplying operation through the control of a bias voltage applied to the diode used in the multiplier. The system for cutting off the output by controlling the multiplier is very effective for simplifying the circuit structure and reliably turning off the output.

Abstract: An oscillation circuit having a reference voltage circuit for forming a reference voltage by dividing a power supply voltage. The reference voltage circuit supplies the reference voltage to one of the input terminals of the comparing circuit. A charge/discharge voltage is supplied from a junction between a transmission gate circuit and a CR circuit to the other input terminal of the comparing circuit. The comparing circuit compares the charge/discharge voltage with the reference voltage to produce pulse signals.

Abstract: For demodulating an FM-carrier which is, for example, modulated by a video signal and two sound subcarriers, a Gilbert mulitplier (13) and a phase shifting circuit (12) are used. The phase shifting circuit is formed by elements of a Gaussian type bandpass-ladder filter consisting of at least three sections each representing one pole. The output (10) of the phase shifting circuit is taken from the output of a filter section prior to the last filter section.

Abstract: A frequency synthesizer tuning circuit oscillator having an output signal frequency controlled by an input control signal is compared with the frequency specified by a source of data. The digital difference between the two compared frequencies comprises a multi-bit digital error signal of most and least significant bits. An error control signal for applying to the oscillator control input is derived by modulating the average pulse duration of a periodic pulse signal with the most significant bits of the digital error signal when the digital error signal is greater than a minimum frequency. The periodic pulse signal is amplitude modulated with the least significant bits of the digital error signal when the digital error is less than a maximum frequency. Both amplitude and pulse duration modulation of the periodic pulse signal occurs with the most and least significant bits of the digital frequency error signal when the frequency difference is between the maximum and minimum frequencies.

Abstract: Method for demodulating FSK signals in which zero crossings of the FSK signals are detected and processed further. A FSK demodulator including an address-generating logic and a memory connected to the address-generating logic. The FSK signals are delivered to the input side of and control the address-generating logic. At a system clock frequency, the necessary address sequence is supplied to the memory for reading out a pulse reply from the memory for each zero-crossing of the FSK signal. In the memory are stored time-sequential values of a pulse reply having a given duration which emulate the output of a digital non-recursive transversal filter having lowpass transfer characteristic upon an input pulse of given duration. The address generating logic supplies a definite counting address to each zero crossing on the input side which is not yet assigned to another zero crossing.

Abstract: An LC-type oscillator employing a differential amplifier to switch a tank circuit in response to a feedback signal. A voltage controlled variable capacitor is employed to control the frequency of oscillation. The bias across the variable capacitor is closely controlled to avoid errors in the frequency of oscillation during the period of startup, which would otherwise create an undesired error in the oscillation frequency.

Abstract: A frequency synthesizer used for a frequency modulation (FM) transceiver which uses negative feedback to make the modulation characteristics linear and stable over a wide frequency range. The negative feedback is comprised of a frequency mixer, which mixes the outputs of a local oscillator and a voltage controlled oscillator, and a frequency divider and demodulator, which act on the output of the frequency mixer and supply the demodulated output signal to an adder, where it is added in reverse phase to the modulating signal.

Abstract: A PSK modulator for use with a phase lock locked loop power amplifier circuit in a communications transmitter wherein one signal channel of the modulator includes a delay equal to one-fiftieth of the period of the highest bit rate applied to the modulator so that the amplitude of the modulator output signal does not collapse to zero.

Abstract: A digital FM demodulation circuit provides improved resolution by selecting from a group of at least four of the most recent samples, a subgroup of three samples. The first and last samples of the selected subgroup are summed and the sum is divided by the intermediate sample.

Abstract: A system for demodulation of phase shift keying signals with a bandpass filter tracked to input carrier frequency variation. This system provides means for detecting phase variations in the regenerated carrier wave from the demodulated signal, and means for controlling the phase of the regenerated carrier wave to compensate for the demodulation error owing to input carrier frequency variation.

Abstract: An improved PLL frequency synthesizer for producing a signal of frequency f.sub.T -f.sub.IF or f.sub.T +f.sub.IF is provided with a detection-control circuit which detects from the voltage applied to a voltage controlled oscillator (VCO) in the PLL that the VCO frequency reaches an upper or lower limit frequency and upon the detection forces the VCO to fall into the capture range. The improved PLL frequency synthesizer can acquire lock even if it has been thrown out of the capture range.

Abstract: A microwave transistor oscillator/doubler comprising a Field-Effect Transistor with Terminals G, D and S in combination with a coupling network connected to the terminals G, D and S and composed of microstrip lines with lengths equal to a quarter wavelength at the second harmonic of a fundamental frequency. The doubler further comprises a bias circuit for supplying appropriate voltages to the FET terminals, and an impedance coupler for coupling from the FET D-S terminals to a waveguide load. The coupling network optimizes feedback at the second harmonic between the D-S and G-S ports of the FET to prevent destructive harmonic feedback interaction with the desired signal while providing optimum conditions for feedback at the fundamental frequency. The bias circuit is connected to the coupling network and includes a second network of transmission line elements of lengths equal to a quarter wavelength at the fundamental in order to prevent dissipation of the fundamental frequency therein.

Abstract: A high-frequency negative resistance circuit for use in a voltage controlled crystal oscillator has a pair of input terminals thereby defining an input current and input voltage. The high-frequency negative resistance circuit includes a sensing circuit for sensing the input current, a biasing voltage source and a load impedance connected to the voltage source. The high-frequency negative resistance circuit further comprises a current mirror circuit connected to the sensing circuit and to the load impedance for producing a current in the load impedance. The current in the load impedance is approximately equal to the input current. The current mirror circuit also controls the sensing circuit to cause the input voltage to decrease as the input current increases. Decreasing input voltage with increasing input current defines the negative resistance. When this negative resistance circuit is configured with a crystal and a voltage controlled capacitance, an oscillator capable of high-frequency operation results.

Abstract: A modulated signal level detecting circuit comprising a synchronized detector 1 of the modulated input signal, a phase-locked loop 5, 14, 16 connected to the input signal for providing a reproduced carrier wave of the input signal, a switch 21 included in the phase-locked loop, and a signal level detecting circuit 22, 23 for detecting the level of the unmodulated signal and opening the switch and thereby breaking the loop when this level exceeds a fixed limit.

Abstract: A phase-locked loop comprises a reference source that produces a signal at a fixed frequency that is applied to a phase detector. That signal is compared in the phase detector with a divided quotient signal that is proportional to the output of a voltage-controlled oscillator. Comparison of the phase difference between the two signals creates an output voltage that is taken to an adaptive filter. The adaptive filter is controlled by an external logic circuit that selects a narrow bandwidth when phase lock is detected and a wider bandwidth when the absence of phase lock is detected. The divisor of the divider in the loop is also changed in response to a signal based on the phase difference. The output of the adaptive filter is taken to a summer which adds a modulating signal to form a combined controlled voltage for the VCO.

Abstract: A variable-frequency main oscillator of digitally tunable high output frequency f.sub.A is controlled by the integrated output voltage of a phase discriminator receiving on the one hand a relatively low comparison frequency and on the other hand a matching feedback frequency stepped down from output frequency f.sub.A by frequency division or by heterodyning with an auxiliary frequency f.sub.H of the same order of magnitude from an ancillary oscillator, a difference frequency f.sub.D =f.sub.A -f.sub.H is fed to a frequency discriminator delivering a corrective voltage, independent of that emitted by the phase discriminator through a filter network, to the control input of the main oscillator. A pair of frequency selectors varying the feedback frequency and/or the comparison frequency enable the output frequency f.sub.A to be adjusted in coarse and fine tuning steps, the coarse adjustments being also applied to the auxiliary frequency f.sub.H to limit the excursions of the difference frequency f.sub.D.