Abstract: A method is disclosed for mitigating phase noise at high frequencies in 5G and 6G. Quadrature modulation schemes, in which orthogonal branches are amplitude modulated, are susceptible to phase noise which rotates the branches, causing demodulation faults. Disclosed is a single-branch reference signal that can mitigate phase noise. The transmitter can transmit a particular resource element having a normal amplitude in one branch, and zero amplitude in the orthogonal branch. The receiver can then measure the amplitudes of the particular resource element as-received (with phase noise), and determine a phase rotation angle according to a ratio of the two branch amplitudes. The receiver can then correct the branch amplitudes of each message element, and thereby negate the effect of the phase noise. The disclosed procedures can thereby make high-frequency, high-reliability communication feasible, at extremely low cost.
Abstract: A method for adjusting a line width and a line gap of a differential signal pair includes performing a new parameter setting step, a distance difference of center calculating step, a reference polygon generating step and a differential signal pair adjusting step. The new parameter setting step is performed to set a new line width and a new line gap of the new differential signal line pair. The distance difference of center calculating step is performed to calculate a difference between an original center distance of the original differential signal line pair and a new center distance of the new differential signal line pair. The reference polygon generating step is performed to generate a reference polygon from an original center line of the original differential signal line pair. The differential signal pair adjusting step is performed to adjust the reference polygon to the new differential signal line pair.
Type:
Grant
Filed:
November 10, 2021
Date of Patent:
January 10, 2023
Assignee:
Universal Global Technology (Huizhou) Co., Ltd.
Abstract: A method monitors a sensor clock signal in a sensor unit, which is generated and output for a data transfer between the sensor unit and a control unit with a predefined period duration. A reference clock signal having a predefined reference period duration is received. The sensor clock signal is compared to the reference clock signal. Based on the comparison, a deviation of the current period duration of the sensor clock signal from a target period duration is detected. Based on the detected deviation, a counting pulse or a reset pulse is emitted.
Type:
Grant
Filed:
September 19, 2018
Date of Patent:
January 10, 2023
Assignee:
Robert Bosch GmbH
Inventors:
Michael Haug, Guenter Weiss, Michel Walz, Daniela Bommer, Frank Schou, Rainer Gschwind-Schilling, Darko Rozic, Mustafa Ajanovic, Joerg Conradt, Marlon Ramon Ewert, Kevin Haist
Abstract: A first access point (AP), which is associated with one or more first client stations, receives an announcement frame from a second AP that is associated with one or more second client stations. The announcement frame announces a coordinated multi-user (MU) transmission involving at least the first AP and the second AP, includes an indicator of a frequency resource unit (RU) allocated to the first AP for the coordinated MU transmission. The first AP participates in the coordinated MU transmission using the frequency RU indicated by the announcement frame while the second AP also participates in the coordinated MU transmission.
Abstract: Implementations of the present disclosure relate to a method, system and program product for determining a causality between a plurality of variables.
Abstract: Some embodiments herein describe a radio frequency power semiconductor device that include a first non-linear filter network for compensating for lower frequency noise of a power amplifier. The first non-linear filter network can include a plurality of infinite impulse response filters and corresponding corrective elements to correct for a non-linear portion of the power amplifier. The radio frequency power semiconductor device can further include a second non-linear filter network for compensating for broadband distortion. The second non-linear filter network can be connected in parallel to the first non-linear filter network. The broadband distortion can include digital predistortion and the narrowband distortion can include charge trapping effects. The first non-linear filter network can comprise Laguerre filters. The second non-linear filter network can comprise general memory polynomial filters.
Type:
Grant
Filed:
November 16, 2020
Date of Patent:
December 20, 2022
Assignee:
Analog Devices International Unlimited Company
Inventors:
Patrick Joseph Pratt, Dong Chen, Mark Cope, Christopher Mayer, Praveen Chandrasekaran, Stephen Summerfield
Abstract: Disclosed is a method and apparatus for phase error compensation having tolerance to a cyclic slip. The method includes determining first phase error candidates based on symbol phases of a first block of a received signal, determining an initial estimation error according to the first phase error candidates, determining second phase error candidates based on symbol phases of a second block of the received signal, determining a final estimation error according to the initial estimation error and the second phase error candidates, and compensating for a phase of the received signal according to the final estimation error.
Type:
Grant
Filed:
October 29, 2021
Date of Patent:
November 29, 2022
Assignee:
ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
Inventors:
Sang Rok Moon, Minkyu Sung, Eon-sang Kim, Won Kyoung Lee, Seung-Hyun Cho
Abstract: An integrated circuit for generating an equalized signal, according to a channel, from serial data includes a shift register that extracts a symbol sequence from the serial data. A data storage stores values of an equalized digital signal corresponding to potential symbol sequences corresponding to a filter coefficient sequence. A lookup table outputs the equalized digital signal of a value corresponding to the extracted symbol sequence. A digital-to-analog converter (DAC) converts the equalized digital signal into the equalized signal. A controller refreshes the lookup table, based on at least one of values stored in the data storage and values included in the lookup table, in response to a control signal.
Type:
Grant
Filed:
July 12, 2021
Date of Patent:
November 29, 2022
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Gun-Il Kang, June-Hee Lee, Byung-Wook Cho
Abstract: A coupler comprising a silicon substrate with one or more double slot radiators configured to transmit or receive an RF signal, a slot balun circuit configured to isolate the RF signal, and a grounded coplanar waveguide configured to propagate the RF signal in a horizontal direction. The coupler can be included on an integrated chip with a second coupler and the chip can be positioned over two waveguides such that each coupler is positioned within the center of each waveguide aperture.
Abstract: Methods, apparatus, systems and articles of manufacture to optimize execution of a machine learning model are disclosed. An example apparatus includes a quantizer to quantize a layer of a model based on an execution constraint, the layer of the model represented by a matrix. A packer is to pack the quantized layer of the matrix to create a packed layer represented by a packed matrix, the packed matrix having non-zero values of the matrix grouped together along at least one of a row or a column of the matrix. A blocker is to block the packed layer into a blocked layer by dividing the non-zero values in the packed matrix into blocks. A fuser is to fuse the blocked layer into a pipeline. A packager is to package the pipeline into a binary.
Type:
Grant
Filed:
June 28, 2019
Date of Patent:
November 22, 2022
Assignee:
Intel Corporation
Inventors:
Mikael Bourges-Sevenier, Adam Herr, Sridhar Sharma, Derek Gerstmann, Todd Anderson, Justin Gottschlich
Abstract: Systems and methods are provided for optimizing offset compensation in a receiver with multiple offset compensation D/A converters. At each stage where offset cancellation is applied, there is a fan-out of two or more. At the final stage, comparator offset compensation codes are summed and compared against a digital reference. In one version the digital reference is zero. A second implementation has a non-zero digital reference which is the sum of comparator offsets stored from start up. The difference between the sum of offsets and digital reference is applied to a digital accumulator. The most significant bits of the digital accumulator are applied to a digital D/A converter, which cancel analog offsets in an intermediate stage of amplifiers. The summation of offsets feeding into an accumulator is implemented for all preceding stages.
Type:
Grant
Filed:
March 17, 2021
Date of Patent:
November 22, 2022
Assignee:
ANALOG DEVICES, INC.
Inventors:
John Kenney, Robert Schell, Rahul Vemuri
Abstract: A signal transceiving system and a signal receiver thereof are provided. The signal transceiving system includes a signal transmitter. The signal transmitter includes a first data buffer, a comparator, and an encoder. The first data buffer receives transmitted data and provides previously transmitted data. The comparator receives currently transmitted data and receives the previously transmitted data. The comparator compares, in a first mode, the previously transmitted data with the currently transmitted data to generate a data variation information. The encoder generates, in the first mode, at least one index value and a corresponding instruction signal according to the data variation information. The signal transmitter sends the at least one index value which is a serial signal and the instruction signal to a signal receiver.
Abstract: A method for performing a listen-before-talk procedure in a first transceiver device (N1) for wireless electromagnetic communication in a frequency band (150) is disclosed. A first transceiver device (N1) configured to perform the method is also disclosed. The method comprises receiving at the first transceiver device (N1) a stream of data (11) from a second transceiver device (N2), and determining whether the second transceiver device (N2) is capable of receiving in only a single or in two polarization directions. If the second transceiver device (N2) is capable of receiving in two polarization directions, then the method comprises determining and using an energy threshold that is larger than a regulated energy threshold for listen-before-talk within the frequency band (150).
Type:
Grant
Filed:
August 12, 2019
Date of Patent:
November 15, 2022
Assignee:
SONY GROUP CORPORATION
Inventors:
Olof Zander, Rickard Ljung, Erik Bengtsson, Fredrik Rusek
Abstract: A bidirectional communication channel between a robotic lawnmower and a charging station for data communication between the robotic lawnmower and the charging station. The communication channel includes a first interface provided on the robotic lawnmower and a second interface provided on the charging station. The first and second interface are connected to each other through charging contacts and configured to communicate data in a Direct Current, DC-balanced way. Each interface is provided with an inductor in a charging power path between the charging station and the robotic lawnmower. Each inductor includes a high impedance for enabling a high data transmission rate for frequencies above 50 kHz.
Abstract: Examples described herein include methods, devices, and systems which may compensate input data for I/Q imbalance or noise related thereto to generate compensated input data. In doing such the above compensation, during an uplink transmission time interval (TTI), a switch path is activated to provide converted input data to a receiver stage including a recurrent neural network (RNN). The RNN may calculate an error representative of the noise based partly on the input signal to be transmitted and a feedback signal to generate filter coefficient data associated with the I/Q imbalance. The feedback signal is provided, after processing through the receiver, to the RNN. During an uplink TTI, the converted input data may also be transmitted as the RF wireless transmission via an RF antenna. During a downlink TTI, the switch path may be deactivated and the receiver stage may receive an additional RF wireless transmission to be processed in the receiver stage.
Abstract: A novel energy-efficient multiplication circuit using analog multipliers and adders reduces the distance data has to move and the number of times the data has to be moved when performing matrix multiplications in the analog domain. The multiplication circuit is tailored to bitwise multiply the innermost product of a rearranged matrix formula to output the generate a matrix multiplication result in form of a current that is then digitized for further processing.
Abstract: By a transmission method according to one aspect of the present disclosure, in a broadcasting system that generates a first broadcasting signal and a second broadcasting signal by performing multi-antenna encoding on program data, and wirelessly transmits a first broadcasting signal and a second broadcasting signal, a first transmit station transmits the first broadcasting signal, a second transmit station transmits the second broadcasting signal, the first transmit station and the second transmit station transmit the first broadcasting signal and the second broadcasting signal to an overlapping area at an identical time using an overlapping frequency band, polarized wave transmitted from the first transmit station differs from polarized wave transmitted from the second transmit station, and arrangement of the first transmit station differs from arrangement of the second transmit station.
Type:
Grant
Filed:
May 11, 2021
Date of Patent:
November 1, 2022
Assignee:
PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
Abstract: It is made possible to favorably perform signal transfer between a plurality of daisy-chain-connected devices. There is a communication line for performing communication between a first electronic device and a second electronic device. A data generating section generates first data to be transmitted to the first electronic device. Then, a data input section inputs the first data to a first position on the communication line. In addition, a first data suppressing section is provided at a second position on the communication line, the second position being closer to the second electronic device than the first position is, and the first data suppressing section prevents the first data from being sent to the second electronic device.
Abstract: A wideband tunable frequency single-subband converter is proposed. The wideband frequency tunable converter operates within a wideband and tunable frequency range, and has process, voltage, and temperature (PVT) tracking capability. In one embodiment, the wideband converter comprises a frequency tunable polyphase filter having a plurality of switchable polyphase resistors. The polyphase resistors are controlled by a frequency tuning control signal to achieve wideband frequency tunability. In a preferred embodiment, a triode mode transistor is used as a polyphase resistor, and a different resistance value of the polyphase filter is realized by turning on one or multiple of the different transistors in triode mode. In addition, a constant Gm(R) bias generator is used to provide the gate biases to the triode mode transistors to maintain a constant and stable resistance value across PVT and other variation.