Abstract: A power transmission apparatus 101 includes a communication unit 206 configured to wirelessly communicate with a power reception apparatus using an antenna, a power transmission unit 203 configured to wirelessly transfer power to the power reception apparatus using the antenna, a detection unit 204 configured to measure at least either a voltage or a current output from the antenna in a period where the transfer of the power is stopped and the communication by the communication unit 206 is not performed, and determine that there is an object different from the power reception apparatus based on the result of the measurement, and a control unit 201 configured to, if there is determined to be the object different from the power reception apparatus, restrict the transfer of the power.

Abstract: An automotive power system has circuitry, including a capacitor, inductor, and switch in series, connected such that a terminal of the switch is directly connected with only one phase leg of an inverter system controller between an electric machine and the inverter system controller and a terminal of the capacitor is referenced to a negative terminal of a traction battery. The switch is closed while the traction battery is being charged with energy from an AC grid, and open while the traction battery is not being charged.

Abstract: A gate driver circuit provides a soft-start current to a gate of a power switch during a soft-start period to soft-start the power switch. The gate driver circuit includes: a first current mirror circuit, configured to mirror a reference current according to a mirror ratio to generate a mirror output current; and a path switch coupled on a signal path between the mirror output current and the soft-start current. The soft-start current is generated according to the mirror output current. The path switch is configured to turn off the signal path when the power switch is off. The mirror ratio of the first current mirror circuit is reduced during a predetermined period in the soft-start period to compensate for a spike caused by the path switch being turned on during the soft-start period, such that the soft-start current is prevented from surging during the soft-start period.

Abstract: The present disclosure relates to an electromagnetic interference (EMI) filter for preventing noise emitted from a power line cable, and an isolated type active EMI filter having no additional elements on a power line. The EMI filter includes a common-mode (CM) choke disposed on a power source side, a Y-cap disposed on an EMI source side, and a sensing winding configured to sense a current. The EMI filter also includes an amplifier configured to amplify the noise current, and a transformer configured to inject a signal of the secondary coil into the Y-cap as a compensation signal.

Abstract: An electric work vehicle includes a frame and a traction device coupled to the frame. Furthermore, the electric work vehicle includes an electric motor configured to drive the traction device and an energy storage device configured to supply electric energy to the electric motor. Additionally, the electric work vehicle includes an electric charging port configured to receive electric power from a power source, with the electric charging port being electrically coupled to the energy storage device. Moreover, the electric work vehicle includes an electric outlet configured to provide electric power to a remote device, with the electric outlet being electrically coupled to the electric charging port and the energy storage device. In addition, the electric work vehicle includes a computing system configured to control a distribution of the electric power received by the electric charging port between the energy storage device and the electric outlet.

Abstract: To provide a technique enabling stable protection of a switching element at the time of short circuit by suppressing jumping of the voltage Vge between a gate terminal and a reference potential terminal at the time of occurrence of short circuit. A power semiconductor module having at least an upper arm, includes: a Zener diode connected between a gate terminal and a reference potential terminal and provided on the outside of a semiconductor chip of a switching element and provided on an insulating substrate; a casing which houses the insulating substrate; and a plurality of external electrodes provided to the casing and connected to the gate terminal and the reference potential terminal.

Abstract: Systems and methods for a tunable digitally controlled oscillator. In one aspect, an apparatus includes one or more lattices of delay stages. Multiple, different paths may be selected through the lattices. Each path begins at a first delay stage with an input connected to a signal input node and ends at a second delay stage with an output connected to a signal output node.

Abstract: A controller according to an embodiment includes a determiner and an output controller. The determiner determines a number of participants representing a number of electric power sources that are able to actually participate in supplying of electric power to an electric system. The output controller causes each of the electric power sources that are able to actually participate in the supplying to output, to the electric system, an electric energy determined by dividing a predetermined electric energy by the number of participants. The controller according to the embodiment may further include a granter. The granter grants an incentive to users who use the electric power sources that actually participate in the supply.

Abstract: The present disclosure includes an integrated circuit having a housing, an optical port exposed on an exterior of the housing, and gate driver circuitry configured to generate a drive signal at an output of the integrated circuit to drive a gate terminal of a wide band gap (WBG) power device. The integrated circuit may include an optical receiver coupled to the optical port and having an electrical output coupled to an input of the gate driver circuitry, the optical receiver configured to receive an optical signal via the optical port and generate an electrical signal at the electrical output based on the optical signal. The integrated circuit may also include a power supply system configured to convert a first voltage to one or more power supply voltages powering the gate driver circuitry, the first voltage being a voltage at a terminal of the WBG power device.

Abstract: This disclosure relates to a bootstrapped switching circuit. Example embodiments include a bootstrapped switching circuit (100) comprising: a positive output node (109+); a negative output node (109?); a first input node (106a) configured to receive a first input voltage (Vin1); a second input node (106b) configured to receive a second input voltage (Vin2). First, second third and fourth switches (101-104) are coupled between the input and output nodes (106a, 106b, 109+, 109?). A first negative bootstrapped level shifter (107a) and a first positive bootstrapped level shifter (107b) coupled between the first input node (106a) and a first clock signal circuit (110a) provide control signals to the first and second switches (101, 102). A second negative bootstrapped level shifter (108a) and a second positive bootstrapped level shifter (108b) coupled between the second input node (106b) and a second ground referenced supply line (110b) provide control signals to the third and fourth switches (103, 104).

Abstract: A frequency generator and a frequency correction method for a frequency generator, which have the purpose to provide a frequency correction technology that actively responds to continuous frequency fluctuations of a clock signal through a frequency measurement period of at least two unit periods. The frequency generator comprises: an oscillator which generates an oscillator clock signal; and a frequency correction circuit which selectively operates in one of a normal mode and a fast mode, which have different correction periods according to the state of the oscillator clock signal.

Abstract: A switch device is described, formed by: a first switch MOS transistor, with its drain terminal connected to a first switch terminal, source terminal connected to an internal source node and gate terminal connected to an internal gate node; a second switch MOS transistor, with its drain terminal connected to a second switch terminal, source terminal connected to the internal source node and gate terminal connected to the internal gate node; and a voltage limiting element connected between the internal gate and source nodes. A driving stage, voltage-referred to the internal source node, drives the switching of the bidirectional switch, as a function a first and a second driving signals, and has a driving transistor and a switching transistor connected to each other in inverter configuration.

Abstract: Embodiments of the present application provide a cooperative pulse generation apparatus, device and generation method. The synergistic pulse generation apparatus comprises a drive circuit and a pulse generation circuit. The drive circuit receives a first control signal and a second control signal sent by a host computer, converts the first control signal into a first drive signal, and converts the second control signal into a second drive signal. The pulse generation circuit comprises a first power supply, a second power supply, a first pulse generation module, and a second pulse generation module. The first pulse generation module stores electric energy supplied by the first power supply and discharges the electricity under the control of the first drive signal to form a first pulse signal, and the second pulse generation module stores electric energy provided by the second power supply and discharges the electricity under the control of the second drive signal to form a second pulse signal.

Abstract: In one aspect, a transfer switch configured to operate in different transfer modes is provided. The transfer switch includes first and second inputs, first and second contactors, an output, first and second power stages, and a controller. The first and second inputs are configured to couple with first and second power sources, respectively. The first and second contactors are configured to selectively couple with the first and second inputs, respectively. The output is configured to couple with a load. The first and second power stages are configured to conduct electrical power when active. The controller is configured to determine whether a trigger condition has occurred while the first power stage is active, and in response thereto, to open the first contactor and activate the second power stage to transfer the load from the first power source to the second power source.

Abstract: A sensor based power switch control method includes setting a maximum inrush current, turning on at least one first power switches for charging a loading circuit from a high voltage terminal through the at least one first power switches, sensing a first charging current of the at least one first power switches being turned on by a first sensor, and turning on at least one second power switches for charging the loading circuit from the high voltage terminal through the at least one second power switches when the first charging current starts to drop.

Abstract: A semiconductor device for operating an inductive load, including: a switching element having a control terminal, a low potential terminal and a high potential terminal; a drive circuit configured to apply a control voltage to the control terminal of the switching element to switching-drive the switching element, and operate the inductive load connected to the switching element; an extracting circuit configured to extract control terminal charges from the control terminal of the switching element when the switching element makes a transition from an on state to an off state; and a voltage control circuit connected to a connection point between the low potential terminal of the switching element and the inductive load, the voltage control circuit being configured to clamp a drop in a voltage at the connection point to a predetermined voltage while the extracting circuit is extracting the control terminal charges.

Abstract: A method of resetting a number of functional components in a computing device includes determining a number of cycles required to reset the functional components based on a predetermined voltage controlling a reset synchronizer to run for the determined number of cycles wherein the reset synchronizer controls a reset network connected to the functional components, and wherein the determined number of cycles at a first voltage is different than a determined number of cycles at a second voltage.

Abstract: A power supply system is adapted to supply a power to a load, is connected to a load sharing bus, and includes two power supply devices and a control device. The two power supply devices are connected in parallel to the load, respectively have a maximum power, and respectively output an output power to the load. The control device is electrically connected to the two power supply devices. When a controlling condition is met, one of the two power supply devices with the greatest maximum power adjusts the output power according to a controlling signal from the control device and a sharing signal from the load sharing bus, so that the two output powers of the two power supply devices are the same or similar.

Abstract: A semiconductor device package is disclosed that includes an address voltage supply pin connection, an address voltage output pin connection, a first power driver having a first address pin connection and a second power driver having a second address pin connection. The first address pin connection is connected to the address voltage supply pin connection via a resistor. The first power driver is configured to generate a first indication of a first address based on a voltage on the first address pin connection that is obtainable by a controller to determine the first address. The second address pin connection is connected to the first address pin connection and the address voltage output pin connection. The second power driver is configured to generate a second indication of a second address based on a voltage on the second address pin connection that is obtainable by the controller to determine the second address.

Abstract: A power sensing circuit in a first voltage domain senses an input voltage from a second voltage domain and provides a power OK signal. The maximum supply voltage of the first voltage domain is above a maximum tolerance for devices in the first voltage domain. Accordingly, protection techniques are employed to ensure that the potential difference between any two terminals of devices in the power sensing circuit does not exceed the maximum tolerance limit. The protection techniques utilize reference voltage-based techniques including level shifting and use of protection devices in transistor stacks. An over-voltage tolerant Schmitt trigger circuit is also employed in the power sensing circuit. A trip point device on the input of the power sensing circuit utilizes a programmable bias voltage to adjust the trip point of the power sensing circuit to accommodate different maximum input voltages from the second voltage domain.