Patents Examined by David Cain
  • Patent number: 5241561
    Abstract: A radio receiver (16) for direct sequence spread spectrum signals incorporates a quadrature zero-IF architecture, means for comb filtering (36,37) the two quadrature related channels (I and Q) and a means of non-coherent demodulation of each channel; the non-coherent demodulating means comprising delays (40,41) and mixers (42,43). This process obviates the need for locally generated versions of the spreading code used to produce the signals and considerably shortens the time-consuming process of correlating the received and the locally generated codes at receiver switch-on.
    Type: Grant
    Filed: January 15, 1991
    Date of Patent: August 31, 1993
    Assignee: U.S. Philips Corporation
    Inventor: Michael E. Barnard
  • Patent number: 5239555
    Abstract: An FH interceptor for determining bandwidth, hop number, dwell time, hop e, channel spacing and hop frequencies. A compressive receiver, having a passband greater than the bandwidth, samples received signals at a scan rate greater than the hop rate. On each scan, the receiver separates the received signal into its frequency components. A histogram memory, connected to the receiver, stores a frequency distribution of the frequency components including the scan periods. A data processor uses the histogram memory to determine the FH parameters.
    Type: Grant
    Filed: November 4, 1991
    Date of Patent: August 24, 1993
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventor: Charles E. Konig
  • Patent number: 5239581
    Abstract: This secret communication apparatus used in an audio and data transmission system has scramble/descramble circuits formed of programmable logic means. A control circuit in the apparatus instructs the programmable logic means to alter the arrangement of scramble/descramble circuits in accordance with the control signal received from the partner of communication. The control circuit in the partner's apparatus also instructs its programmable logic means to alter the arrangement of scramble/descramble circuits.
    Type: Grant
    Filed: July 13, 1992
    Date of Patent: August 24, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Toshihisa Hane
  • Patent number: 5239582
    Abstract: A method and apparatus for generating a ramp at cutpoints in a cut and rotate video line scrambling system. The undesirable shortening of the active portion of the video line which typically occurs in cut and rotate scrambling to overcome the problem of abrupt transitions at the cutpoints is eliminated by providing a synthesized ramp between the video amplitude level at the cutpoint and the blanking level at each of the cutpoints. This synthesized ramp is calculated by digital logic in conjunction with a delay line for inserting the ramp at its proper temporal position in the video signal. The ramp approximates a sine.sup.2 function and is formed of three consecutive pixels, each pixel having an associated calculated video amplitude.
    Type: Grant
    Filed: November 8, 1991
    Date of Patent: August 24, 1993
    Assignee: Macrovision Corporation
    Inventor: K. Heinz Griesshaber
  • Patent number: 5239556
    Abstract: A demodulation system for spread spectrum communication includes a first low pass filter for processing an input spread spectrum signal including a product of an information signal and a first spread code. A second spread code is generated which is equivalent to the first spread code. A second low pass filter processes the second spread code and has a transfer function substantially equal to a transfer function of the first low pass filter. An absolute value circuit derives an absolute value of an output signal from the second low pass filter. A division circuit derives a reciprocal of an output signal from the absolute value circuit. A delay circuit delays the second spread code by a predetermined time. A first multiplier multiplies an output signal from the division circuit and an output signal from the delay circuit, and generates a third spread code in response to the output signals from the division circuit and the delay circuit.
    Type: Grant
    Filed: December 27, 1991
    Date of Patent: August 24, 1993
    Assignee: Victor Company of Japan, Ltd.
    Inventors: Yukinobu Ishigaki, Takahisa Matsumoto
  • Patent number: 5237610
    Abstract: A decoder for descrambling encoded satellite transmissions comprises an internal security module and a resplaceable security module. The program signal is scrambled with a key and then the key itself is twice-encrypted and multiplexed with the scrambled program signal. The key is first encrypted with a first secret serial number (SSN.sub.1) which is assigned to a given replaceable security module. The key is then encrypted with a second secret serial number (SSN.sub.2) which is assigned to a given decoder. The decoder performs a first key decryption using the second secret serial number (SSN.sub.2) stored within the decoder. The partially decrypted key is then further decrypted by the replaceable security module using the first secret serial number (SSN.sub.1) stored within the replaceable security module. The decoder then descrambles the program using the twice-decrypted key. The replaceable security module can be replaced, allowing the security system to be upgraded or changed following a system breach.
    Type: Grant
    Filed: March 29, 1991
    Date of Patent: August 17, 1993
    Assignee: Scientific-Atlanta, Inc.
    Inventors: Keith Gammie, Robert K. Yoneda, Arthur Woo, Wayne Sheldrick
  • Patent number: 5237611
    Abstract: An encryption/decryption unit (EDU) that handles management of encryption keys used in the secure exchange of data over non-secure communication links. Each EDU includes a central processing unit (CPU) that controls its operation, random access memory (RAM) in which tables of key exchange keys (KEKs) are stored, and a data encryption standard (DES) coprocessor that implements a data encryption algorithm developed by the U.S. National Bureau of Standards--all comprising a module that is embedded in a potting material. Attempts to remove the potting material either by mechanical or solvent means are likely to result in loss of the data and program code stored in the module. The CPU includes special circuitry enabling it to operate in an encrypted mode so that it can not be interrogated to discover the program or data stored therein. This program enables the EDU to establish secure communications with another similar EDU over a non-secure link.
    Type: Grant
    Filed: July 23, 1992
    Date of Patent: August 17, 1993
    Assignee: Crest Industries, Inc.
    Inventors: Harry R. Rasmussen, Jack D. LaBounty, Michael J. Rosenow
  • Patent number: 5237609
    Abstract: A portable semiconductor memory device for interfacing with and exchanging information with an external terminal, said portable device having a security function for controlling access to a main memory. The main memory is adapted to exchange data with the external terminal by means of an interface bus which includes data lines, address lines and control lines. Access controls means in the portable unit is utilized to control access to the main memory. The unit also has a security memory comprising two sections. One section stores enciphered data which is read out to the external terminal, deciphered and returned to the unit as the first element used in a comparison. The second section of the security memory stores internal identification information. The two elements of identification information are provided to a comparator means which enables access to the main memory via the interface bus after a match is detected.
    Type: Grant
    Filed: March 26, 1990
    Date of Patent: August 17, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Masatoshi Kimura
  • Patent number: 5235644
    Abstract: A decryption method, and associated cryptographic processor, for performing in-line decryption of information frames received from a communication network through a first in-line processing stage. As an information packet is streamed into the cryptographic processor, a determination is made to an acceptable level of probability whether the packet contains data that should be decrypted. The decision whether or not decrypt is made by analyzing the incoming packet header, recognizing a limited number of packet formats, and further parsing the packet to locate any encrypted data and to make sure that the packet is not a segment of a larger message. Falsely decrypted packets are looped back through the cryptographic processor, to regenerate the data that was falsely decrypted. Decryption and encryption are performed in such a manner that a false decryption is completely reversible without loss of data.
    Type: Grant
    Filed: June 29, 1990
    Date of Patent: August 10, 1993
    Assignee: Digital Equipment Corporation
    Inventors: Amar Gupta, Butler W. Lampson, William R. Hawe, Joseph J. Tardo, Charles W. Kaufman, Mark F. Kempf, Morrie Gasser, B. J. Herbison
  • Patent number: 5235642
    Abstract: A distributed computer system has a number of computers coupled thereto at distinct nodes. The computer at each node of the distributed system has a trusted computing base that includes an authentication agent for authenticating requests received from principals at other nodes in the system. Requests are transmitted to servers as messages that include a first identifier provided by the requester and a second identifier provided by the authentication agent of the requester node. Each server process is provided with a local cache of authentication data that identifies requesters whose previous request messages have been authenticated. When a request is received, the server checks the request's first and second identifiers against the entries in its local cache. If there is a match, then the request is known to be authentic. Otherwise, the server node's authentication agent is called to obtain authentication credentials from the requester's node to authenticate the request message.
    Type: Grant
    Filed: July 21, 1992
    Date of Patent: August 10, 1993
    Assignee: Digital Equipment Corporation
    Inventors: Edward Wobber, Martin Abadi, Andrew Birrell, Butler Lampson
  • Patent number: 5233654
    Abstract: A unified system of programing communication. The system encompasses the prior art (television, radio, broadcast hardcopy, computer communications, etc.) and new user specific mass media. Within the unified system, parallel processing computer systems, each having an input (e.g., 77) controlling a plurality of computers (e.g., 205), generate and output user information at receiver stations. Under broadcast control, local computers (73, 205), combine user information selectively into prior art communications to exhibit personalized mass media programming at video monitors (202), speakers (263), printers (221), etc. At intermediate transmission stations (e.g., cable television stations), signals in network broadcasts and from local inputs (74, 77, 97, 98) cause control processors (71) and computers (73) to selectively automate connection and operation of receivers (53), record/players (76), computers (73), generators (82), strippers (81), etc.
    Type: Grant
    Filed: March 10, 1992
    Date of Patent: August 3, 1993
    Assignee: The Personalized Mass Media Corporation
    Inventors: John C. Harvey, James W. Cuddihy
  • Patent number: 5233653
    Abstract: An enciphered facsimile apparatus in which encoded image data is fetched one block at a time, and chained encipherment is executed in a reverse direction, respectively. Upon completion of encipherment, the enciphered image data is read in the reverse direction, and is demodulated to transmit to a network. Meanwhile, on the reception side, the enciphered image data received is fetched one block at a time, and deciphering is effected in the reverse direction. Upon completion of deciphering, decoding is effected in the reverse direction so as to confirm whether or not deciphering has been effected correctly. Thereby, the image data enciphered cannot be readily deciphered by a third party.
    Type: Grant
    Filed: October 4, 1991
    Date of Patent: August 3, 1993
    Assignee: Fuji Xerox Co., Ltd.
    Inventor: Masahiro Katsurabayashi
  • Patent number: 5233658
    Abstract: In a preferred embodiment, a method of limiting access to computer systems which method includes scrambling identification card information with time information so that the resulting code can be used for only a limited period of time, thus preventing unauthorized persons from using the code at a later time. In another aspect of the invention, one or more .mu.-metal shields are embedded in an identification card, thus identifying the card as being valid and also providing means to indicate when a valid card is being removed from a card reader.
    Type: Grant
    Filed: April 4, 1991
    Date of Patent: August 3, 1993
    Inventors: James S. Bianco, James T. Madsen, Michael Ceppetelli, John S. Fahy
  • Patent number: 5231666
    Abstract: A data processing system, method and computer program provide for the secure updating an electronic purse which includes a list of purse records. The method includes the step of defining an authentication tree with an authentication tree function comprising a one way function of purse records in the list, the authentication tree having a first root for a first list of the purse records and storing the first root in a cryptographic facility. The authentication tree includes authentication MDC vectors, one for each purse record in the list. The method includes the step of receiving a transaction record in the cryptographic facility, including an authentication code, a cryptographic key, and an authentication MDC vector, for updating an existing purse record in the first list. The method then performs the step of performing a purse update function in the cryptographic facility.
    Type: Grant
    Filed: April 20, 1992
    Date of Patent: July 27, 1993
    Assignee: International Business Machines Corporation
    Inventor: Stephen M. Matyas
  • Patent number: 5228082
    Abstract: A system for producing a jamming signal to be inserted in a band of CATV has a voltage producing circuit for producing a control voltage corresponding to the band, and a first voltage-controlled oscillator for producing a first jamming signal having a frequency dependent on the control voltage, and capacitors for storing the control voltage. A second jamming signal is produced by a second jamming signal producing circuit from the charged stored control voltage. A CPU is provided for controlling the production of the first and second jamming signals.
    Type: Grant
    Filed: November 6, 1991
    Date of Patent: July 13, 1993
    Assignee: Pioneer Electronic Corporation
    Inventors: Masatoshi Yanagidaira, Takashi Hashimoto
  • Patent number: 5228084
    Abstract: A gasoline service station includes gasoline dispensers and a PIN pad including keypads for receiving personal identification numbers and assembled into a network for securely communicating personal identification numbers from the PIN pads and dispensers to a host computer over unsecured data lines. The PIN pads and dispensers each include means for encryption and outputting of personal identification numbers. A security module includes means for decryption of data associated with each PIN pad and dispenser in a process for the respective PIN pads and dispensers and means for encryption of data associated with the host computer in a process which is different from its decryption of data associated with the PIN pads and dispensers.
    Type: Grant
    Filed: February 28, 1991
    Date of Patent: July 13, 1993
    Assignee: Gilbarco, Inc.
    Inventors: William S. Johnson, Edward A. Payne, Donald A. Boschker, Benita W. Phipps
  • Patent number: 5228054
    Abstract: A maximal length linear sequence pseudorandom noise (PN) sequence generator for generating an augmented length PN sequence of length 2.sup.N. The PN generator includes circuitry for generating a PN sequence of length 2.sup.N -1 chips. A sequence augmenting circuit is included which inserts at least one additional chip in the PN sequence at a predetermined position within the PN sequence so as to provide an output of an augmented PN sequence of length 2.sup.N chips. The generator may also include sequence shifting circuitry which is responsive to a mask input for providing a predetermined shift in the output augmented PN sequence without incurring a transition period where the shifted output is invalid.
    Type: Grant
    Filed: April 3, 1992
    Date of Patent: July 13, 1993
    Assignee: QUALCOMM Incorporated
    Inventors: Timothy I. Rueth, Lindsay A. Weaver, Jr., Klein S. Gilhousen
  • Patent number: 5226081
    Abstract: A multi-carrier communication system wherein a sender side apparatus and a receiver side apparatus are connected through a transmission line. The sender side apparatus contains a multi-carrier modulator for modulating data, where preset numbers of bits of the data are respectively modulated with a plurality of carriers in each cycle. The sender side apparatus transmits a training signal which is modulated by the multi-carrier modulating unit where the numbers are set equal to a predetermined maximum of the numbers, to the receiver side apparatus. The receiver side apparatus evaluates the quality of components of the training signal where the components are modulated with the respective carriers to determine the above numbers to be preset, ciphers information on the numbers, and transmits the ciphered information to the sender side apparatus. The sender side apparatus deciphers the information to obtain the determined numbers, and presets the numbers in a multi-carrier demodulator which is provided therein.
    Type: Grant
    Filed: May 14, 1991
    Date of Patent: July 6, 1993
    Assignee: Fujitsu Limited
    Inventor: Shinichi Hinokimoto
  • Patent number: 5225973
    Abstract: A regulator circuit for an inverter having first and second inverter sections that develop first and second AC waveforms which are phase displaced by a variable angle .alpha. wherein the first and second AC waveforms are combined to produce AC output power includes a reference signal generator that develops a reference signal having a transition between two states at a first time, a memory storing a plurality of words each representing a value of .alpha. add a circuit for accessing the memory with a deviation signal such that the memory provides a word at an output thereof. A counter is provided and a timing circuit causes the counter to load the word at a time prior to the first time. At the first time a gating circuit provides a plurality of clock pulses to a clock input of the counter whereby the counter decrements the loaded word as the clock pulses are received by the counter.
    Type: Grant
    Filed: September 13, 1990
    Date of Patent: July 6, 1993
    Inventors: Sunil Patel, Chai-Nam Ng, Vietson Nguyen, P. John Dhyanchand
  • Patent number: RE34339
    Abstract: At least one of the focusing electrodes stages disposed between an acceleration electrodes stage and a rear focusing electrodes stage is constituted by first and second grid electrodes, confronting portions thereof having asymmetrical construction with respect to an electron beam axis. A constant focusing voltage is applied to the first grid electrode, and a dynamic focusing voltage gradually increasing or decreasing from the constant focusing voltage as the degree of beam deflection increases is applied to the second grid electrode.
    Type: Grant
    Filed: September 19, 1990
    Date of Patent: August 10, 1993
    Inventor: Kuniharu Osakabe