Patents Examined by David L. Stewart
  • Patent number: 4385377
    Abstract: A device for sample modulating electronic information signals, which includes a pulse position modulating circuit having a first input coupled to receive information signals, a second input coupled to simultaneously receive uniformly spaced sampling signals, and an output for generating thereon in response to each sampling signal an electronic output impulse at a time instant indicating the amplitude of the simultaneously received information signals. Also included is an acoustic surface wave device having an impulse response of predetermined shape and finite length. The surface wave device has an input coupled to receive the impulses from the pulse position modulating circuit for generating in response thereto output signals proportional to the convolution of the impulses with the impulse response. Accordingly, these output signals also are of predetermined shape and finite length, and thus have a highly controllable frequency spectrum.
    Type: Grant
    Filed: January 16, 1978
    Date of Patent: May 24, 1983
    Assignee: Texas Instruments Incorporated
    Inventors: Jerry L. Norris, Clinton S. Hartmann
  • Patent number: 4357700
    Abstract: In a time division multiple access (TDMA) system, for "multi-path" data communication via satellite repeater, the form of transmitted data is varied adaptively to maintain error-free transmission under varying noise conditions. Adjustments are made on a path selective and channel selective basis to protect only the most vulnerable data in specific transmission paths experiencing noise deterioration. Accordingly any multi-channel burst may contain channels of data in both protected and unprotected forms. A predetermined portion of each channel containing data in unprotected format is used explicitly to designate the destination of the accompanying data and implicitly to distinguish the data format as unprotected. In protected format data including error protective coding is transmitted in two contiguous channels along with information in the first channel explicitly distinguishing the protected format.
    Type: Grant
    Filed: August 10, 1978
    Date of Patent: November 2, 1982
    Assignee: International Business Machines Corp.
    Inventors: Joseph A. Alvarez, III, Bruce D. Gobioff, Lynn P. West
  • Patent number: 4355388
    Abstract: A microprogrammable TDMA terminal controller is of modular construction. Frame reference and burst synchronization timing are resolved to the symbol level by a split frame counter, and a control RAM is reprogrammable "on-the-fly" to permit easy changes in terminal traffic assignments. The terminal controller includes a microprogrammed RAM controller for performing real time burst and data path control functions, transmit and receive high-speed data path modules for interfacing with the modem and terrestrial interface ports and providing direct burst processing of the data, a microcomputer-based operation control and a high stability oscillator.
    Type: Grant
    Filed: September 27, 1979
    Date of Patent: October 19, 1982
    Assignee: Communications Satellite Corporation
    Inventor: Joseph H. Deal, Jr.
  • Patent number: 4347602
    Abstract: An arrangement is disclosed for time division multiplex data transmission with a bus system which includes a bus line and a plurality of participators or terminals connected to the bus line in data transmitting connection with each other in a predetermined succession in a predetermined combination, in which each participator or terminal has at least one programmable counter having a counting input for connection with a synchronizing signal generator and an output for connection with a switching device to produce a data transmitting connection between the bus line and a data source or sink of this participator or terminal, whereby the counters of all participators or terminals are synchronized with each other. The arrangement includes apparatus to detect short circuits and to shut down individual sections of the bus line to protect the individual sections without shutting down all sections.
    Type: Grant
    Filed: May 1, 1979
    Date of Patent: August 31, 1982
    Assignee: VDO Adolf Schindling AG
    Inventors: Horst Kister, Horst Ullrich
  • Patent number: 4344170
    Abstract: A time division switching circuit with time slot interchange uses an input shift register to convert one-frame binary coded input data of time division multiplex type from an incoming line into a parallel bit output. The parallel bit output undergoes gate control of a gate matrix and its bit array is statically changed to a given bit array. The on/off control of the gate at the cross point of the gate matrix is conducted according to parallel bit outputs of a plurality of control shift registers which stores predetermined contents. The one-frame bit data thus exchanged are supplied to an output shift register. They are transmitted to an outgoing line as binary coded output data of time division multiplex type.
    Type: Grant
    Filed: October 1, 1979
    Date of Patent: August 10, 1982
    Assignee: Nippon Telegraph & Telephone Public Corporation
    Inventor: Takemi Arita
  • Patent number: 4328578
    Abstract: A radio transceiver is disclosed having manual controls on a microphone and the remainder of the circuitry located in a main chassis. The microphone and chassis are connected by means of a multiconductor cable, and time sharing multiplexing techniques are utilized and serially transmit information, bidirectionally, along a common data line while a clock line is utilized to synchronize the operation of main chassis and microphone circuitry. Multiple bit binary coded digital words are sent to the microphone to activate microphone displays while analog signals are sent from the microphone to the main chassis to provide analog control signals for the transceiver.A digital synchronizing pulse detector is disclosed for use in the above transceiver multiplexing system. The detector identifies synchronizing pulses which occur in the clock signal wherein the identification insures the synchronization of microphone and main chassis circuitry.
    Type: Grant
    Filed: December 31, 1979
    Date of Patent: May 4, 1982
    Assignee: Motorola Inc.
    Inventors: Robert R. Bell, Scott T. Christians
  • Patent number: 4327436
    Abstract: A supervisory and control system for a time division switching system supervising and controlling signals transferring to and from all or some of line interface equipment such as a digital trunk, analog trunk equipment, the intra-office line concentrators or remote line concentrator through a signal path. In the signal control, the signal is classified into two kinds of signals: one for cyclically controlling a state and the other for randomly controlling the same. Those signals are multiplexed in a single time slot to control the various line interfaces. Signal time slots having different multiframes and signal time slots with a plurality of periods are supervised depending on a signal path class thereby to reduce the number of laying cables among interframes.
    Type: Grant
    Filed: December 8, 1978
    Date of Patent: April 27, 1982
    Assignee: Hitachi, Ltd.
    Inventors: Susumu Ohara, Akira Horiki, Katsuyuki Miyazaki, Kaoru Tokunaga
  • Patent number: 4320503
    Abstract: A method of synchronizing the transmissions of alternate video fields or frames from two earth stations over a common uplink channel to a satellite so that the fields or frames arrive in interleaved time periods. A synchronizing pulse is transmitted over a separate channel from a first station to the satellite and back, twice, and to the second station and back. The returned signals provide information for synchronizing transmissions from both stations.
    Type: Grant
    Filed: August 6, 1979
    Date of Patent: March 16, 1982
    Assignee: RCA Corporation
    Inventor: Alfonse Acampora
  • Patent number: 4320505
    Abstract: A digital channel bank (11) has a plurality of channel units (17) interconnected to a digroup controller (10) over a shared data bus (30). A data processing circuit (FIG. 2) is included in each channel unit for the purpose of reducing the received signaling status information transmitted from each channel unit to the controller. The circuit (e.g., gates 24-27) serves to prevent single bit errors from being recognized as changes in the received signaling state. The circuit (gate 28) also insures that only changes in the signaling status, rather than current status, are reported to the controller. The circuit also incorporates a predetermined amount of delay for the purpose of eliminating multiple messages to the controller when the A and B path signaling bits change in adjacent signaling frames.
    Type: Grant
    Filed: July 23, 1979
    Date of Patent: March 16, 1982
    Assignee: Bell Telephone Laboratories, Incorporated
    Inventors: Philip J. Baun, Jr., Thomas B. Merrick
  • Patent number: 4320501
    Abstract: The space switch has an inlet series to parallel converter (1) arranged to take sequential data from the i-th time slot of each of a plurality of synchronized inlet multiplexes and apply them simultaneously to a parallel connection (11) within one time slot period. These time slots are written into one of two signal stores (2 and 3), e.g. sequentially. A control store (4) controls the order in which data is read from the signal store and re-assembled into outlet multiplexes by a parallel to series converter (5), thereby performing space switching between the stored time slots. The signal stores alternate between reading and writing, and each has a capacity equal to the product of the number (p) of inlet multiplexes (E1, . . . Ep) multiplied by a submultiple of the number of time slots to a frame. When the submultiple is greater than 1 there is a possibility of limited time switching within a sector of successive time slots, the number of time slots in each sector being equal to the submultiple.
    Type: Grant
    Filed: October 30, 1979
    Date of Patent: March 16, 1982
    Assignee: Compagnie Industrielle des Telecommunications Cit-Alcatel
    Inventors: Bernard Le Dieu, Georges Thiebaut
  • Patent number: 4320502
    Abstract: Multiple stations exchange information without central supervision. Stations requiring a cycle of access time on a shared time-divided bus participate in a cyclic access resolution process. The station having highest priority for a next bus cycle indicates its precedence to the other stations, and assumes exclusive use of the bus in the next cycle. The bus may comprise separate sections for data and response communications. Separate access resolution processes are conducted relative to each section. After gaining access to the bus for one cycle of data transfer a station becomes ineligible to compete for access to the data section until it receives an associated response. Accordingly receiving stations may control both the rate of data transmittal and the rate of access competition activity at associated origin stations. The data and response communications may include address information for enabling stations to intercommunicate directly in pairs.
    Type: Grant
    Filed: February 22, 1978
    Date of Patent: March 16, 1982
    Assignee: International Business Machines Corp.
    Inventor: John A. deVeer
  • Patent number: 4316282
    Abstract: A system and method for frequency division demultiplexing a received broad band signal into k.sup.m channels, each capable of containing a baseband signal component and comprising m descending tiers of identical channel division modules with the first tier thereof comprising a first module responsive to the received broad band signal to divide such broad band signal (at baseband) into k new channels each containing a baseband spectral component. Each module of each tier of modules is constructed to respond individually (by sampling and de-sampling techniques) to the spectral component in individual ones of the channels outputted from the immediately preceding higher order tier of modules to form k new additional channels each containing a baseband spectral component. Each baseband spectral component has an upper bandwidth limit which bears the same ratio to its sampling rate as the upper bandwidth limit of the originally received broad band signal bears to its sampling rate.
    Type: Grant
    Filed: November 23, 1979
    Date of Patent: February 16, 1982
    Assignee: RCA Corporation
    Inventor: Nicola A. Macina
  • Patent number: 4316061
    Abstract: Minimal delay rate-change circuits for transmitting data samples partitioned into blocks comprise an arrangement of storage devices (101 through 105) between input (100) and output (600) with individual storage lengths increasing according to a geometric progression; storage means (106) arranged between input and output to store all but one of the remaining samples unallocated to the storage devices; input clocking means (201 through 207) to route input samples to appropriate storage devices or means; and output clocking means (501 through 507) to gate the accumulated samples to the output. The topological arrangement relies on the ability of a storage device to shift out while the next lower size storage device is being loaded.
    Type: Grant
    Filed: November 23, 1979
    Date of Patent: February 16, 1982
    Inventor: Syed V. Ahamed
  • Patent number: 4314368
    Abstract: Simple and reliable decoding of T-1 type pulse code information is achieved by combining a fast-acting recirculating frame recovery circuit with a simplified signal output register. The frame recovery circuit uses a recirculating 386-bit control word in which all positions which cannot be the main-frame bit position are continuously recorded by the continuous comparison of pairs of incoming data bits spaced 386 bits apart. Following a sufficient number of iterations of the control word to statistically identify all 385 non-main-frame bit positions with a high degree of probability, the remaining unidentified position is read out as the main-frame bit position, and is used to reset the frame clock generator.
    Type: Grant
    Filed: October 12, 1978
    Date of Patent: February 2, 1982
    Inventors: Calvin H. Decoursey, Todd V. Townsend
  • Patent number: 4313195
    Abstract: A data acquisition system having plural input channels sampled at a first rate by a time division multiplexer applies the samples to a finite impulse response (FIR) discrete filter which generates output samples at a slower rate.The filter forms a set of summations ##EQU1## where Z(t.sub.i) is an input sample at a time t.sub.i, H.sub.i is the i.sup.th value of the filter impulse response, p is a sequence of successive integers, 0, 1, 2, . . . , each of which corresponds to one output sample, K is the length of filter impulse response (number of samples for each output) and R is the ratio of the initial input sample rate to the desired sample rate. A 3 to 1 reduction ratio is achieved with K=31, with the filter forming 11 different overlapping summations, so that after start-up one filtered output sample is outputted after each successive group of 3 inputs.
    Type: Grant
    Filed: April 23, 1979
    Date of Patent: January 26, 1982
    Assignee: Sangamo Weston, Inc.
    Inventor: Joseph L. Lehmann
  • Patent number: 4311876
    Abstract: A central station of a route guidance system collects traffic data from various points of a city area and updates aural routing information stored in roadside remote stations at periodic intervals. A moving vehicle senses the location of a roadside station to transmit a coded destination signal thereto where it is decoded to retrieve desired routing information. The latter is compressed in time dimension and transmitted back to the vehicle for storage in a storage device which is later retrieved at such a rate as to reproduce the original aural information.
    Type: Grant
    Filed: April 3, 1978
    Date of Patent: January 19, 1982
    Assignee: Nissan Motor Company, Ltd.
    Inventors: Hiroshi Endo, Kousaku Baba, Akira Matsumura
  • Patent number: 4312064
    Abstract: A communication transmission system includes one or more modulated carrier communication channels in which a receiver has a modified vestigial side band filter for eliminating phase cancellation. Accurate design of the modified vestigial side band filters at the receivers, further reduces susceptibility to frequency drift caused by component aging and component response to environmental changes. The system has particular utility in multiple channel carrier telephone communication systems which utilize limited available band width for providing a maximum number of communication channels over an extended length communication line.
    Type: Grant
    Filed: January 25, 1980
    Date of Patent: January 19, 1982
    Assignee: The Anaconda Company
    Inventors: Stephen M. Bench, Paul H. Thibodeau, Guy M. Campbell, Theodore M. Stump
  • Patent number: 4307462
    Abstract: A synchronous demultiplexer at a receiving station of a TDM/PCM telecommunication system, operating on an incoming bit stream organized in frames of 32 time slots of eight bits each, comprises a pair of substantially identical random-access memories each having 32 cells loaded with consecutive octets in successive time slots of a frame period P' under the control of a writing-address generator, stepped by clock pulses CK' extracted from the bit stream, and unloaded at a similar but not exactly identical rate in successive time slots of a period P" under the control of a reading-address generator, stepped by locally generated clock pulses CK". Writing as well as reading addresses are fed to both memories simultaneously but the two memories are loaded in alternate frame periods P' and unloaded in alternate frame periods P" under the control of selection signals in the form of two square waves respectively derived from clock pulses CK' and CK".
    Type: Grant
    Filed: November 2, 1979
    Date of Patent: December 22, 1981
    Assignee: Societa Italiana Telecomunicazioni Siemens S.p.A.
    Inventor: Gabriele Mazzocchi
  • Patent number: 4306303
    Abstract: A digital switching device of the stored program type operating under the control of a central control unit has a multiplexing stage for multiplexing signals from a plurality of ports, an input time switching stage which receives multiplexed signals from the multiplexing stage and outputs them in appropriate time slots, an interface unit connecting the input time switching stage to an output time switching stage and a demultiplexing stage which demultiplexes signals from the output time switching stage for transmission to said ports. The interface unit is an interchangeable unit which either provides a direct connection between the input and output time switching stages or comprises a space switching stage.
    Type: Grant
    Filed: November 7, 1978
    Date of Patent: December 15, 1981
    Assignee: The Post Office
    Inventor: John H. M. Hardy
  • Patent number: 4306304
    Abstract: There is disclosed a digital loop circuit for controlling synchronization around a closed loop communication system. The control circuit is designed to automatically adjust the delay of the loop to maintain a constant frame bit length without regard to the number of stations connected into the loop. As stations are added or subtracted from the loop, the system operates to add or subtract delay as necessary. A FIFO register having a bit capacity equal to the frame size is inserted serially in the loop and a separate clock is used to control the input and the output of the FIFO register. If a unique frame bit is not received in the anticipated position the output FIFO clock skips one count per frame thereby adding delay to the loop. The loop control circuit operates for situations where the framing bit is on a separate channel and also when the framing bit is on the actual data channel.
    Type: Grant
    Filed: July 31, 1979
    Date of Patent: December 15, 1981
    Assignee: Bell Telephone Laboratories, Incorporated
    Inventors: Leslie A. Baxter, Peter Cummiskey