Abstract: Ancestry deconvolution includes obtaining unphased genotype data of an individual; phasing, using one or more processors, the unphased genotype data to generate phased haplotype data; using a learning machine to classify portions of the phased haplotype data as corresponding to specific ancestries respectively and generate initial classification results; and correcting errors in the initial classification results to generate modified classification results.

Abstract: A computer-implemented method includes monitoring, by a computing device, sensor data during gameplay of a sporting event; determining, by the computing device, predictive factors associated with a target based on the monitoring the sensor data; determining, by the computing device, a real-time region of effectiveness for the target based on the predictive factors and training data identifying historical effectiveness of the target; and outputting, by the computing device, the real-time region of effectiveness for displaying the real-time region of effectiveness around the target.

Abstract: The present disclosure relates to generating proposed digital actions in high-dimensional action spaces for client devices utilizing reinforcement learning models. For example, the disclosed systems can utilize a supervised machine learning model to train a latent representation decoder to determine proposed digital actions based on latent representations. Additionally, the disclosed systems can utilize a latent representation policy gradient model to train a state-based latent representation generation policy to generate latent representations based on the current state of client devices. Subsequently, the disclosed systems can identify the current state of a client device and a plurality of available actions, utilize the state-based latent representation generation policy to generate a latent representation based on the current state, and utilize the latent representation decoder to determine a proposed digital action from the plurality of available actions by analyzing the latent representation.

Abstract: Systems and methods for spatial graph convolutions in accordance with embodiments of the invention are illustrated. One embodiment includes a method for predicting characteristics for molecules, wherein the method includes performing a first set of graph convolutions with a spatial graph representation of a set of molecules, wherein the first set of graph convolutions are based on bonds between the set of molecules, performing a second set of graph convolutions with the spatial graph representation, wherein the second set of graph convolutions are based on at least a distance between each atom and other atoms of the set of molecules, performing a graph gather with the spatial graph representation to produce a feature vector, and predicting a set of one or more characteristics for the set of molecules based on the feature vector.

Abstract: An apparatus for estimating bio-information is disclosed. The apparatus may include: a pulse wave sensor configured to measure a pulse wave signal from an object; a force sensor configured to obtain a force signal by measuring an external force exerted onto the force sensor; and a processor configured to obtain a first input value, a second input value, and a third input value based on the pulse wave signal and the force signal, to extract a feature vector by inputting the first input value, the second input value, and the third input value into a first neural network model, and to obtain the bio-information by inputting the feature vector into a second neural network model.

Abstract: Example compute-in-memory (CIM) or processor-in-memory (PIM) techniques using repurposed or dedicated static random access memory (SRAM) rows of an SRAM sub-array to store look-up-table (LUT) entries for use in a multiply and accumulate (MAC) operation.

Abstract: A system includes a memory device associated with a logical address space, and a processing device, operatively coupled to the memory device. The processing device can provide, to a host system, usable capacity information and supported logical address granularity information for the logical address space. The processing device can obtain, from the host system, a logical address granularity configuration for a partition of the logical address space. The processing device can provide, to the host system, an acknowledgement of receipt of the logical address granularity configuration.

Abstract: Aspects of the present disclosure configure a system component, such as a memory sub-system controller, to store data according to a second memory storage process instead of a first memory storage process based on an underfill threshold.

Abstract: Techniques are described herein that are capable of performing pointer-based sharing of a data structure between threads. A process, including first and second threads, is executed. A first memory system associated with the first thread is created to manage a first memory page that points to a shared array buffer that includes a data structure stored in contiguous memory spaces. A second memory system associated with the second thread is created to manage a second memory page that points to the shared array buffer. The second thread is configured to have access to the data structure in the shared array buffer by causing a pointer, pointing to the data structure, and a size indicator, indicating a size of the data structure, to be sent from the first thread to the second thread. The data structure is capable of being changed without being re-arranged to be contiguous in memory.

Abstract: A memory system includes a memory controller and a memory device including a plurality of dies, each die including a plurality of blocks. A plurality of commands are configured to control the memory device in units of super blocks. During a first time interval, a first erase operation is performed on a first-first block among the first-first block to a first-Mth block, and a first program operation is performed on a second-first block to a second-Mth block, based on the first commands. During a second time interval, a second erase operation is performed on a first-second block among the first-first block to the first-Mth block, and a second program operation is performed on the first-first block and one or more blocks among the second-first block to the second-Mth block, based on the second commands.

Abstract: A storage system includes a storage device, a processor, and a storage unit. The processor provides a volume configured on the storage device to a mainframe server. The processor manages data handled by an open-architecture server, using a first slot having a first slot length as a unit, in the volume, and manages data handled by the mainframe server, using a second slot having a second slot length shorter than the first slot length as a unit, the first slot storing therein a predetermined number of the second slots, in the volume. The processor performs a process using one of the first slot and the second slot as a unit, depending on the type of the process.

Abstract: Disclosed herein are systems, methods and devices for controlling output of a storage device during read operations. The method comprises: measuring a length of a temporal gap between first and second consecutive read bursts from a storage device, the first and second read burst are in response to first and second read commands received by the storage device, respectively; generating a state code according to the length, wherein the state code has a first value when the length is zero, a second value when the length is equal to or shorter than a threshold time length but is non-zero, and a third value when the length is greater than the threshold time length; and controlling output of the storage device according to the state code.

Abstract: A host stores “context” metadata for logical block addresses (LBAs) in a manner tied to physical location. Notwithstanding log-structured or copy on write processes, the host is then provided with immediate context when the host is called upon to assist a memory controller with data identified by physical location, for example, for memory reconfiguration, garbage collection, wear leveling or other processes. The metadata for example can provide the host with insight as to which data may be moved to enhance performance optimization and where that data can be placed. In one embodiment, the host writes back one or more references that span multiple layers of indirection in concert with write of the underlying data; in another embodiment, the context can point to other metadata.

Abstract: A memory system includes a memory area. A controller controls data. A first connector inputs the data and/or outputs the data, and is removable from the host. A first holding part is electrically disconnected from the memory area and the first connector and including a first port, and holds identification information used to authenticate an authority to initialize the memory area. The first port outputs the identification information to the host when receiving, from the host, an initialization command that instructs initialization of at least the part of the memory area. The controller includes a second port and an authentication part. The second port receives the initialization command from the host and receives the identification information via the first port. The authentication part executes initialization of at least the part of the memory area based on the initialization command and the identification information received at the second port.

Abstract: A direct-attached storage device software RAID boot system includes a chassis housing PCIe subsystems coupled to a UEFI subsystem and a software RAID subsystem. The software RAID subsystem identifies a first PCIe subsystem that is not claimed by a UEFI driver provided by the UEFI subsystem, and determines that the first PCIe subsystem is one of a PCIe bridge device or a PCIe root device. In response, the software RAID subsystem claims the first PCIe subsystem, installs a RAID protocol on the first PCIe subsystem, attaches at least one RAID logical storage subsystem provided by at least one PCIe endpoint device in the PCIe subsystems to the first PCIe subsystem, and presents the UEFI subsystem with a PCIe controller device in the first PCIe subsystem as being connected to the at least RAID logical storage subsystem.

Abstract: A system is described. The system includes a processing resource and a non-transitory computer-readable medium, coupled to the processing resource, having stored therein instructions that when executed by the processing resource cause the processing resource to receive a plurality of quality of service (QoS) parameters and client preferences from a client device and manage a QoS policy based on a plurality of QoS objectives included in the received QoS parameters, wherein the plurality of QoS objectives comprise input output operations per second (IOPS), throughput and latency.

Abstract: Nodes in a storage system can autonomously ingest I/O requests and flush data to storage. First and second nodes determine a sequence separator, the sequence separator corresponding to an entry in a page descriptor ring that separates two flushing work sets (FWS). The first node receives an input/output (I/O) request and allocates a sequence identification (ID) number to the I/O request. The first node determines a FWS for the I/O request based on the sequence separator and the sequence ID number, and commits the I/O request using the sequence ID number. The I/O request and the sequence ID number are sent to the second node.

Abstract: Systems, apparatus and methods are provided for determining an optimal performance profile and a predicted temperature. A method may include receiving a command from a host. The command may contain a logical block address (LBA) for data stored in a data storage system, a length for a data size associated with the command, and a timestamp associated with the command. The method may further include obtaining LBA information, the timestamp, the data size from the command, providing the LBA information, the timestamp, the data size, along with temperature readings, and a performance profile as inputs to a machine learning model, determining an optimal performance profile and a predicted temperature using the machine learning model and configuring a storage controller with settings of the optimal performance profile.

Abstract: Techniques are provided for implementing a garbage collection process and a prediction read ahead mechanism to prefetch keys into memory to improve the efficiency and speed of the garbage collection process. A log structured merge tree is used to store keys of key-value pairs within a key-value store. If a key is no longer referenced by any worker nodes of a distributed storage architecture, then the key can be freed to store other data. Accordingly, garbage collection is performed to identify and free unused keys. The speed and efficiency of garbage collection is improved by dynamically adjusting the amount and rate at which keys are prefetched from disk and cached into faster memory for processing by the garbage collection process.

Abstract: A 3D-stacked memory device including: a base die including a plurality of switches to direct data flow and a plurality of arithmetic logic units (ALUs) to compute data; a plurality of memory dies stacked on the base die; and an interface to transfer signals to control the base die.