Patents Examined by Dean A. Reichard
  • Patent number: 7643307
    Abstract: A data processing system and method providing a jumper which provides standby power from a redundant power supply to one of at least two critical functions in a frame having bays for holding at least two nodes. The redundant power supply supplying power to one of the nodes in the frame and one of the critical functions. A jumper is slidably engageable in the frame in place of one of the nodes. The jumper, when engaged in the frame, transfers power from the redundant power supply to the other of the critical functions. The jumper is included in a jumper book of an airblock which includes passive airblock books. Mechanical keys on the passive airblock books prevent the removal of the jumper book until after the passive airblock books are removed.
    Type: Grant
    Filed: September 29, 2005
    Date of Patent: January 5, 2010
    Assignee: International Business Machines Corporation
    Inventors: Frank E. Bosco, Douglas A. Baska, Joseph P. Corrado, Gerald J. Fahr, William P. Kostenko, Mitchell L. Zapotoski
  • Patent number: 7643306
    Abstract: A cabinet includes spaces for a number of electronic enclosures, each of which has a free end from which a pair of levers extend upward and downward to teeth engaging slots within the cabinet, aiding in the insertion and removal of the enclosures from the cabinet. An electronic enclosure that is wider than a standard width includes additional teeth on crank plates turning with the levers. The electronic enclosure may include an electrically-operated interlock mechanism preventing the insertion or removal of the electronic enclosure by preventing movement of a shaft attached to either or both of the levers.
    Type: Grant
    Filed: July 14, 2007
    Date of Patent: January 5, 2010
    Assignee: International Business Machines Corporation
    Inventor: Christopher Kent Karstens
  • Patent number: 7639509
    Abstract: The present invention is directed to a dimensionally-stable electronic device such as an LED on flexible printed-circuit-board. The device comprises an electrically-conductive flexible substrate and at least one stabilizing component for dimensionally stabilizing the substrate.
    Type: Grant
    Filed: May 10, 2006
    Date of Patent: December 29, 2009
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Tong Fatt Chew, Ak Wing Leong
  • Patent number: 7638714
    Abstract: A method for manufacturing a substrate board with high efficiency of heat conduction and electrical isolation is disclosed. The method comprises the steps of: providing a substrate layer with an arrangement surface and a heat-dissipating surface; executing an anodic treatment on the arrangement surface and the heat-dissipating surface to respectively form a first anodic treatment layer and a second anodic treatment layer; forming a heat conduction and electrical isolation layer on the second anodic treatment layer; and forming a diamond like carbon (DLC) layer on the heat conduction and electrical isolation layer. The heat expansion coefficient of the substrate layer is greater than that of the second anodic treatment layer, the heat conduction and electrical isolation layer, and the DLC layer in turn.
    Type: Grant
    Filed: January 4, 2008
    Date of Patent: December 29, 2009
    Inventor: Yu-Hsueh Lin
  • Patent number: 7635814
    Abstract: A printed circuit board (PCB) includes first and second signal layers sandwiching a dielectric layer therebetween and a first differential pair and a second differential pair each having a positive differential trace and a negative differential trace. The positive differential traces of the two differential pairs are disposed within the first signal layer. The negative differential traces of the two differential pairs are disposed within the second signal layer. The positive differential trace of the first differential pair is defined at the left side of the positive differential trace of the second differential pair. The negative differential trace of the first differential pair is defined at the right side of the negative differential trace of the second differential pair.
    Type: Grant
    Filed: November 19, 2007
    Date of Patent: December 22, 2009
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Chien-Hung Liu, Shou-Kuo Hsu, Yu-Chang Pai
  • Patent number: 7633016
    Abstract: A coupling structure between a circuit board and a frame member according to the present invention includes: the frame member made of a metal material; and the circuit board set in the frame member and having a land portion soldered to the frame member, in which a solder reinforcing member that is put on the land portion and is solderable is provided at a corner formed by the frame member and the circuit board, and the frame member, the land portion, and the solder reinforcing member are soldered at the corner.
    Type: Grant
    Filed: March 5, 2007
    Date of Patent: December 15, 2009
    Assignee: Alps Electric Co., Ltd.
    Inventor: Masaki Yamamoto
  • Patent number: 7633761
    Abstract: A flexible circuit film whose signal lines are resistant to cracking even upon bending is presented. The flexible circuit film includes a base substrate, a signal transmission line and a crack-preventing portion. The signal transmission line is formed on a first surface of the base substrate. The crack-preventing portion is formed on a portion of a second surface of the base substrate that is opposite to the first surface to prevent cracking of the signal transmission line. The crack-preventing portion is formed on the part of the flexible circuit film that is bent by a large angle when the flexible circuit film is assembled with another component.
    Type: Grant
    Filed: December 11, 2006
    Date of Patent: December 15, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Ock-Jin Kim
  • Patent number: 7633015
    Abstract: An electronic circuit component is provided with shielding for electro-magnetic interference (“EMI”) by covering at least part of the component with a layer of electrical insulation that conforms to the shape of the surface to which the insulation is applied. At least part of the surface of the insulation is then covered by a layer of EMI shielding that conforms to the shape of the surface of the insulation to which the shielding is applied.
    Type: Grant
    Filed: June 19, 2008
    Date of Patent: December 15, 2009
    Assignee: Apple Inc.
    Inventors: Josh Wurzel, Shawn Robert Gettemy, Ahmad Al-Dahle, Carlin James Vieri, Wei Yao
  • Patent number: 7633766
    Abstract: A circuit board design is disclosed that is useful in high-speed differential signal applications uses either a via arrangement or a circuit trace exit structure. A pair of differential signal vias in a circuit board are surrounded by an opening that is formed within a ground plane disposed on another layer of the circuit board. The vias are connected to traces on the circuit board by way of an exit structure that includes two flag portions and associated angled portions that connect the flag portions to circuit board traces. In an alternate embodiment, the circuit board traces that leave the differential signal vias are disposed in one layer of the circuit board above a wide ground strip disposed on another layer of the circuit board.
    Type: Grant
    Filed: August 22, 2008
    Date of Patent: December 15, 2009
    Assignee: Molex Incorporated
    Inventors: Kent E. Regnier, David L. Brunker, Martin U. Ogbuokiri
  • Patent number: 7633764
    Abstract: Presented herein are ball grid array configurations for reducing path distances. In an exemplary embodiment, there is presented a memory system. The memory system comprises a printed circuit board, a memory controller, and a memory. The printed circuit board comprises a first layer and a second layer. The memory controller comprises a first plurality of pins connected to the first layer and a second plurality of pins connected to the second layer. The memory comprises a first plurality of pins connected to the first layer and a second plurality of pins connected to the second layer. The first layer comprises a plurality of connection paths connecting the first plurality of pins of the memory to the first plurality of pins of the memory controller. The second layer comprises a plurality of connection paths connecting the second plurality of pins of the memory to the second plurality of pins of the memory controller.
    Type: Grant
    Filed: April 27, 2005
    Date of Patent: December 15, 2009
    Assignee: Broadcom Corporation
    Inventors: Abhijit Mahajan, Ali Sarfaraz
  • Patent number: 7633765
    Abstract: A semiconductor package including a top-surface metal layer for implementing circuit features provides improvements in top-surface interconnect density, more flexible routing and mounting of top surface semiconductor packages, dies and passive components or a conformal shield cap implementation. The metal layer interconnected with an internal substrate of the semiconductor package by blind vias laser-ablated through the encapsulation and filled with metal. The vias extend from the top surface to an internal package substrate or through the encapsulation to form bottom-side terminals. The metal layer may be formed by circuit patterns and/or terminals embedded within the encapsulation conformal to the top surface by laser-ablating channels in the top surface of the encapsulation and filling the channels with metal. A conformal coating may be applied to the top surface of the semiconductor package over the metal layer to prevent solder bridging to circuit patterns of the metal layer.
    Type: Grant
    Filed: December 5, 2005
    Date of Patent: December 15, 2009
    Assignee: Amkor Technology, Inc.
    Inventors: Christopher Marc Scanlan, Ronald Patrick Huemoeller
  • Patent number: 7630207
    Abstract: The wiring board has electrical wires of a prescribed pattern. More specifically, the wiring board has a substrate on which grooves are formed in the prescribed pattern, each of the grooves having an undercut part; and a conductive material which is disposed inside the grooves so as to serve as the electrical wires.
    Type: Grant
    Filed: September 14, 2006
    Date of Patent: December 8, 2009
    Assignee: Fujifilm Corporation
    Inventor: Toshiya Kojima
  • Patent number: 7630208
    Abstract: Provided is a multilayer chip capacitor including a capacitor body having first and second capacitor units arranged in a lamination direction; and a plurality of external electrodes formed outside the capacitor body. The first capacitor unit includes at least one pair of first and second internal electrodes disposed alternately in an inner part of the capacitor body, the second capacitor unit includes a plurality of third and fourth internal electrodes disposed alternately in an inner part of the capacitor body, and the first to fourth internal electrodes are coupled to the first to fourth external electrodes. The first capacitor unit has a lower equivalent series inductance (ESL) than the second capacitor unit, and the first capacitor unit has a higher equivalent series resistance (ESR) than the second capacitor unit.
    Type: Grant
    Filed: August 26, 2008
    Date of Patent: December 8, 2009
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Byoung Hwa Lee, Sung Kwon Wi, Hae Suk Chung, Dong Seok Park, Sang Soo Park, Min Cheol Park
  • Patent number: 7630206
    Abstract: A releasably mountable electronics component is provided. The electronics component comprises a backing having a mounting surface and an electronic module joined to the mounting surface of the backing. The electronic module has electrical contacts disposed on a first side thereof. The electronic module also includes an adhesive covering at least a portion of the mounting surface. The adhesive provides a releasable adhesive for releasably mounting the electronics component to a substrate on which the electronic module is connectable.
    Type: Grant
    Filed: December 15, 2005
    Date of Patent: December 8, 2009
    Assignee: International Business Machines Corporation
    Inventor: Derek Kwan
  • Patent number: 7630209
    Abstract: A smart card is provided including a body with a cavity, an IC chip inserted into the cavity, and a universal PCB on which the IC chip can be mounted and electrically contacted regardless of its size, type and bonding structure. The universal PCB comprises groups of contact pads suitable for contacting IC chips of different sizes and designs.
    Type: Grant
    Filed: July 14, 2006
    Date of Patent: December 8, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Han Kim, Young-Hoon Ro
  • Patent number: 7626826
    Abstract: An expansion card carrier is disclosed, the expansion card carrier including a top portion for covering an expansion card, at least one side portion for supporting the top portion, and at least one pair of card guides for allowing an expansion card to slide along into the expansion card carrier. A method for assembling an expansion card carrier is also disclosed, the method including casting a panel including a top portion for covering an expansion card and at least one side portion for supporting the top portion, forming at least one side portion by deforming the panel, and attaching at least one pair of card guides inside the expansion card carrier for allowing an expansion card to slide along into the expansion card carrier.
    Type: Grant
    Filed: January 31, 2007
    Date of Patent: December 1, 2009
    Assignee: Sun Microsystems, Inc.
    Inventors: Thomas E. Stewart, Mark H. Chen, Alan L. Winick, Michael S. White
  • Patent number: 7625214
    Abstract: A power connector assembly is provided that has high power density capability and controllable impedance. One embodiment has a multi-layer stack of printed circuit boards that each contain one or more metal layers that function selectively as power and return planes. The metal layers are electrically in contact with contact arrays of connectors, such as through half vias or slot vias for example, which mate with corresponding contact arrays of connectors associated with the circuits being connected together. Discrete components may be used to further control impedance of the connector. Different connector technologies may be used for connecting contacts to the metal layers.
    Type: Grant
    Filed: September 21, 2005
    Date of Patent: December 1, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Richard Schumacher
  • Patent number: 7626125
    Abstract: The present invention provides a wiring, a display device, and a method of manufacturing the same. A first metal diffusion-preventing layer is formed on a substrate or on a circuit element formed on the substrate. Then, a metal wiring layer is selectively formed on the first metal diffusion-preventing layer by an electroless metal plating method or a metal electroplating method. Further, the undesired portion of the first metal diffusion-preventing layer is removed. Finally, a second metal diffusion-preventing layer is formed selectively by an electroless metal plating method in a manner to cover the metal wiring layer or both a seed layer and the metal wiring layer.
    Type: Grant
    Filed: March 16, 2004
    Date of Patent: December 1, 2009
    Assignee: Advanced LCD Technologies Development Center Co., Ltd.
    Inventor: Hiroki Nakamura
  • Patent number: 7626829
    Abstract: This invention provides a multilayer printed wiring board in which electric connectivity and functionality are obtained by improving reliability and particularly, reliability to the drop test can be improved. No corrosion resistant layer is formed on a solder pad 60B on which a component is to be mounted so as to obtain flexibility. Thus, if an impact is received from outside when a related product is dropped, the impact can be buffered so as to protect any mounted component from being removed. On the other hand, land 60A in which the corrosion resistant layer is formed is unlikely to occur contact failure even if a carbon pillar constituting an operation key makes repeated contacts.
    Type: Grant
    Filed: October 17, 2005
    Date of Patent: December 1, 2009
    Assignee: IBIDEN Co., Ltd.
    Inventors: Yasuhiro Watanabe, Michimasa Takahashi, Masakazu Aoyama, Takenobu Nakamura, Hiroyuki Yanagisawa
  • Patent number: 7626831
    Abstract: A retaining member for a circuit board array is provided. The retaining member includes an elongated support post having a first end and an opposite second end. A protrusion extends from the first end. The protrusion is configured to be received in a slot having side walls in a circuit board array. The support post is movable to move the protrusion within the slot from a first position wherein the protrusion is disengaged from the side walls of the slot to a second position wherein the protrusion engages the side walls of the slot to retain the circuit board array.
    Type: Grant
    Filed: October 21, 2004
    Date of Patent: December 1, 2009
    Assignee: Tyco Electronics Corporation
    Inventors: Douglas Sebastian Pfautz, Michael Steven Stanard