Abstract: A storage system includes a first de-duplication scope comprising a first volume, a first table of hash values corresponding to first chunks of data stored on the first volume, and a first table of logical block addresses of where the chunks of data are stored on the first volume. A second de-duplication scope includes similar information for a second volume. The first scope is used for de-duplicating and storing first data from a first data source and the second scope is used for de-duplicating and storing second data from a second data source. First storage mediums that make up the first volume remain powered off while de-duplication and storage of the second data on the second volume takes place, and second storage mediums that make up the second volume remain powered off while de-duplication and storage of the first data takes place, thereby enabling data de-duplication while saving power.

Abstract: A device having multiple cores executes an algorithm to control Thin-Film Thermoelectric Coolers (TFTEC) that employ the Peltier effect to remove heat from the various cores of the multi-core processor. The algorithms may combine Thread Migration (TM) and Dynamic Voltage/Frequency Scaling (DVFS) to provide Dynamic Thermal Management (DTM) and TFTEC control.

Abstract: There is provided a distributed control system including a plurality of field controllers which are connected through a control network. Each of the field controllers includes: a control clock that defines a control timing of the field controller; and an adjustment unit that adjusts a control time of the control clock depending on a network time obtained through the control network.

Abstract: An interface card is capable of communicating with an external device and includes a power supplier; a non-volatile memory which stores executable instructions to operate in an active-mode and a sleep-mode; a small-capacity volatile memory which is supplied with power in the sleep mode; a transmitter-receiver which transmits and receives packet data to/from the external device; and a controller which retrieves sleep-mode instructions stored in the non-volatile memory and loads the sleep mode instructions in the small-capacity volatile memory to transition the interface card into the sleep mode if the transmitter-receiver does not receive the packet data for predetermined time period in an active mode. The interface card processes certain packet data in the sleep mode and transitions back into the active mode when sleep mode operations determine that the packet data cannot be processed in the sleep mode.

Abstract: The invention relates to the use of history information as an aid to synchronization in a peer-to-peer system. In particular, node trees are used to represent portions of files systems designated for synchronization. The nodes in the node tree embody history information regarding associated objects. The history information includes version vectors that are used to simplify synchronization-related comparisons and create job lists that may be used to bring participating peers into synchronization.

Abstract: The present invention is a computer motherboard with a Basic Input Output System (BIOS) capable of built-in configuration display, characterized in that the BIOS includes a first means and a second means. The first and second means are code internally provided in the BIOS and executable by a CPU of the computer motherboard in an execution environment preset by the BIOS. The first means enables acquisition of CPU configuration data stored on the CPU and configuration data for displaying the CPU. The second means enables acquisition of memory module configuration data stored on at least a memory module and configuration data for displaying the memory module. After the computer motherboard enters a BIOS setup utility, a user selects an option of execution of the first or second means to execute CPU and memory configuration display without using an operating system.

Abstract: A device having a power supply monitoring capabilities, the device includes: a power supply unit; at least one real time clock generator counter adapted to receive a supply voltage from the power supply unit; a fixed value storage circuit that is un-accessible to software executed by a processor; wherein the fixed value storage circuit stores a fixed value; wherein the fixed value includes multiple bits; a volatile storage unit, being accessible to the processor; wherein the volatile storage unit is adapted to: (i) store a reset value after being reset; (ii) receive the fixed value during an initialization state; and (iii) store the fixed value until being reset; wherein the volatile storage unit is designed such that there is a low probability that the reset value equals the fixed value; and a comparator adapted to provide a tamper indication if the fixed value stored at the fixed value storage circuit differs from a value stored at the volatile storage unit.

Abstract: BIOS field mapping includes generating basic input/output system (BIOS) information by defining property identifications using a visual form code language and determining that a proprietary set-up service is accessible. The BIOS field mapping then includes converting the visual form code language to a binary format and storing the property identifications in binary format on a setup database as data hidden from an operating system. A BIOS driver may then request the property identifications causing a transfer of the property identifications to the BIOS driver.

Abstract: A synchronous clear emulation circuit is provided. The synchronous clear emulation circuit includes a register having an asynchronous clear port. Moreover, the synchronous clear emulation circuit is configured to emulate a synchronous clear port by using the asynchronous clear port. The synchronous clear port is emulated by outputting a data output signal that is synchronous with the clock signal and the data output signal is based on an asynchronous clear signal received at the asynchronous clear port. The asynchronous clear port performs a function of the asynchronous clear port without the synchronous clear port implemented within the register.

Abstract: A power detection method applied to a peripheral apparatus is provided. The method includes the following steps. First, a power signal is received from a data communication interface. Next, it is determined that whether the power signal is able to drive a main function device of the peripheral apparatus. Then, according to the determination result, the power signal is selectively provided to the main function device to drive the main function device.

Abstract: Systems and methods are provided for using a NAND-type non-volatile memory (“NVM”), such as NAND flash memory, to store NV pre-boot information for a bootloader (e.g., a second state bootloader) or an operating system. The NV pre-boot information can include, for example, environment variables storing the configuration or state of an electronic device. In some embodiments, an electronic device including the NAND-type NVM may allocate a portion of the super blocks in the NAND-type NVM to storing the NV pre-boot information. The electronic device may store a redundant copy of the NV pre-boot information into the allocated portion of each IC die of the NAND-type NVM.

Abstract: Method and computer storage media for efficiently deploying an operating system are provided. A virtual hard drive file is communicated by a computing device, such as a server. The virtual hard drive file may be compounded with a boot manager enhancer and/or a translator. Upon receipt of the virtual hard drive file, a computing device is enhanced to expose and mount the virtual hard drive as a drive and boot option for the computing device. Thereafter, an initial boot sequence may be commenced utilizing the virtual hard drive file as the boot source. In some embodiments, a boot manager enhancer and a translator are utilized to do one or more of expose, mount, and translate the virtual hard drive file. In some embodiments, a virtual SCSI miniport driver is utilized to do one or more of expose, mount, and translate the virtual hard drive file.

Abstract: The field control system includes: a field device; a field controller which is connected to a control network and which executes a computation processing for controlling the field device according to a given control cycle while executing a data communication between the field controller and the field device, the field controller including a communication unit configured to execute the data communication with the field device, and a control computation unit configured to execute the computation processing independently from the communication unit; and an operation monitor which is connected to the control network and which operates and monitors the field device, the operation monitor including a network clock which provides a common network time to the control network. The control computation unit and the communication unit execute the computation processing and the data communication in synchronism with each other in accordance with a timer clock based on the network time.

Abstract: Provided are a storage apparatus and its power saving control method capable of performing sufficient power saving to multiple memory devices without deteriorating the response performance to a host system. If multiple logical volumes formed in disk drives configuring a parity group are in an offline status where a path group from the host computer is not set, a control processor sets the multiple disk drives of the parity group to a power saving status.

Abstract: A low power display device capable of receiving display information on a wireless network and powered by environmental power, without requiring a battery or a wired power connection, is described.

Abstract: An adaptive throttling system for minimizing the impact of non-production work on production work in a computer system is provided. The adaptive throttling system throttles production work and non-production work to optimize production. The adaptive throttling system allows system administrators to specify a quantified limit on the performance impact of non-production or utility work on production work. The throttling rate of the utility is then automatically determined by a supervisory agent, so that the utilities' impact is kept within the specified limit. The adaptive throttling system adapts dynamically to changes in workloads so as to ensure that valuable system resources are well utilized and utility work is not delayed unnecessarily.

Abstract: An information processing apparatus comprises: a creation unit creating a preset number of pieces of second data by duplicating first data, and holding the second data in a predetermined area or sending the second data to another information processing apparatus; a first writing unit for writing the first data in a first storage device; an activation unit activating power to a second storage device at a predetermined time, the second storage device being in a stopped state; a second writing unit for writing the second data in the second storage device activated by the activation unit by retrieving the second data from the predetermined area or another information processing apparatus after the second storage device is activated by the activation unit; a stop unit stopping power to the second storage device in which the second data is written by the second writing unit.

Abstract: A method and system of executing stack-based memory reference code. At least some of the illustrated embodiments are methods comprising waking a computer system from a reduced power operational state in which a memory controller loses at least some configuration information, executing memory reference code that utilizes a stack (wherein the memory reference code configures the main memory controller), and passing control of the computer system to an operating system. The time between executing a first instruction after waking the computer system and passing control to the operating system takes less than 200 milliseconds.

Abstract: An information processing device and a mobile terminal include a power consumption calculator which calculates, for each processing executed by the information processing device (or mobile terminal), power consumption information concerning an amount of power consumed by executing each processing. A request generator compares the amount of power indicated by the power consumption information and a remaining amount of power of the information processing device(or mobile terminal), and generates a request to execute predetermined processing according to a result of the comparison. A request processor executes the predetermined processing in response to the generated request.

Abstract: A computer having an active mode and an inactive mode includes a primary processor and a primary memory. A primary display is associated with the primary processor and the primary memory. The primary processor, the primary memory, and the primary display are operated when the computer is in the active mode and are powered down when the computer is in the inactive mode. A secondary processor dissipates less power than the primary processor. A secondary display communicates with the secondary processor. The secondary processor and the secondary display are powered up when the computer is in the inactive mode, and the secondary processor processes at least one of wireless network data and disk drive data when the computer is in each of the active mode and the inactive mode.